1 /*
2 * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #define CC_PAL_LOG_CUR_COMPONENT CC_LOG_MASK_CCLIB
8
9 #include "cc_regs.h"
10 #include "cc_pal_memmap.h"
11 #include "cc_hal.h"
12 #include "dx_crys_kernel.h"
13 #include "cc_pal_abort.h"
14 #include "cc_error.h"
15 #include "cc_regs.h"
16
17 #include "cc_pal_interrupt_ctrl_plat.h"
18 #include "dx_rng.h"
19
20 /******************************************************************************
21 * DEFINITIONS
22 ******************************************************************************/
23 #define DX_CC_REG_AREA_LEN 0x100000
24
25 /******************************************************************************
26 * GLOBALS
27 ******************************************************************************/
28
29 unsigned long gCcRegBase = 0;
30
31 /******************************************************************************
32 * FUNCTIONS
33 ******************************************************************************/
34
35 /*!
36 * HAL layer entry point.
37 * Mappes ARM CryptoCell regisers to the HOST virtual address space.
38 */
CC_HalInit(void)39 int CC_HalInit(void)
40 {
41 unsigned long *pVirtBuffAddr = NULL;
42
43 CC_PalMemMap(DX_BASE_CC, DX_CC_REG_AREA_LEN, (uint32_t**)&pVirtBuffAddr);
44 gCcRegBase = (unsigned long)pVirtBuffAddr;
45 return 0;
46 }
47
48
49 /*!
50 * HAL exit point.
51 * Unmaps ARM CryptoCell registers.
52 */
CC_HalTerminate(void)53 int CC_HalTerminate(void)
54 {
55 CC_PalMemUnMap((uint32_t *)gCcRegBase,DX_CC_REG_AREA_LEN);
56 gCcRegBase = 0;
57 return CC_HAL_OK;
58 }
59
60
CC_HalClearInterruptBit(uint32_t data)61 void CC_HalClearInterruptBit(uint32_t data)
62 {
63
64 CC_HAL_WRITE_REGISTER( CC_REG_OFFSET(HOST_RGF, HOST_ICR), data);
65
66 return;
67 }
68
CC_HalMaskInterrupt(uint32_t data)69 void CC_HalMaskInterrupt(uint32_t data)
70 {
71 CC_HAL_WRITE_REGISTER( CC_REG_OFFSET(HOST_RGF, HOST_IMR), data);
72
73 return;
74 }
75
76 /*!
77 * Wait upon Interrupt Request Register (IRR) signals.
78 * This function notifies for any ARM CryptoCell interrupt, it is the caller responsibility
79 * to verify and prompt the expected case interrupt source.
80 *
81 * @param[in] data - input data for future use
82 * \return CCError_t - CC_OK upon success
83 */
CC_HalWaitInterrupt(uint32_t data)84 CCError_t CC_HalWaitInterrupt(uint32_t data)
85 {
86 CCError_t error = CC_OK;
87 if (0 == data) {
88 return CC_FATAL_ERROR;
89 }
90 error = CC_PalWaitInterrupt( data );
91
92 return error;
93 }
94
95
96
CC_HalWaitInterruptRND(uint32_t data)97 CCError_t CC_HalWaitInterruptRND(uint32_t data)
98 {
99 uint32_t irr = 0;
100 CCError_t error = CC_OK;
101 if (0 == data) {
102 return CC_FATAL_ERROR;
103 }
104
105 /* busy wait upon IRR signal */
106 do {
107 irr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR));
108 /* check APB bus error from HOST */
109 if( CC_REG_FLD_GET(0, HOST_IRR, AHB_ERR_INT, irr) == CC_TRUE){
110 error = CC_FATAL_ERROR;
111 /*set data for clearing bus error*/
112 CC_REG_FLD_SET(HOST_RGF, HOST_ICR, AXI_ERR_CLEAR, data , 1);
113 break;
114 }
115 } while (!(irr & data));
116
117 /* clear interrupt */
118 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), data); // IRR and ICR bit map is the same use data to clear interrupt in ICR
119
120 return error;
121 }
122
