1 /*
2  * Copyright (c) 2001-2022, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 
8 #ifndef __CC_HAL_PLAT_H__
9 #define __CC_HAL_PLAT_H__
10 
11 #include "dx_host.h"
12 #include "cc_bitops.h"
13 
14 #include "dx_reg_common.h" /*temporary (missing HW defines)*/
15 
16 
17 /******************************************************************************
18 *               DEFINITIONS
19 ******************************************************************************/
20 #define CC_LARGE_SECRET_KEY_NUM_OF_BYTES 32
21 #define CC_SMALL_SECRET_KEY_NUM_OF_BYTES 16
22 
23 /* Peripheral ID registers values */
24 #define CC_BSV_PID_0_VAL        0x000000C0UL
25 #define CC_BSV_PID_1_VAL        0x000000B0UL
26 #define CC_BSV_PID_2_VAL        0x0000000BUL
27 #define CC_BSV_PID_3_VAL        0x00000000UL
28 #define CC_BSV_PID_4_VAL        0x00000004UL
29 #define CC_BSV_PID_SIZE_WORDS       5
30 
31 #define CC_BSV_PID_0_1_VAL      0x000000C1UL
32 
33 #define CC_BSV_PID_2_1_VAL      0x0000002BUL
34 
35 #define CC_BSV_PID_2_2_VAL      0x0000001BUL
36 
37 /* Component ID registers values */
38 #define CC_BSV_CID_0_VAL        0x0DUL
39 #define CC_BSV_CID_1_VAL        0xF0UL
40 #define CC_BSV_CID_2_VAL        0x05UL
41 #define CC_BSV_CID_3_VAL        0xB1UL
42 #define CC_BSV_CID_SIZE_WORDS       4
43 
44 
45 /******************************************************************************
46 *                               MACROS
47 ******************************************************************************/
48 extern unsigned long gCcRegBase;
49 
50 /******************************************************************************
51 *                               MACROS
52 ******************************************************************************/
53 /*get the size of the RKEK from HW */
54 //(key_size >> DX_NVM_CC_BOOT_LARGE_RKEK_LOCAL_BIT_SHIFT) & DX_NVM_CC_BOOT_LARGE_RKEK_LOCAL_BIT_SIZE
55 #define GET_ROOT_KEY_SIZE(key_size) \
56 do{ \
57     key_size = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, NVM_CC_BOOT));\
58         if (CC_REG_FLD_GET(CRY_KERNEL, NVM_CC_BOOT, LARGE_RKEK_LOCAL, key_size)) \
59                 key_size = CC_LARGE_SECRET_KEY_NUM_OF_BYTES; \
60         else \
61                 key_size = CC_SMALL_SECRET_KEY_NUM_OF_BYTES; \
62 }while (0)
63 
64 
65 /*!
66  * Read CryptoCell memory-mapped-IO register.
67  *
68  * \param regOffset The offset of the ARM CryptoCell register to read
69  * \return uint32_t Return the value of the given register
70  */
71 #define CC_HAL_READ_REGISTER(regOffset)                 \
72         (*((volatile uint32_t *)(gCcRegBase + (regOffset))))
73 
74 /*!
75  * Write CryptoCell memory-mapped-IO register.
76  * \note This macro must be modified to make the operation synchronous, i.e. the write operation must complete,
77  *       and the new value must be written to the register before the macro returns. The mechanisms required to
78  *       achieve this are architecture-dependent (e.g., the memory barrier in ARM architecture).
79  *
80  * \param regOffset The offset of the ARM CryptoCell register to write
81  * \param val The value to write
82  */
83 #define CC_HAL_WRITE_REGISTER(regOffset, val)       \
84         (*((volatile uint32_t *)(gCcRegBase + (regOffset))) = (val))
85 
86 
87 
88 #endif /*__CC_HAL_PLAT_H__*/
89 
90