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Searched defs:CCR (Results 1 – 25 of 256) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/
Dstm32g061xx.h150 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
206 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
230 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
247 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
577 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g051xx.h149 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
205 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
229 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
246 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
576 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g071xx.h151 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
219 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
243 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
260 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
593 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g081xx.h152 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
220 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
244 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
261 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
594 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g031xx.h148 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
189 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
206 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
536 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g041xx.h149 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
190 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
207 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
537 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g0c1xx.h152 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
288 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
312 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
329 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
705 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g0b1xx.h151 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
287 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
311 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
328 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
704 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g030xx.h143 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
184 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
201 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
/hal_stm32-3.5.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h190 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
274 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
302 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
319 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
744 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32wle5xx.h190 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
274 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
302 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
319 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
744 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32wl54xx.h257 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
341 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
373 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
390 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
907 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32wl55xx.h257 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
341 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
373 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
390 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
907 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32wl5mxx.h257 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
341 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
373 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
390 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
907 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
/hal_stm32-3.5.0/stm32cube/stm32g4xx/soc/
Dstm32g471xx.h229 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: 0x300 + 0x… member
346 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
377 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
395 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
603 …__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset… member
912 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g4a1xx.h227 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: 0x300 + 0x… member
344 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
375 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
393 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
595 …__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset… member
904 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g491xx.h226 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: 0x300 + 0x… member
343 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
374 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
392 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
594 …__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset… member
903 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g483xx.h237 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: 0x300 + 0x… member
354 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
385 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
403 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
643 …__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset… member
952 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g473xx.h236 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: 0x300 + 0x… member
353 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
384 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
402 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
642 …__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset… member
951 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
Dstm32g431xx.h213 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: 0x300 + 0x… member
330 …__IO uint32_t CCR; /*!< DAC calibration control register, Address o… member
361 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
379 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
854 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
/hal_stm32-3.5.0/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h141 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
179 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
196 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
Dstm32c031xx.h141 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
179 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
196 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h206 …__IO uint32_t CCR; /*!< ADC common configuration register, Address offset: AD… member
257 __IO uint32_t CCR; /*!< DMA channel x configuration register 0x00 */ member
275 …__IO uint32_t CCR; /*!< DMA Multiplexer Channel x Control Register Address offset: 0x00… member
429 …__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset… member
599 …__IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 … member
/hal_stm32-3.5.0/stm32cube/stm32l1xx/soc/
Dstm32l151xb.h175 …__IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1… member
245 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
339 …__IO uint32_t CCR; /*!< I2C Clock control register, Address offset: 0x1C… member
Dstm32l151xba.h175 …__IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1… member
245 __IO uint32_t CCR; /*!< DMA channel x configuration register */ member
339 …__IO uint32_t CCR; /*!< I2C Clock control register, Address offset: 0x1C… member

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