1 /* 2 * Copyright (c) 2023 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /* Use the timer instance ID, not NRF_TIMERx directly, so that it can be checked 8 * in radio_nrf5_ppi.h by the preprocessor. 9 */ 10 #if defined(CONFIG_BT_CTLR_TIFS_HW) 11 #define EVENT_TIMER_ID 0 12 #define EVENT_TIMER _CONCAT(NRF_TIMER, EVENT_TIMER_ID) 13 14 /* Single timer feature not supported when using h/w tIFS switching */ 15 #define HAL_RADIO_ISR_LATENCY_MAX_US 0U 16 17 /* Wrapper for EVENTS_END event generated by Radio peripheral at the very end of the transmission 18 * or reception of a PDU on air. In case of regular PDU it is generated when last bit of CRC is 19 * received or transmitted. 20 */ 21 #define NRF_RADIO_TRX_END_EVENT EVENTS_END 22 23 /* Wrapper for RADIO_SHORTS mask connecting EVENTS_END to EVENTS_DISABLE. 24 * This is a default shortcut used to automatically disable Radio after end of PDU. 25 */ 26 #define NRF_RADIO_SHORTS_TRX_END_DISABLE_Msk HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk 27 28 #define HAL_EVENT_TIMER_TRX_CC_OFFSET 0 29 #define HAL_EVENT_TIMER_TRX_EVENT NRF_TIMER_EVENT_COMPARE0 30 31 #define HAL_EVENT_TIMER_HCTO_CC_OFFSET 1 32 #define HAL_EVENT_TIMER_TRX_END_CC_OFFSET 2 33 34 #define HAL_EVENT_TIMER_DEFERRED_TRX_CC_OFFSET 2 35 #define HAL_EVENT_TIMER_DEFERRED_TX_EVENT NRF_TIMER_EVENT_COMPARE2 36 37 #define HAL_EVENT_TIMER_SAMPLE_CC_OFFSET 3 38 #define HAL_EVENT_TIMER_SAMPLE_TASK NRF_TIMER_TASK_CAPTURE3 39 40 #define HAL_EVENT_TIMER_PA_LNA_CC_OFFSET 2 41 #define HAL_EVENT_TIMER_PA_LNA_PDN_CC_OFFSET 3 42 43 #else /* !CONFIG_BT_CTLR_TIFS_HW */ 44 #if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER) 45 #define EVENT_TIMER_ID 4 46 #define EVENT_TIMER _CONCAT(NRF_TIMER, EVENT_TIMER_ID) 47 48 #define SW_SWITCH_TIMER EVENT_TIMER 49 50 /* Radio ISR Latency to be considered with single timer used so that the PPI/ 51 * DPPI is disabled in time when the timer is cleared on radio end, so that 52 * the timer compare should not trigger TXEN/RXEN immediately on radio end. 53 */ 54 #define HAL_RADIO_ISR_LATENCY_MAX_US 150U 55 56 #if defined(CONFIG_BT_CTLR_PHY_CODED) 57 #define SW_SWITCH_TIMER_EVTS_COMP_BASE 3 58 #define SW_SWITCH_TIMER_EVTS_COMP_S2_BASE 5 59 60 /* Wrapper for EVENTS_END event generated by Radio peripheral at the very end of the transmission 61 * or reception of a PDU on air. In case of regular PDU it is generated when last bit of CRC is 62 * received or transmitted. 63 */ 64 #define NRF_RADIO_TRX_END_EVENT EVENTS_END 65 66 /* Wrapper for RADIO_SHORTS mask connecting EVENTS_END to EVENTS_DISABLE. 67 * This is a default shortcut used to automatically disable Radio after end of PDU. 68 */ 69 #define NRF_RADIO_SHORTS_TRX_END_DISABLE_Msk HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk 70 71 #define HAL_EVENT_TIMER_TRX_CC_OFFSET 0 72 #define HAL_EVENT_TIMER_TRX_EVENT NRF_TIMER_EVENT_COMPARE0 73 74 #define HAL_EVENT_TIMER_HCTO_CC_OFFSET 1 75 #define HAL_EVENT_TIMER_TRX_END_CC_OFFSET 2 76 77 #define HAL_EVENT_TIMER_DEFERRED_TRX_CC_OFFSET 2 78 #define HAL_EVENT_TIMER_DEFERRED_TX_EVENT NRF_TIMER_EVENT_COMPARE2 79 80 #define HAL_EVENT_TIMER_SAMPLE_CC_OFFSET 2 81 #define HAL_EVENT_TIMER_SAMPLE_TASK NRF_TIMER_TASK_CAPTURE2 82 83 #define HAL_EVENT_TIMER_PA_LNA_CC_OFFSET 2 84 #define HAL_EVENT_TIMER_PA_LNA_PDN_CC_OFFSET 3 85 86 #else /* !CONFIG_BT_CTLR_PHY_CODED */ 87 #define SW_SWITCH_TIMER_EVTS_COMP_BASE 4 88 89 /* Wrapper for EVENTS_END event generated by Radio peripheral at the very end of the transmission 90 * or reception of a PDU on air. In case of regular PDU it is generated when last bit of CRC is 91 * received or transmitted. 92 */ 93 #define NRF_RADIO_TRX_END_EVENT EVENTS_END 94 95 /* Wrapper for RADIO_SHORTS mask connecting EVENTS_END to EVENTS_DISABLE. 96 * This is a default shortcut used to automatically disable Radio after end of PDU. 97 */ 98 #define NRF_RADIO_SHORTS_TRX_END_DISABLE_Msk HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk 99 100 #define HAL_EVENT_TIMER_TRX_CC_OFFSET 0 101 #define HAL_EVENT_TIMER_TRX_EVENT NRF_TIMER_EVENT_COMPARE0 102 103 #define HAL_EVENT_TIMER_HCTO_CC_OFFSET 1 104 #define HAL_EVENT_TIMER_TRX_END_CC_OFFSET 2 105 106 #define HAL_EVENT_TIMER_DEFERRED_TRX_CC_OFFSET 2 107 #define HAL_EVENT_TIMER_DEFERRED_TX_EVENT NRF_TIMER_EVENT_COMPARE2 108 109 #define HAL_EVENT_TIMER_SAMPLE_CC_OFFSET 3 110 #define HAL_EVENT_TIMER_SAMPLE_TASK NRF_TIMER_TASK_CAPTURE3 111 112 #define HAL_EVENT_TIMER_PA_LNA_CC_OFFSET 2 113 #define HAL_EVENT_TIMER_PA_LNA_PDN_CC_OFFSET 3 114 #endif /* !CONFIG_BT_CTLR_PHY_CODED */ 115 116 #else /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */ 117 #define EVENT_TIMER_ID 0 118 #define EVENT_TIMER _CONCAT(NRF_TIMER, EVENT_TIMER_ID) 119 120 #define SW_SWITCH_TIMER NRF_TIMER1 121 122 /* When using dedicated timer used for tIFS switching, compensation to avoid 123 * spurious TXEN/RXEN due to timer being clear is not needed. 124 */ 125 #define HAL_RADIO_ISR_LATENCY_MAX_US 0U 126 127 #define SW_SWITCH_TIMER_EVTS_COMP_BASE 0 128 129 #if defined(CONFIG_BT_CTLR_PHY_CODED) 130 #define SW_SWITCH_TIMER_EVTS_COMP_S2_BASE 2 131 #endif /* !CONFIG_BT_CTLR_PHY_CODED */ 132 133 #if defined(CONFIG_BT_CTLR_DF) 134 135 #if defined(CONFIG_BT_CTLR_DF_PHYEND_OFFSET_COMPENSATION_ENABLE) 136 /* Allocate 2 adjacent channels for PHYEND delay compensation. Use the same channels as for 137 * PHY CODED S2. The CTEINLINE may not be enabled for PHY CODED so PHYEND event is generated 138 * at the same instant as END event. Hence the channels are used interchangeably. 139 * That saves from use of another timer. 140 */ 141 #define SW_SWITCH_TIMER_EVTS_COMP_PHYEND_DELAY_COMPENSATION_BASE 2 142 #endif /* CONFIG_BT_CTLR_DF_PHYEND_OFFSET_COMPENSATION_ENABLE */ 143 144 /* Wrapper for EVENTS_END event generated by Radio peripheral at the very end of the transmission 145 * or reception of a PDU on air. In case of regular PDU it is generated when last bit of CRC is 146 * received or transmitted. 147 * 148 * When direction finding is enabled a PDU may include Constant Tone Extension at its end. For PDU 149 * including CTE EVENTS_PHYEND event is generated at very end of a PDU. In case there is no CTE in 150 * a PDU the EVENTS_PHYEND event is generated in the same instant as EVENTS_END event. 151 */ 152 #define NRF_RADIO_TRX_END_EVENT EVENTS_PHYEND 153 154 /* Wrapper for RADIO_SHORTS mask connecting EVENTS_PHYEND to EVENTS_DISABLE. 155 * This is a mask for SOC that has Direction Finding Extension in a Radio peripheral. 156 * It enables shortcut for EVENTS_PHYEND event generated at very end to Radio EVENTS_DISABLE event. 157 * In case there is a CTE in a PDU then EVENTS_PHYEND event is generated after the CTE. 158 * If there is no CTE, it is generated in the same instant as EVENTS_END. 159 */ 160 #define NRF_RADIO_SHORTS_TRX_END_DISABLE_Msk HAL_RADIO_SHORTS_TRX_PHYEND_DISABLE_Msk 161 162 /* Delay of EVENTS_PHYEND event on receive PDU without CTE included when CTEINLINE is enabled */ 163 #define RADIO_EVENTS_PHYEND_DELAY_US 16 164 165 /* Delay of CCM TASKS_CRYPT start in number of bits for Radio Bit counter */ 166 #define CCM_TASKS_CRYPT_DELAY_BITS 3 167 168 #else /* !CONFIG_BT_CTLR_DF */ 169 /* Wrapper for EVENTS_END event generated by Radio peripheral at the very end of the transmission 170 * or reception of a PDU on air. In case of regular PDU it is generated when last bit of CRC is 171 * received or transmitted. 172 */ 173 #define NRF_RADIO_TRX_END_EVENT EVENTS_END 174 175 /* Wrapper for RADIO_SHORTS mask connecting EVENTS_END to EVENTS_DISABLE. 176 * This is a default shortcut used to automatically disable Radio after end of PDU. 177 */ 178 #define NRF_RADIO_SHORTS_TRX_END_DISABLE_Msk HAL_RADIO_SHORTS_TRX_END_DISABLE_Msk 179 #endif /* !CONFIG_BT_CTLR_DF */ 180 181 #define HAL_EVENT_TIMER_TRX_CC_OFFSET 0 182 #define HAL_EVENT_TIMER_TRX_EVENT NRF_TIMER_EVENT_COMPARE0 183 184 #define HAL_EVENT_TIMER_HCTO_CC_OFFSET 1 185 #define HAL_EVENT_TIMER_TRX_END_CC_OFFSET 2 186 187 #define HAL_EVENT_TIMER_DEFERRED_TRX_CC_OFFSET 2 188 #define HAL_EVENT_TIMER_DEFERRED_TX_EVENT NRF_TIMER_EVENT_COMPARE2 189 190 #define HAL_EVENT_TIMER_SAMPLE_CC_OFFSET 3 191 #define HAL_EVENT_TIMER_SAMPLE_TASK NRF_TIMER_TASK_CAPTURE3 192 193 #define HAL_EVENT_TIMER_PA_LNA_CC_OFFSET 2 194 #define HAL_EVENT_TIMER_PA_LNA_PDN_CC_OFFSET 3 195 #endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */ 196 #endif /* !CONFIG_BT_CTLR_TIFS_HW */ 197
