1 /* ieee802154_cc1200.h - Registers definition for TI CC1200 */
2
3 /*
4 * Copyright (c) 2017 Intel Corporation.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8
9 #ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC1200_H_
10 #define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC1200_H_
11
12 #include <zephyr/linker/sections.h>
13 #include <zephyr/sys/atomic.h>
14 #include <zephyr/drivers/gpio.h>
15 #include <zephyr/drivers/spi.h>
16
17 #include <zephyr/drivers/ieee802154/cc1200.h>
18
19 /* Compile time config structure
20 *******************************
21 */
22
23 /* Note for EMK & EM adapter booster pack users:
24 * SPI pins are easy, RESET as well, but when it comes to GPIO:
25 * CHIP -> EM adapter
26 * GPIO0 -> GPIOA
27 * GPIO1 -> reserved (it's SPI MISO)
28 * GPIO2 -> GPIOB
29 * GPIO3 -> GPIO3
30 */
31 struct cc1200_config {
32 struct spi_dt_spec bus;
33 struct gpio_dt_spec interrupt;
34 };
35
36 /* Runtime context structure
37 ***************************
38 */
39
40 struct cc1200_context {
41 struct net_if *iface;
42 /**************************/
43 struct gpio_callback rx_tx_cb;
44 uint8_t mac_addr[8];
45 /************RF************/
46 const struct cc1200_rf_registers_set *rf_settings;
47 /************TX************/
48 struct k_sem tx_sync;
49 atomic_t tx;
50 atomic_t tx_start;
51 /************RX************/
52 K_KERNEL_STACK_MEMBER(rx_stack,
53 CONFIG_IEEE802154_CC1200_RX_STACK_SIZE);
54 struct k_thread rx_thread;
55 struct k_sem rx_lock;
56 atomic_t rx;
57 };
58
59 #include "ieee802154_cc1200_regs.h"
60
61 /* Registers useful routines
62 ***************************
63 */
64
65 bool z_cc1200_access_reg(const struct device *dev, bool read, uint8_t addr,
66 void *data, size_t length, bool extended, bool burst);
67
cc1200_read_single_reg(const struct device * dev,uint8_t addr,bool extended)68 static inline uint8_t cc1200_read_single_reg(const struct device *dev,
69 uint8_t addr, bool extended)
70 {
71 uint8_t val;
72
73 if (z_cc1200_access_reg(dev, true, addr, &val, 1, extended, false)) {
74 return val;
75 }
76
77 return 0;
78 }
79
cc1200_write_single_reg(const struct device * dev,uint8_t addr,uint8_t val,bool extended)80 static inline bool cc1200_write_single_reg(const struct device *dev,
81 uint8_t addr, uint8_t val, bool extended)
82 {
83 return z_cc1200_access_reg(dev, false, addr, &val, 1, extended, false);
84 }
85
cc1200_instruct(const struct device * dev,uint8_t addr)86 static inline bool cc1200_instruct(const struct device *dev, uint8_t addr)
87 {
88 return z_cc1200_access_reg(dev, false, addr, NULL, 0, false, false);
89 }
90
91 #define DEFINE_REG_READ(__reg_name, __reg_addr, __ext) \
92 static inline uint8_t read_reg_##__reg_name(const struct device *dev) \
93 { \
94 return cc1200_read_single_reg(dev, __reg_addr, __ext); \
95 }
96
97 #define DEFINE_REG_WRITE(__reg_name, __reg_addr, __ext) \
98 static inline bool write_reg_##__reg_name(const struct device *dev, \
99 uint8_t val) \
100 { \
101 return cc1200_write_single_reg(dev, __reg_addr, \
102 val, __ext); \
103 }
104
105 DEFINE_REG_WRITE(iocfg3, CC1200_REG_IOCFG3, false)
106 DEFINE_REG_WRITE(iocfg2, CC1200_REG_IOCFG2, false)
107 DEFINE_REG_WRITE(iocfg0, CC1200_REG_IOCFG0, false)
108 DEFINE_REG_WRITE(pa_cfg1, CC1200_REG_PA_CFG1, false)
109 DEFINE_REG_WRITE(pkt_len, CC1200_REG_PKT_LEN, false)
110
111 DEFINE_REG_READ(fs_cfg, CC1200_REG_FS_CFG, false)
112 DEFINE_REG_READ(rssi0, CC1200_REG_RSSI0, true)
113 DEFINE_REG_READ(pa_cfg1, CC1200_REG_PA_CFG1, false)
114 DEFINE_REG_READ(num_txbytes, CC1200_REG_NUM_TXBYTES, true)
115 DEFINE_REG_READ(num_rxbytes, CC1200_REG_NUM_RXBYTES, true)
116
117
118 /* Instructions useful routines
119 ******************************
120 */
121
122 #define DEFINE_STROBE_INSTRUCTION(__ins_name, __ins_addr) \
123 static inline bool instruct_##__ins_name(const struct device *dev) \
124 { \
125 return cc1200_instruct(dev, __ins_addr); \
126 }
127
128 DEFINE_STROBE_INSTRUCTION(sres, CC1200_INS_SRES)
129 DEFINE_STROBE_INSTRUCTION(sfstxon, CC1200_INS_SFSTXON)
130 DEFINE_STROBE_INSTRUCTION(sxoff, CC1200_INS_SXOFF)
131 DEFINE_STROBE_INSTRUCTION(scal, CC1200_INS_SCAL)
132 DEFINE_STROBE_INSTRUCTION(srx, CC1200_INS_SRX)
133 DEFINE_STROBE_INSTRUCTION(stx, CC1200_INS_STX)
134 DEFINE_STROBE_INSTRUCTION(sidle, CC1200_INS_SIDLE)
135 DEFINE_STROBE_INSTRUCTION(safc, CC1200_INS_SAFC)
136 DEFINE_STROBE_INSTRUCTION(swor, CC1200_INS_SWOR)
137 DEFINE_STROBE_INSTRUCTION(spwd, CC1200_INS_SPWD)
138 DEFINE_STROBE_INSTRUCTION(sfrx, CC1200_INS_SFRX)
139 DEFINE_STROBE_INSTRUCTION(sftx, CC1200_INS_SFTX)
140 DEFINE_STROBE_INSTRUCTION(sworrst, CC1200_INS_SWORRST)
141 DEFINE_STROBE_INSTRUCTION(snop, CC1200_INS_SNOP)
142
143 #define CC1200_INVALID_RSSI INT8_MIN
144
145 #endif /* ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC1200_H_ */
146
