1 /*
2 * Copyright 2021-2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef CANEXCEL_IP_HWACCESS_H_
8 #define CANEXCEL_IP_HWACCESS_H_
9
10 /**
11 * @file CanEXCEL_Ip_HwAccess.h
12 *
13 * @addtogroup CanEXCEL
14 * @{
15 */
16
17 #ifdef __cplusplus
18 extern "C"{
19 #endif
20 /*==================================================================================================
21 * INCLUDE FILES
22 * 1) system and project includes
23 * 2) needed interfaces from external units
24 * 3) internal and external interfaces from this unit
25 ==================================================================================================*/
26 #include "CanEXCEL_Ip.h"
27 #include "Mcal.h"
28 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
29 #include "Devassert.h"
30 #endif
31 #include "SchM_Can_43_CANEXCEL.h"
32
33 /*==================================================================================================
34 * SOURCE FILE VERSION INFORMATION
35 ==================================================================================================*/
36 #define CANEXCEL_IP_HWACCESS_VENDOR_ID_H 43
37 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H 4
38 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H 7
39 #define CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_H 0
40 #define CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_H 1
41 #define CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_H 0
42 #define CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_H 0
43 /*==================================================================================================
44 * FILE VERSION CHECKS
45 ==================================================================================================*/
46 /* Check if current file and CanEXCEL_Ip.h are of the same vendor */
47 #if (CANEXCEL_IP_HWACCESS_VENDOR_ID_H != CANEXCEL_IP_VENDOR_ID_H)
48 #error "CanEXCEL_Ip_HwAccess.h and CanEXCEL_Ip.h have different vendor ids"
49 #endif
50 /* Check if current file and CanEXCEL_Ip.h are of the same Autosar version */
51 #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H != CANEXCEL_IP_AR_RELEASE_MAJOR_VERSION_H) || \
52 (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H != CANEXCEL_IP_AR_RELEASE_MINOR_VERSION_H) || \
53 (CANEXCEL_IP_HWACCESS_AR_RELEASE_REVISION_VERSION_H != CANEXCEL_IP_AR_RELEASE_REVISION_VERSION_H) \
54 )
55 #error "AutoSar Version Numbers of CanEXCEL_Ip_HwAccess.h and CanEXCEL_Ip.h are different"
56 #endif
57 /* Check if current file and CanEXCEL_Ip.h are of the same Software version */
58 #if ((CANEXCEL_IP_HWACCESS_SW_MAJOR_VERSION_H != CANEXCEL_IP_SW_MAJOR_VERSION_H) || \
59 (CANEXCEL_IP_HWACCESS_SW_MINOR_VERSION_H != CANEXCEL_IP_SW_MINOR_VERSION_H) || \
60 (CANEXCEL_IP_HWACCESS_SW_PATCH_VERSION_H != CANEXCEL_IP_SW_PATCH_VERSION_H) \
61 )
62 #error "Software Version Numbers of CanEXCEL_Ip_HwAccess.h and CanEXCEL_Ip.h are different"
63 #endif
64
65 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
66 /* Check if current file and Mcal.h header file are of the same version */
67 #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H != MCAL_AR_RELEASE_MAJOR_VERSION) || \
68 (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H != MCAL_AR_RELEASE_MINOR_VERSION) \
69 )
70 #error "Software Version Numbers of CanEXCEL_Ip_HwAccess.h and Mcal.h are different"
71 #endif
72
73 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
74 /* Check if current file and Devassert.h header file are of the same version */
75 #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
76 (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H != DEVASSERT_AR_RELEASE_MINOR_VERSION) \
77 )
78 #error "Software Version Numbers of CanEXCEL_Ip_HwAccess.h and Devassert.h are different"
79 #endif
80 #endif
81
82 /* Check if current file and SchM_Can_43_CANEXCEL.h header file are of the same version */
83 #if ((CANEXCEL_IP_HWACCESS_AR_RELEASE_MAJOR_VERSION_H != SCHM_CAN_43_CANEXCEL_AR_RELEASE_MAJOR_VERSION) || \
84 (CANEXCEL_IP_HWACCESS_AR_RELEASE_MINOR_VERSION_H != SCHM_CAN_43_CANEXCEL_AR_RELEASE_MINOR_VERSION) \
85 )
86 #error "AUTOSAR Version Numbers of CanEXCEL_Ip_HwAccess.c and SchM_Can_43_CANEXCEL.h are different"
87 #endif
88 #endif
89
90 /*==================================================================================================
91 * DEFINES AND MACROS
92 ==================================================================================================*/
93
94 #define CANXL_IP_ID_EXT_MASK (0x1FFFFFFFU)
95 #define CANXL_IP_ID_EXT_SHIFT 0
96 #define CANXL_IP_ID_EXT_WIDTH 18
97 #define CANXL_IP_ID_STD_MASK 0x1FFC0000u
98 #define CANXL_IP_ID_STD_SHIFT 18
99 #define CANXL_IP_ID_STD_WIDTH 11
100
101
102 #define CANXL_TX_HEADER_MODE_MASK 0x80000000u
103 #define CANXL_TX_HEADER_MODE_SHIFT 31
104 #define CANXL_TX_HEADER_PRIO_MASK 0x0F000000u
105 #define CANXL_TX_HEADER_PRIO_SHIFT 24
106 #define CANXL_TX_HEADER_RETR_MASK 0x70000u
107 #define CANXL_TX_HEADER_RETR_SHIFT 16
108 #define CANXL_TX_HEADER_RTR_MASK 0x80000000u
109 #define CANXL_TX_HEADER_RTR_SHIFT 31
110 #define CANXL_TX_HEADER_IDE_MASK 0x40000000u
111 #define CANXL_TX_HEADER_IDE_SHIFT 30
112 #define CANXL_TX_HEADER_IDE_WIDTH 1
113 #define CANXL_TX_HEADER_XLF_MASK 0x20000000u
114 #define CANXL_TX_HEADER_XLF_SHIFT 29
115 #define CANXL_TX_HEADER_XLF_WIDTH 1
116 #define CANXL_TX_HEADER_FDF_MASK 0x80000000u
117 #define CANXL_TX_HEADER_FDF_SHIFT 31
118 #define CANXL_TX_HEADER_FDF_WIDTH 1
119 #define CANXL_TX_HEADER_BRS_MASK 0x20000000u
120 #define CANXL_TX_HEADER_BRS_SHIFT 29
121 #define CANXL_TX_HEADER_BRS_WIDTH 1
122 #define CANXL_TX_HEADER_XLF_MASK 0x20000000u
123 #define CANXL_TX_HEADER_XLF_SHIFT 29
124 #define CANXL_TX_HEADER_XLF_WIDTH 1
125 #define CANXL_TX_HEADER_SDT_MASK 0x0FF00000u
126 #define CANXL_TX_HEADER_SDT_SHIFT 20
127 #define CANXL_TX_HEADER_SDT_WIDTH 8
128 #define CANXL_TX_HEADER_DLC_MASK 0x7FF00u
129 #define CANXL_TX_HEADER_DLC_SHIFT 8
130 #define CANXL_TX_HEADER_DLC_WIDTH 11
131
132 #define CANXL_MRU_MBOX0 0x0u
133 #define CANXL_MRU_MBOX1 0x1u
134 #define CANXL_MRU_MBOX2 0x2u
135 #define CANXL_MRU_MBOX3 0x3u
136
137 #define CANXL_MRU_CMD_BUSOFF 0x0u
138 #define CANXL_MRU_CMD_READ_EC 0x4u
139 #define CANXL_MRU_CMD_READ_ST 0x5u
140 #define CANXL_MRU_CMD_READ_TDCS 0x6u
141 #define CANXL_MRU_CMD_WRITE_TDCS 0x7u
142
143 #define BCANXL_EC_TEC_MASK (0xFF00u)
144 #define BCANXL_EC_TEC_SHIFT (8u)
145 #define BCANXL_EC_TEC_WIDTH (8u)
146
147 #define BCANXL_EC_REC_MASK (0xFFu)
148 #define BCANXL_EC_REC_SHIFT (0u)
149 #define BCANXL_EC_REC_WIDTH (8u)
150
151 #define BCANXL_ST_FLTCONF_MASK (0x0Cu)
152 #define BCANXL_ST_FLTCONF_SHIFT (2u)
153 #define BCANXL_ST_FLTCONF_WIDTH (2u)
154 /*==================================================================================================
155 * ENUMS
156 ==================================================================================================*/
157
158 /*! @brief CANXL error interrupt types
159 */
160 typedef enum
161 {
162 CANXL_INT_FREEZE = CANXL_SIC_SYSIE_FRZACKIE_MASK, /*!< Un\Freeze Ack Interrupt */
163 CANXL_INT_RX_WARNING = CANXL_SIC_SYSIE_CRXWRNIE_MASK, /*!< RX warning interrupt*/
164 CANXL_INT_TX_WARNING = CANXL_SIC_SYSIE_CTXWRNIE_MASK, /*!< TX warning interrupt*/
165 CANXL_INT_INT_ERR = CANXL_SIC_SYSIE_IERRIE_MASK, /*!< Internal Error Interrupt */
166 CANXL_INT_PASIVE_ERR = CANXL_SIC_SYSIE_CPERRIE_MASK, /*!< Passive Error Interrupt */
167 CANXL_INT_ERR = CANXL_SIC_SYSIE_CERRIE_MASK, /*!< Bus Error interrupt*/
168 CANXL_INT_ERR_FAST = CANXL_SIC_SYSIE_CFDPERRIE_MASK, /*!< Error Fast interrupt*/
169 CANXL_INT_ERR_XL = CANXL_SIC_SYSIE_CDPERRIE_MASK, /*!< Error XL Interrupt */
170 CANXL_INT_BUSOFF_DONE = CANXL_SIC_SYSIE_CBDONEIE_MASK, /*!< Error BusOff Done Interrupt */
171 CANXL_INT_BUSOFF = CANXL_SIC_SYSIE_CBOFFIE_MASK, /*!< Bus off interrupt*/
172 CANXL_INT_RXSMB_OVER = CANXL_SIC_SYSIE_CRXSOERRIE_MASK, /*!< RX SMB Overrun Error Interrupt*/
173 CANXL_INT_MD_UNDER = CANXL_SIC_SYSIE_CMDUERRIE_MASK, /*!< MD Underrun Error Interrupt */
174 CANXL_INT_MD_OVER = CANXL_SIC_SYSIE_CMDOERRIE_MASK, /*!< MD Overrun Error Interrupt */
175 CANXL_INT_LOM = CANXL_SIC_SYSIE_CLSERRIE_MASK, /*!< LOM State Error Interrupt */
176 CANXL_INT_RXFIFO_OVER = CANXL_SIC_SYSIE_CRFOERRIR_MASK, /*!< RX FIFO Overflow Interrupt */
177 CANXL_INT_TXFIFO_UNDER= CANXL_SIC_SYSIE_CTFOERRIR_MASK /*!< TX FIFO Underflow Interrupt */
178 } canxl_int_type_t;
179
180 /*==================================================================================================
181 * FUNCTION PROTOTYPES
182 ==================================================================================================*/
183 /*!
184 * @brief Set the Message Descriptors Queue Depths and WaterMark Levels
185 *
186 * @param base The CanXL MSG Grup Control base address
187 * @param pConfigs Pointer to Configuration Structure for Message Descriptors Depths and WaterMarks
188 */
189 void CanXL_SetMDQueueConfigs(CANXL_GRP_CONTROL_Type * base, const Canexcel_Ip_QueueConf * pConfigs);
190 /*!
191 * @brief Return the Message Descriptor Queue Depth
192 *
193 * @param base The CanXL MSG Grup Control base address
194 * @param MDindex Index of the message descriptor
195 * @return The Value of the Queue Depth
196 */
197 uint8 CanXL_GetMDQueueDepth(const CANXL_GRP_CONTROL_Type * base, const uint8 MDindex);
198 /*!
199 * @brief Enable Error Interrupt type
200 *
201 * @param base The CanXL SIC base address
202 * @param errType Error type
203 * @param enable Enable\Disable Interrupt
204 */
205 void CanXL_SetErrIntCmd(CANXL_SIC_Type * base, canxl_int_type_t errType, boolean enable);
206 /*!
207 * @brief Copy the data in the Tx Message Buffer location, based on the frame length
208 *
209 * @param info The Frame Information Parameters as length, frame type
210 * @param data Pointer to Data to be transmit
211 * @param MB Pointer to the Message Buffer Ram Location
212 */
213 void CanXL_SetTxMsgBuffData(const Canexcel_Ip_DataInfoType * info, const uint8 * data, uint8 * MB);
214 /*!
215 * @brief Disable interrupt for all Message Descriptors
216 *
217 * @param base The CanXL Grup Control base address
218 */
219 void CanXL_ResetImaskBuff(CANXL_GRP_CONTROL_Type * base);
220 /*!
221 * @brief Execute Controller SoftReset action
222 *
223 * @param base The CanXL SIC base address
224 * @return CANEXCEL_STATUS_SUCCESS request was accepted,
225 * CANEXCEL_STATUS_TIMEOUT request fail
226 */
227 Canexcel_Ip_StatusType CanXL_SoftReset(CANXL_SIC_Type * base);
228 /*!
229 * @brief Calculate the DLC code Value for the payload length
230 *
231 * @param payloadSize The frame payload size in bytes
232 * @return The DLC Code Value
233 */
234 uint8 CAN_ComputeDLCValue(uint8 payloadSize);
235 /*!
236 * @brief Clears and initilize all RAM area used by CANEXCEL Peripheral
237 *
238 * @param CANXL The CANXL colection of base addresses for periperals embbeded in CANEXCEL
239 * @param instance The CanXL Instance Number
240 */
241 void CanXL_ClearRAM(const CANEXCEL_StructType * CANXL, uint8 instance);
242 /*!
243 * @brief Return the Contol Lock status for Message Descriptor
244 *
245 * @param base The CanXL Message Descriptor Control base address
246 * @return CANEXCEL_DESCNTSTATUS_UNLOCKED Descriptor is unlocked,
247 * CANEXCEL_DESCNTSTATUS_LOCKED_HW Descriptor is lock by HW,
248 CANEXCEL_DESCNTSTATUS_LOCKED_SYS Descriptor is lock by Driver,
249 CANEXCEL_DESCNTSTATUS_INVALID Descriptor Status is Invalid.
250 */
251 void CanXL_SetOperationMode(CANXL_SIC_Type * base, Canexcel_Ip_ModesType mode);
252 /*!
253 * @brief Return the Contol Lock status for Message Descriptor
254 *
255 * @param base The CanXL Message Descriptor Control base address
256 * @return CANEXCEL_DESCNTSTATUS_UNLOCKED Descriptor is unlocked,
257 * CANEXCEL_DESCNTSTATUS_LOCKED_HW Descriptor is lock by HW,
258 CANEXCEL_DESCNTSTATUS_LOCKED_SYS Descriptor is lock by Driver,
259 CANEXCEL_DESCNTSTATUS_INVALID Descriptor Status is Invalid.
260 */
261 Canexcel_Ip_DesCntStatus CanXL_GetDescControlStatus(const CANXL_DSC_CONTROL_Type * base, uint8 descNo);
262 /*!
263 * @brief Set contoller to FreezeMode
264 *
265 * @param base The CanXL SIC base address
266 * @return CANEXCEL_STATUS_SUCCESS request was accepted,
267 * CANEXCEL_STATUS_TIMEOUT request fail
268 */
269 Canexcel_Ip_StatusType CanXL_EnterFreezeMode(CANXL_SIC_Type * base);
270 /*!
271 * @brief Remove contoller from FreezeMode to RunMode
272 *
273 * @param base The CanXL SIC base address
274 * @return CANEXCEL_STATUS_SUCCESS request was accepted,
275 * CANEXCEL_STATUS_TIMEOUT request fail
276 */
277 Canexcel_Ip_StatusType CanXL_ExitFreezeMode(CANXL_SIC_Type * base);
278 /*!
279 * @brief Configure controller depending options like protocol exception, autobus Off Recovery
280 *
281 * @param base The CanXL SIC base address
282 * @param u32Options Controller Options encoding based on bit position
283 * @return CANEXCEL_STATUS_SUCCESS if configuration was succefully set.
284 * CANEXCEL_STATUS_ERROR configuration is not allowed.
285 */
286 Canexcel_Ip_StatusType CanXL_ConfigCtrlOptions(CANXL_SIC_Type * base, uint32 u32Options);
287 /*!
288 * @brief Disable config Interrupts on HW
289 *
290 * @param base The CanXL SIC base address
291 */
292 void CanXL_DisableInterrupts(CANXL_SIC_Type * base);
293 /*!
294 * @brief Enable config Interrupts on HW
295 *
296 * @param base The CanXL SIC base address
297 */
298 void CanXL_EnableInterrupts(CANXL_SIC_Type * base);
299
300 #if (CANEXCEL_IP_HAS_TS_ENABLE == STD_ON)
301 /*!
302 * @brief Set the corresponding Timestamp Configuration TimeBase Selector
303 *
304 * @param base The CanXL TimebaseSelector Grup Control base address
305 * @param type Position in frame for timestamp capture point
306 */
CanXL_SetTimeBaseSource(CAN_TBS_Type * base,Canexcel_Ip_TimeBaseSelType type)307 static inline void CanXL_SetTimeBaseSource(CAN_TBS_Type * base, Canexcel_Ip_TimeBaseSelType type)
308 {
309 base->CAN_TS_SEL |= CAN_TBS_CAN_TS_SEL_TS_SEL(type);
310 }
311 /*!
312 * @brief Set the corresponding Timestamp Configuration Capture point from the frame
313 *
314 * @param base The CanXL MSG Grup Control base address
315 * @param type Position in frame for timestamp capture point
316 */
CanXL_SetTimeStampCaputre(CANXL_SIC_Type * base,Canexcel_Ip_TimeStampCaptureType type)317 static inline void CanXL_SetTimeStampCaputre(CANXL_SIC_Type * base, Canexcel_Ip_TimeStampCaptureType type)
318 {
319 base->BCFG2 |= CANXL_SIC_BCFG2_TSCAP(type);
320 }
321 #endif /* (CANEXCEL_IP_HAS_TS_ENABLE == STD_ON) */
322 /*!
323 * @brief Set the corresponding Message Descriptor interrupt
324 *
325 * @param base The CanXL MSG Grup Control base address
326 * @param mb_idx Index of the message descriptor
327 */
CanXL_SetMsgBuffIntCmd(CANXL_GRP_CONTROL_Type * base,uint32 msgBuffIdx)328 static inline void CanXL_SetMsgBuffIntCmd(CANXL_GRP_CONTROL_Type * base, uint32 msgBuffIdx)
329 {
330 uint8 ImaskCnt = (uint8)(msgBuffIdx/32U) ;
331 /* Enable the corresponding message buffer Interrupt */
332 uint32 temp = 1UL << (msgBuffIdx % 32U);
333 SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_04();
334 base->MSGIMASK[ImaskCnt] |= temp;
335 SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_04();
336 }
337 /*!
338 * @brief Disable the corresponding Message Descriptor interrupt
339 *
340 * @param base The CanXL MSG Grup Control base address
341 * @param mb_idx Index of the message descriptor
342 */
CanXL_ClearMsgBuffIntCmd(CANXL_GRP_CONTROL_Type * base,uint32 mb_idx)343 static inline void CanXL_ClearMsgBuffIntCmd(CANXL_GRP_CONTROL_Type * base, uint32 mb_idx )
344 {
345 uint8 ImaskCnt = (uint8)(mb_idx/32U) ;
346 /* Enable the corresponding message buffer Interrupt */
347 uint32 temp = 1UL << (mb_idx % 32U);
348 SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_13();
349 base->MSGIMASK[ImaskCnt] &= (~temp);
350 SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_13();
351 }
352
353 /*!
354 * @brief Clears the interrupt flag of the message descriptor.
355 *
356 * @param base The CanXL MSG Grup Control base address
357 * @param msgBuffIdx Index of the message descriptor
358 */
CanXL_ClearMsgDescIntStatusFlag(CANXL_GRP_CONTROL_Type * base,uint32 msgBuffIdx)359 static inline void CanXL_ClearMsgDescIntStatusFlag(CANXL_GRP_CONTROL_Type * base, uint32 msgBuffIdx)
360 {
361 uint32 flag = ((uint32)1U << (msgBuffIdx % 32U));
362 uint8 ImaskCnt = (uint8)(msgBuffIdx/32U);
363 base->MSGIFLAG[ImaskCnt] = flag;
364 }
365 /*!
366 * @brief Gets the individual CanXL MD interrupt flag.
367 *
368 * @param base The CanEXCEL Decriptor Control base address
369 * @param msgBuffIdx Index of the message descriptor
370 * @return The individual Message Descriptor interrupt flag (0 and 1 are the flag value)
371 */
CanXL_GetMsgDescIntStatusFlag(const CANXL_GRP_CONTROL_Type * base,uint32 msgBuffIdx)372 static inline uint8 CanXL_GetMsgDescIntStatusFlag(const CANXL_GRP_CONTROL_Type * base, uint32 msgBuffIdx)
373 {
374 /* TODO: This need to be protected multithread access*/
375 uint8 flag = 0;
376 uint8 ImaskCnt = (uint8)(msgBuffIdx/32U);
377 flag = (uint8)((((uint32)base->MSGIFLAG[ImaskCnt] & ((uint32)1U << (msgBuffIdx % 32U))) >> (msgBuffIdx % 32U)) & 1U);
378 return flag;
379 }
380 /*!
381 * @brief Gets the individual CanXL MB interrupt flag.
382 *
383 * @param base The CanEXCEL Decriptor Control base address
384 * @param msgBuffIdx Index of the message descriptor
385 * @return The individual Message Descriptor interrupt flag (0 and 1 are the flag value)
386 */
CanXL_GetMsgBuffIntStatusFlag(const CANXL_GRP_CONTROL_Type * base,uint32 msgBuffIdx)387 static inline uint8 CanXL_GetMsgBuffIntStatusFlag(const CANXL_GRP_CONTROL_Type * base, uint32 msgBuffIdx)
388 {
389 /* TODO: This need to be protected multithread access*/
390 uint8 flag = 0;
391 uint32 mask;
392 uint8 ImaskCnt = (uint8)(msgBuffIdx/32U);
393
394 if (msgBuffIdx < 32U)
395 {
396 mask = base->MSGIMASK[ImaskCnt];
397 flag = (uint8)(((base->MSGIFLAG[ImaskCnt] & mask) >> (msgBuffIdx % 32U)) & 1U);
398 }
399 return flag;
400 }
401
402 /*!
403 * @brief Check if controller is in freeze mode or not.
404 *
405 * @param base The CanEXCEL base address
406 * @return TRUE if controller is in freeze mode
407 * FALSE if controller is not in freeze mode
408 */
CanXL_IsFreezeMode(const CANXL_SIC_Type * base)409 static inline boolean CanXL_IsFreezeMode(const CANXL_SIC_Type * base)
410 {
411 return ( ( ( (base->SYSMC & CANXL_SIC_SYSMC_FRZREQ_MASK) & (base->SYSS & CANXL_SIC_SYSS_FRZACKF_MASK) ) != 0U )? TRUE : FALSE);
412 }
413
414 /*!
415 * @brief Check if controller is in FD mode or not.
416 *
417 * @param base The CanEXCEL base address
418 * @return TRUE if controller is in FD mode
419 * FALSE if controller is not in FD mode
420 */
CanXL_IsFDModeEnabled(const CANXL_SIC_Type * base)421 static inline boolean CanXL_IsFDModeEnabled(const CANXL_SIC_Type * base)
422 {
423 return (((base->BCFG2 & (CANXL_SIC_BCFG2_FDEN_MASK)) != 0U) ? TRUE : FALSE);
424 }
425
426 /*!
427 * @brief Check if controller is in XL mode or not.
428 *
429 * @param base The CanEXCEL base address
430 * @return TRUE if controller is in XL mode
431 * FALSE if controller is not in XL mode
432 */
CanXL_IsXLModeEnabled(const CANXL_SIC_Type * base)433 static inline boolean CanXL_IsXLModeEnabled(const CANXL_SIC_Type * base)
434 {
435 return (((base->BCFG2 & (CANXL_SIC_BCFG2_XLEN_MASK)) != 0U) ? TRUE : FALSE);
436 }
437 /*!
438 * @brief Return Descriptor State.
439 *
440 * @param base The CanEXCEL base address
441 * @param descNo Index of the message descriptor
442 * @return The drescriptor state based on states
443 * enumerated by Canexcel_Ip_DescState type
444 */
CanXL_GetDesciptorState(const CANXL_DSC_CONTROL_Type * base,uint8 descNo)445 static inline Canexcel_Ip_DescState CanXL_GetDesciptorState(const CANXL_DSC_CONTROL_Type * base, uint8 descNo)
446 {
447 Canexcel_Ip_DescState retval;
448 switch (base->DSCMBCTRLAR[descNo].STA.DCSTA & CANXL_DSC_CONTROL_DCSTA_STATE_MASK)
449 {
450 case 0u:
451 retval = CANEXCEL_DESC_STATE_INACTIVE;
452 break;
453 case 1u:
454 retval = CANEXCEL_DESC_STATE_EMPTY;
455 break;
456 case 2u:
457 retval = CANEXCEL_DESC_STATE_NOTFULL;
458 break;
459 case 3u:
460 retval = CANEXCEL_DESC_STATE_FULL;
461 break;
462 default:
463 retval = CANEXCEL_DESC_STATE_OVERRUN;
464 break;
465 }
466 return retval;
467 }
468 /*!
469 * @brief Return Descriptor Status of Hw Index
470 *
471 * @param base The CanEXCEL base address
472 * @param descNo Index of the message descriptor
473 * @return The drescriptor HW index Value
474 */
CanXL_GetDesciptorHWIndex(const CANXL_DSC_CONTROL_Type * base,uint8 descNo)475 static inline uint8 CanXL_GetDesciptorHWIndex(const CANXL_DSC_CONTROL_Type * base, uint8 descNo)
476 {
477 return (uint8)((base->DSCMBCTRLAR[descNo].STA.DCSTA & CANXL_DSC_CONTROL_DCSTA_HWPOINTER_MASK) >> CANXL_DSC_CONTROL_DCSTA_HWPOINTER_SHIFT);
478 }
479 /*!
480 * @brief Return Descriptor Status of System Index
481 *
482 * @param base The CanEXCEL base address
483 * @param descNo Index of the message descriptor
484 * @return The drescriptor System index Value
485 */
CanXL_GetDesciptorSysIndex(const CANXL_DSC_CONTROL_Type * base,uint8 descNo)486 static inline uint8 CanXL_GetDesciptorSysIndex(const CANXL_DSC_CONTROL_Type * base, uint8 descNo)
487 {
488 return (uint8)((base->DSCMBCTRLAR[descNo].STA.DCSTA & CANXL_DSC_CONTROL_DCSTA_SYSPOINTER_MASK) >> CANXL_DSC_CONTROL_DCSTA_SYSPOINTER_SHIFT);
489 }
490 /*!
491 * @brief Enables/Disables the Self Reception feature.
492 *
493 * If enabled, CanExcel is allowed to receive frames transmitted by itself.
494 *
495 * @param base The CanExcel SIC base address
496 * @param enable Enable/Disable Self Reception
497 */
CanXL_SetSelfReception(CANXL_SIC_Type * base,boolean enable)498 static inline void CanXL_SetSelfReception(CANXL_SIC_Type * base,
499 boolean enable)
500 {
501 base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_SRXEN_MASK) | CANXL_SIC_BCFG2_SRXEN(enable ? 1UL : 0UL);
502 }
503
504 /*!
505 * @brief Checks if the listen only mode is enabled.
506 *
507 * @param base The FlexCAN base address
508 * @return TRUE if enabled; FALSE if disabled
509 */
CanXL_IsListenOnlyModeEnabled(const CANXL_SIC_Type * base)510 static inline boolean CanXL_IsListenOnlyModeEnabled(const CANXL_SIC_Type * base)
511 {
512 return (((base->BCFG2 & (CANXL_SIC_BCFG2_LOM_MASK)) != 0U) ? TRUE : FALSE);
513 }
514
515 /*!
516 * @brief Enables/Disables Listen Only Mode
517 *
518 * @param base The CanXL SIC base address
519 * @param enable TRUE to enable; FALSE to disable
520 */
CanXL_SetListenOnlyMode(CANXL_SIC_Type * base,boolean enable)521 static inline void CanXL_SetListenOnlyMode(CANXL_SIC_Type * base, boolean enable)
522 {
523 SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_05();
524 base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_LOM_MASK) | CANXL_SIC_BCFG2_LOM(enable ? 1UL : 0UL);
525 SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_05();
526 }
527
528 /*!
529 * @brief Enables/Disables Flexible Data rate (if supported).
530 *
531 * @param base The CanXL SIC base address
532 * @param enable TRUE to enable; FALSE to disable
533 */
CanXL_SetFDEnabled(CANXL_SIC_Type * base,boolean enableFD,boolean enableBRS)534 static inline void CanXL_SetFDEnabled(CANXL_SIC_Type * base,
535 boolean enableFD,
536 boolean enableBRS
537 )
538 {
539 SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00();
540 base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_FDEN_MASK) | CANXL_SIC_BCFG2_FDEN(enableFD ? 1UL : 0UL);
541 /* Enable BitRate Switch support */
542 base->BCFG1 = (base->BCFG1 & ~CANXL_SIC_BCFG1_FDRSDIS_MASK) | CANXL_SIC_BCFG1_FDRSDIS(enableBRS ? 0UL : 1UL);
543 /* Disable Transmission Delay Compensation by default */
544 base->BTDCC &= ~(CANXL_SIC_BTDCC_FTDCEN_MASK | CANXL_SIC_BTDCC_FTDCOFF_MASK);
545 SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00();
546 }
547
548 /*!
549 * @brief Enables/Disables XL Frame Support
550 *
551 * @param base The CanXL SIC base address
552 * @param enable TRUE to enable; FALSE to disable
553 */
CanXL_SetXLEnable(CANXL_SIC_Type * base,boolean enableXL)554 static inline void CanXL_SetXLEnable(CANXL_SIC_Type * base,
555 boolean enableXL
556 )
557 {
558 SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_14();
559 base->BCFG2 = (base->BCFG2 & ~CANXL_SIC_BCFG2_XLEN_MASK) | CANXL_SIC_BCFG2_XLEN(enableXL ? 1UL : 0UL);
560 /* Disable Transmission Delay Compensation by default */
561 base->BTDCC &= ~(CANXL_SIC_BTDCC_XTDCEN_MASK | CANXL_SIC_BTDCC_XTDCOFF_MASK);
562 SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_14();
563 }
564
565 /*!
566 * @brief Sets the CanEXCEL FD time segments for setting up data bit rate.
567 *
568 * @param base The CanEXCEL base address
569 * @param timeSeg CanEXCEL time segments, which need to be set for the bit rate.
570 */
CanXL_SetFDBaudRate(CANXL_SIC_Type * base,const Canexcel_Ip_TimeSegmentType * timeSeg)571 static inline void CanXL_SetFDBaudRate(CANXL_SIC_Type * base, const Canexcel_Ip_TimeSegmentType * timeSeg)
572 {
573 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
574 DevAssert(timeSeg != NULL_PTR);
575 #endif
576 (base->BFDCBT) = 0U;
577
578 (base->BFDCBT) = (CANXL_SIC_BFDCBT_FTSEG1(timeSeg->phaseSeg1 + timeSeg->propSeg) |
579 CANXL_SIC_BFDCBT_FTSEG2(timeSeg->phaseSeg2) |
580 CANXL_SIC_BFDCBT_FRJW(timeSeg->rJumpwidth)
581 );
582 }
583
584 /*!
585 * @brief Sets the CanEXCEL XL time segments for setting up data bit rate.
586 *
587 * @param base The CanEXCEL base address
588 * @param timeSeg CanEXCEL time segments, which need to be set for the bit rate.
589 */
CanXL_SetXLBaudRate(CANXL_SIC_Type * base,const Canexcel_Ip_TimeSegmentType * timeSeg)590 static inline void CanXL_SetXLBaudRate(CANXL_SIC_Type * base, const Canexcel_Ip_TimeSegmentType * timeSeg)
591 {
592 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
593 DevAssert(timeSeg != NULL_PTR);
594 #endif
595 (base->BXDCBT) = 0U;
596
597 (base->BXDCBT) = (CANXL_SIC_BXDCBT_XTSEG1(timeSeg->phaseSeg1 + timeSeg->propSeg) |
598 CANXL_SIC_BXDCBT_XTSEG2(timeSeg->phaseSeg2) |
599 CANXL_SIC_BXDCBT_XRJW(timeSeg->rJumpwidth)
600 );
601 }
602
603 /*!
604 * @brief Sets the CanEXCEL nominal time segments for setting up data bit rate.
605 *
606 * @param base The CanEXCEL base address
607 * @param timeSeg CanEXCEL time segments, which need to be set for the bit rate.
608 */
CanXL_SetBaudRate(CANXL_SIC_Type * base,const Canexcel_Ip_TimeSegmentType * timeSeg)609 static inline void CanXL_SetBaudRate(CANXL_SIC_Type * base, const Canexcel_Ip_TimeSegmentType * timeSeg)
610 {
611 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
612 DevAssert(timeSeg != NULL_PTR);
613 #endif
614 (base->BNCBT) = 0U;
615 (base->BBPRS) = 0U;
616
617 (base->BBPRS) = CANXL_SIC_BBPRS_PRESDIV(timeSeg->preDivider);
618 (base->BNCBT) = ( CANXL_SIC_BNCBT_NTSEG1(timeSeg->phaseSeg1 + timeSeg->propSeg) |
619 CANXL_SIC_BNCBT_NTSEG2(timeSeg->phaseSeg2) |
620 CANXL_SIC_BNCBT_NRJW(timeSeg->rJumpwidth)
621 );
622 }
623
624 /*!
625 * @brief Enable/disable TDC and TDCM and TDC offset for FD phase
626 *
627 */
CanXL_SetTDCOffsetFD(CANXL_SIC_Type * base,boolean TDCEnable,boolean TDCMEnable,uint8 Offset)628 static inline void CanXL_SetTDCOffsetFD(CANXL_SIC_Type * base, boolean TDCEnable, boolean TDCMEnable, uint8 Offset)
629 {
630 SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_10();
631 base->BTDCC &= ~(CANXL_SIC_BTDCC_FTDCEN_MASK | CANXL_SIC_BTDCC_FTDMDIS_MASK | CANXL_SIC_BTDCC_FTDCOFF_MASK);
632 base->BTDCC |= (CANXL_SIC_BTDCC_FTDCEN(TDCEnable ? 1UL : 0UL) | CANXL_SIC_BTDCC_FTDMDIS(TDCMEnable ? 1UL : 0UL) | CANXL_SIC_BTDCC_FTDCOFF(Offset));
633 SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_10();
634 }
635
636 /*!
637 * @brief Enable/disable TDC and TDCM and TDC offset for XL phase
638 *
639 */
CanXL_SetTDCOffsetXL(CANXL_SIC_Type * base,boolean TDCEnable,boolean TDCMEnable,uint8 Offset)640 static inline void CanXL_SetTDCOffsetXL(CANXL_SIC_Type * base, boolean TDCEnable, boolean TDCMEnable, uint8 Offset)
641 {
642 SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_11();
643 base->BTDCC &= ~(CANXL_SIC_BTDCC_XTDCEN_MASK | CANXL_SIC_BTDCC_XTDMDIS_MASK | CANXL_SIC_BTDCC_XTDCOFF_MASK);
644 base->BTDCC |= (CANXL_SIC_BTDCC_XTDCEN(TDCEnable ? 1UL : 0UL) | CANXL_SIC_BTDCC_XTDMDIS(TDCMEnable ? 1UL : 0UL) | CANXL_SIC_BTDCC_XTDCOFF(Offset));
645 SchM_Exit_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_11();
646 }
647 /*!
648 * @brief Enables/Disables Error Response
649 *
650 * @param Base The CanXL SIC base address
651 * @param Enable TRUE to signalize errors as protocol exception; FALSE to signalize errors with Error frames
652 */
CanXL_SetXLErrorResponse(CANXL_SIC_Type * Base,boolean Enable)653 static inline void CanXL_SetXLErrorResponse(CANXL_SIC_Type * Base, boolean Enable)
654 {
655 Base->BCFG2 = (Base->BCFG2 & ~CANXL_SIC_BCFG2_XLER_MASK) | CANXL_SIC_BCFG2_XLER(Enable ? 1UL : 0UL);
656 }
657 /*!
658 * @brief Enables/Disables PWM mode
659 *
660 * @param Base The CanXL SIC base address
661 * @param Enable TRUE to enable; FALSE to disable
662 */
CanXL_SetPwmModeEnable(CANXL_SIC_Type * Base,boolean Enable)663 static inline void CanXL_SetPwmModeEnable(CANXL_SIC_Type * Base, boolean Enable)
664 {
665 Base->BCFG2 = (Base->BCFG2 & ~CANXL_SIC_BCFG2_TMSE_MASK) | CANXL_SIC_BCFG2_TMSE(Enable ? 1UL : 0UL);
666 }
667
668 /*!
669 * @brief Checks if the Transceiver PWM mode is enabled.
670 *
671 * @param Base The FlexCAN base address
672 * @return TRUE if enabled; FALSE if disabled
673 */
CanXL_IsPwmModeEnable(const CANXL_SIC_Type * Base)674 static inline boolean CanXL_IsPwmModeEnable(const CANXL_SIC_Type * Base)
675 {
676 return (((Base->BCFG2 & (CANXL_SIC_BCFG2_TMSE_MASK)) != 0U) ? TRUE : FALSE);
677 }
678
679 /*!
680 * @brief Configure PWM phases
681 *
682 */
CanXL_SetPWMPhases(CANXL_SIC_Type * Base,uint8 PWMS,uint8 PWML,uint8 PWMO)683 static inline void CanXL_SetPWMPhases(CANXL_SIC_Type * Base, uint8 PWMS, uint8 PWML, uint8 PWMO)
684 {
685 Base->BMICI &= ~(CANXL_SIC_BMICI_PWMS_MASK | CANXL_SIC_BMICI_PWML_MASK | CANXL_SIC_BMICI_PWMO_MASK);
686 Base->BMICI |= (CANXL_SIC_BMICI_PWMS(PWMS) | CANXL_SIC_BMICI_PWML(PWML) | CANXL_SIC_BMICI_PWMO(PWMO));
687 }
688
689
690 /*!
691 * @brief Gets the CanEXCEL FD time segment.
692 *
693 * @param base The CanEXCEL base address
694 * @param timeSeg CanEXCEL time segments.
695 */
CanXL_GetFDBaudRate(const CANXL_SIC_Type * base,Canexcel_Ip_TimeSegmentType * timeSeg)696 static inline void CanXL_GetFDBaudRate(const CANXL_SIC_Type * base, Canexcel_Ip_TimeSegmentType * timeSeg)
697 {
698 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
699 DevAssert(timeSeg != NULL_PTR);
700 #endif
701
702 timeSeg->propSeg = 0U;
703 timeSeg->phaseSeg1 = ((base->BFDCBT & CANXL_SIC_BFDCBT_FTSEG1_MASK) >> CANXL_SIC_BFDCBT_FTSEG1_SHIFT);
704 timeSeg->phaseSeg2 = ((base->BFDCBT & CANXL_SIC_BFDCBT_FTSEG2_MASK) >> CANXL_SIC_BFDCBT_FTSEG2_SHIFT);
705 timeSeg->rJumpwidth = ((base->BFDCBT & CANXL_SIC_BFDCBT_FRJW_MASK) >> CANXL_SIC_BFDCBT_FRJW_SHIFT);
706 timeSeg->preDivider = ((base->BBPRS & CANXL_SIC_BBPRS_PRESDIV_MASK) >> CANXL_SIC_BBPRS_PRESDIV_SHIFT);
707 }
708
709 /*!
710 * @brief Gets the CanEXCEL XL time segments.
711 *
712 * @param base The CanEXCEL base address
713 * @param timeSeg CanEXCEL time segments.
714 */
CanXL_GetXLBaudRate(const CANXL_SIC_Type * base,Canexcel_Ip_TimeSegmentType * timeSeg)715 static inline void CanXL_GetXLBaudRate(const CANXL_SIC_Type * base, Canexcel_Ip_TimeSegmentType * timeSeg)
716 {
717 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
718 DevAssert(timeSeg != NULL_PTR);
719 #endif
720
721 timeSeg->propSeg = 0U;
722 timeSeg->phaseSeg1 = ((base->BXDCBT & CANXL_SIC_BXDCBT_XTSEG1_MASK) >> CANXL_SIC_BXDCBT_XTSEG1_SHIFT);
723 timeSeg->phaseSeg2 = ((base->BXDCBT & CANXL_SIC_BXDCBT_XTSEG2_MASK) >> CANXL_SIC_BXDCBT_XTSEG2_SHIFT);
724 timeSeg->rJumpwidth = ((base->BXDCBT & CANXL_SIC_BXDCBT_XRJW_MASK) >> CANXL_SIC_BXDCBT_XRJW_SHIFT);
725 timeSeg->preDivider = ((base->BBPRS & CANXL_SIC_BBPRS_PRESDIV_MASK) >> CANXL_SIC_BBPRS_PRESDIV_SHIFT);
726 }
727 /*!
728 * @brief Gets the CanEXCEL nominal time segments.
729 *
730 * @param base The CanEXCEL base address
731 * @param timeSeg CanEXCEL time segments.
732 */
CanXL_GetBaudRate(const CANXL_SIC_Type * base,Canexcel_Ip_TimeSegmentType * timeSeg)733 static inline void CanXL_GetBaudRate(const CANXL_SIC_Type * base, Canexcel_Ip_TimeSegmentType * timeSeg)
734 {
735 #if (CANEXCEL_IP_DEV_ERROR_DETECT == STD_ON)
736 DevAssert(timeSeg != NULL_PTR);
737 #endif
738
739 timeSeg->propSeg = 0U;
740 timeSeg->phaseSeg1 = ((base->BNCBT & CANXL_SIC_BNCBT_NTSEG1_MASK) >> CANXL_SIC_BNCBT_NTSEG1_SHIFT);
741 timeSeg->phaseSeg2 = ((base->BNCBT & CANXL_SIC_BNCBT_NTSEG2_MASK) >> CANXL_SIC_BNCBT_NTSEG2_SHIFT);
742 timeSeg->rJumpwidth = ((base->BNCBT & CANXL_SIC_BNCBT_NRJW_MASK) >> CANXL_SIC_BNCBT_NRJW_SHIFT);
743 timeSeg->preDivider = ((base->BBPRS & CANXL_SIC_BBPRS_PRESDIV_MASK) >> CANXL_SIC_BBPRS_PRESDIV_SHIFT);
744 }
745 /*!
746 * @brief Enable the CanEXCEL MRU Services.
747 *
748 * @param base The CanEXCEL base address
749 */
CanXL_MruEnable(CANXL_MRU_Type * base)750 static inline void CanXL_MruEnable(CANXL_MRU_Type * base)
751 {
752 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHR_MASK;
753 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHE_MASK;
754 }
755 /*!
756 * @brief Disable the CanEXCEL MRU Services.
757 *
758 * @param base The CanEXCEL base address
759 */
CanXL_MruDisable(CANXL_MRU_Type * base)760 static inline void CanXL_MruDisable(CANXL_MRU_Type * base)
761 {
762 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHR_MASK;
763 base->CHXCONFIG[0u].CH_CFG0 &= ~CANXL_MRU_CH_CFG0_CHE_MASK;
764 }
765 /*!
766 * @brief Config the Acceptance Address Filter for RxFIFO
767 *
768 * @param base The CanEXCEL RxFIFO Filters base address
769 * @param filter The Acceptance filter configuration pointer
770 * @param filtIdx Filter Position
771 */
772 void CanXL_ConfigAccAddr(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx);
773 /*!
774 * @brief Config the Accept ID Filter for RxFIFO
775 *
776 * @param base The CanEXCEL RxFIFO Filters base address
777 * @param filter The ID filter configuration pointer
778 * @param filtIdx Filter Position
779 */
780 void CanXL_ConfigIDFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx);
781 /*!
782 * @brief Config the Accept SDU Filter for RxFIFO
783 *
784 * @param base The CanEXCEL RxFIFO Filters base address
785 * @param filter The SDU filter configuration pointer
786 * @param filtIdx Filter Position
787 */
788 void CanXL_ConfigSDUFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx);
789 /*!
790 * @brief Config the Accept VCAN Filter for RxFIFO
791 *
792 * @param base The CanEXCEL RxFIFO Filters base address
793 * @param filter The VCAN filter configuration pointer
794 * @param filtIdx Filter Position
795 */
796 void CanXL_ConfigVCANFilter(CANXL_RXFIFO_Type * base,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx);
797 /*!
798 * @brief Config the Acceptance Address Filter for FilterBanks Part of MessageDescriptors Filter Process
799 *
800 * @param base The CanEXCEL Filter Bank base address
801 * @param bank Filter Bank 0\1
802 * @param filter Pointer to AF filter configuration
803 * @param filtIdx Filter Position in the Bank
804 */
805 void CanXL_ConfigAccAddrFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx);
806 /*!
807 * @brief Config the Acceptance SDU for FilterBanks Part of MessageDescriptors Filter Process
808 *
809 * @param base The CanEXCEL Filter Bank base address
810 * @param bank Filter Bank 0\1
811 * @param filter Pointer to SDU configuration
812 * @param filtIdx Filter Position in the Bank
813 */
814 void CanXL_ConfigSDUFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx);
815 /*!
816 * @brief Config the Acceptance VCAN Filter for FilterBanks Part of MessageDescriptors Filter Process
817 *
818 * @param base The CanEXCEL Filter Bank base address
819 * @param bank Filter Bank 0\1
820 * @param filter Pointer to VCAN filter configuration
821 * @param filtIdx Filter Position in the Bank
822 */
823 void CanXL_ConfigVCANFilterBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx);
824 /*!
825 * @brief Config the Rejection Address Filter for FilterBanks Part of MessageDescriptors Filter Process
826 *
827 * @param base The CanEXCEL Filter Bank base address
828 * @param bank Filter Bank 0\1
829 * @param filter Pointer to AF filter configuration
830 * @param filtIdx Filter Position in the Bank
831 */
832 void CanXL_ConfigAccAddrRejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterID_ADDR * filter, uint8 filtIdx);
833 /*!
834 * @brief Config the Rejection VCAN Filter for FilterBanks Part of MessageDescriptors Filter Process
835 *
836 * @param base The CanEXCEL Filter Bank base address
837 * @param bank Filter Bank 0\1
838 * @param filter Pointer to VCAN filter configuration
839 * @param filtIdx Filter Position in the Bank
840 */
841 void CanXL_ConfigSDURejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx);
842 /*!
843 * @brief Config the Rejection VCAN Filter for FilterBanks Part of MessageDescriptors Filter Process
844 *
845 * @param base The CanEXCEL Filter Bank base address
846 * @param bank Filter Bank 0\1
847 * @param filter Pointer to VCAN filter configuration
848 * @param filtIdx Filter Position in the Bank
849 */
850 void CanXL_ConfigVCANRejectBank(CANXL_FILTER_BANK_Type * base, uint8 bank,const Canexcel_Ip_RxFifoFilterSDU_CAN * filter, uint8 filtIdx);
851
852 #ifdef __cplusplus
853 }
854 #endif /* __cplusplus */
855
856 /** @} */
857
858 #endif /* CANEXCEL_IP_HWACCESS_H_ */
859
