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Searched defs:CACHE64_POLSEL1 (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h7775 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
7794 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
DMIMXRT595S_dsp.h1578 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h7774 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
7793 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h7771 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
7790 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h16958 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
16977 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
DMIMXRT798S_cm33_core0.h17017 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
17036 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
DMIMXRT798S_ezhv.h16511 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_cm33_core0.h17017 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
17036 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
DMIMXRT735S_ezhv.h16511 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h17017 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
17036 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
DMIMXRT758S_ezhv.h16511 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h13573 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
13592 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h13573 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro
13592 #define CACHE64_POLSEL1 ((CACHE64_POLSEL_Type *)CACHE64_POLSEL1_BASE) macro