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Searched defs:CACHE64_CTRL_CCR_ENWRBUF_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h881 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
DMIMXRT685S_cm33.h6310 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h6310 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h2109 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h1297 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
DMIMXRT595S_cm33.h7445 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h2109 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h7441 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h7444 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h2108 #define CACHE64_CTRL_CCR_ENWRBUF_MASK (0x2U) macro