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Searched defs:CACHE64_CTRL0 (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h2277 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
2292 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h2277 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
2292 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h7621 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
7644 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
DMIMXRT595S_dsp.h1470 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h7617 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
7640 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h7620 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
7643 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h2276 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro
2291 #define CACHE64_CTRL0 ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE) macro