1 /*
2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 
7 /**********************************************************************************************************************
8  * File Name    : bsp_feature.h
9  * Version      : 1.00
10  * Description  : bsp_feature header
11  *********************************************************************************************************************/
12 
13 #ifndef BSP_FEATURE_H
14 #define BSP_FEATURE_H
15 
16 /***********************************************************************************************************************
17  * Includes   <System Includes> , "Project Includes"
18  **********************************************************************************************************************/
19 
20 /***********************************************************************************************************************
21  * Macro definitions
22  **********************************************************************************************************************/
23 
24 /***********************************************************************************************************************
25  * Typedef definitions
26  **********************************************************************************************************************/
27 
28 /***********************************************************************************************************************
29  * Exported global variables (to be accessed by other files)
30  **********************************************************************************************************************/
31 
32 /***********************************************************************************************************************
33  * Private global variables and functions
34  **********************************************************************************************************************/
35 
36 /* ADC-Related Definitions */
37 #define BSP_FEATURE_ADC_VALID_CHANNEL_MASK                      (0xFFF)
38 #define BSP_FEATURE_ADC_NUM_CALIBRATION_DATA                    (2U)
39 #define BSP_FEATURE_ADC_NUM_CHANNELS                            (12U)
40 #define BSP_FEATURE_ADC_C_VALID_CHANNEL_MASK                    (0xFFF)
41 #define BSP_FEATURE_ADC_C_NUM_CHANNELS                          (12U)
42 #define BSP_FEATURE_ADC_C_SAMPLE_STATE_COUNT_MIN                (79U)
43 #define BSP_FEATURE_ADC_C_SAMPLE_STATE_COUNT_MAX                (255U)
44 #define BSP_FEATURE_ADC_C_CONVERSION_TIME                       (29U)
45 #define BSP_FEATURE_ADC_C_HAS_ADIVC                             (0U)
46 #define BSP_FEATURE_ADC_C_TSU_CONTROL_AVAILABLE                 (1U)
47 #define BSP_FEATURE_ADC_C_TSU_ENABLE_STABILIZATION_TIME_US      (30U)
48 #define BSP_FEATURE_ADC_C_TSU_START_STABILIZATION_TIME_MS       (1U)
49 
50 /* BSP Capabilities Definitions */
51 #define BSP_FEATURE_BSP_CLOCK_FREQ_INIT_CFG_SUPPORT             (1U)
52 #define BSP_FEATURE_BSP_HAS_ELC                                 (0U)
53 #define BSP_FEATURE_BSP_HAS_GPT_CLOCK                           (0U)
54 #define BSP_FEATURE_BSP_SLAVE_ADDRESS_CONVERSION_SUPPORT        (1U)
55 #define BSP_FEATURE_BSP_SUPPORT_SD_VOLT                         (1U)
56 #define BSP_FEATURE_BSP_SUPPORT_ETHER_VOLT                      (1U)
57 #define BSP_FEATURE_BSP_SUPPORT_ETHER_MODE                      (1U)
58 #define BSP_FEATURE_BSP_SUPPORT_QSPI_VOLT                       (0U)
59 #define BSP_FEATURE_BSP_SUPPORT_XSPI_VOLT                       (1U)
60 #define BSP_FEATURE_BSP_SUPPORT_XSPI_OUTPUT                     (0U)
61 #define BSP_FEATURE_BSP_SUPPORT_I3C                             (1U)
62 #define BSP_FEATURE_BSP_SUPPORT_BYPASS                          (0U)
63 #define BSP_FEATURE_BSP_SUPPORT_PFCWE_PROTECT                   (1U)
64 #define BSP_FEATURE_BSP_SUPPORT_OEN_PROTECT                     (0U)
65 #define BSP_FEATURE_BSP_HAS_PFC_OEN_REG                         (0U)
66 #define BSP_FEATURE_BSP_HAS_ETHER_MODE_REG                      (1U)
67 #define BSP_FEATURE_BSP_HAS_SD_CH_POC_REG                       (1U)
68 #define BSP_FEATURE_BSP_HAS_ETH_POC_REG                         (1U)
69 
70 /* CANFD-Related Definitions */
71 #define BSP_FEATURE_CANFD_NUM_CHANNELS                          (2)
72 #define BSP_FEATURE_CANFD_FD_SUPPORT                            (1)
73 #define BSP_FEATURE_CANFD_LITE                                  (0U)
74 #define BSP_FEATURE_CANFD_NUM_INSTANCES                         (1U)
75 #define BSP_FEATURE_CANFD_HAS_RSCANFD                           (0U)
76 #define BSP_FEATURE_CANFD_TXMB_OFFSET                           (32U)
77 #define BSP_FEATURE_CANFD_TXMB_CHANNEL_OFFSET                   (64U)
78 #define BSP_FEATURE_CANFD_RXMB_MAX                              (32U)
79 
80 /* Cortex-M33 Feature Definitions */
81 #define BSP_FEATURE_MCORE_HAS_DSP                               (0U)
82 #if BSP_CURRENT_CORE == RZG3S_CORE_CM33
83  #define BSP_FEATURE_MCORE_HAS_FPU                              (0U)
84  #define BSP_FEATURE_CURRENT_CORE_IS_CM33_FPU                   (0U)
85 #elif BSP_CURRENT_CORE == RZG3S_CORE_CM33_FPU
86  #define BSP_FEATURE_MCORE_HAS_FPU                              (1U)
87  #define BSP_FEATURE_CURRENT_CORE_IS_CM33_FPU                   (1U)
88 #endif
89 
90 /* CPG-Related Definitions */
91 #define BSP_FEATURE_CPG_HAS_ICLK                                (1U)
92 #define BSP_FEATURE_CPG_HAS_I2CLK                               (1U)
93 #define BSP_FEATURE_CPG_HAS_I3CLK                               (1U)
94 #define BSP_FEATURE_CPG_HAS_GCLK                                (0U)
95 #define BSP_FEATURE_CPG_HAS_S0CLK                               (1U)
96 #define BSP_FEATURE_CPG_HAS_OC0CLK                              (1U)
97 #define BSP_FEATURE_CPG_HAS_OC1CLK                              (1U)
98 #define BSP_FEATURE_CPG_HAS_SPI0CLK                             (1U)
99 #define BSP_FEATURE_CPG_HAS_SPI1CLK                             (1U)
100 #define BSP_FEATURE_CPG_HAS_SD0CLK                              (1U)
101 #define BSP_FEATURE_CPG_HAS_SD1CLK                              (1U)
102 #define BSP_FEATURE_CPG_HAS_SD2CLK                              (1U)
103 #define BSP_FEATURE_CPG_HAS_M0CLK                               (1U)
104 #define BSP_FEATURE_CPG_HAS_M1CLK                               (0U)
105 #define BSP_FEATURE_CPG_HAS_M2CLK                               (0U)
106 #define BSP_FEATURE_CPG_HAS_M3CLK                               (0U)
107 #define BSP_FEATURE_CPG_HAS_M4CLK                               (0U)
108 #define BSP_FEATURE_CPG_HAS_HPCLK                               (1U)
109 #define BSP_FEATURE_CPG_HAS_TSUCLK                              (1U)
110 #define BSP_FEATURE_CPG_HAS_ZTCLK                               (1U)
111 #define BSP_FEATURE_CPG_HAS_P0CLK                               (1U)
112 #define BSP_FEATURE_CPG_HAS_P1CLK                               (1U)
113 #define BSP_FEATURE_CPG_HAS_P2CLK                               (1U)
114 #define BSP_FEATURE_CPG_HAS_P3CLK                               (1U)
115 #define BSP_FEATURE_CPG_HAS_P4CLK                               (1U)
116 #define BSP_FEATURE_CPG_HAS_P5CLK                               (1U)
117 #define BSP_FEATURE_CPG_HAS_ATCLK                               (1U)
118 #define BSP_FEATURE_CPG_HAS_OSCCLK                              (1U)
119 #define BSP_FEATURE_CPG_HAS_OSCCLK2                             (1U)
120 
121 /* DMAC-Related Definitions */
122 #define BSP_FEATURE_DMAC_MAX_CHANNEL                            (16U)
123 #define BSP_FEATURE_DMAC_MAX_UNIT                               (2U)
124 
125 /* GPT-Related Definitions */
126 #define BSP_FEATURE_GPT_EVENT_COUNT_CHANNEL_MASK                (BSP_FEATURE_GPT_VALID_CHANNEL_MASK)
127 #define BSP_FEATURE_GPT_VALID_CHANNEL_MASK                      (0xFFU)
128 #define BSP_FEATURE_GPT_TPCS_SHIFT                              (1U)
129 #define BSP_FEATURE_GPT_CLOCK_DIVIDER_STEP_SIZE                 (4U)
130 #define BSP_FEATURE_GPT_CLOCK_DIVIDER_VALUE_7_9_VALID           (0U)
131 
132 /* GTM-Related Definitions */
133 #define BSP_FEATURE_GTM_VALID_CHANNEL_MASK                      (0xFFU)
134 
135 /* IIC-Related Definitions */
136 #define BSP_FEATURE_IIC_VALID_CHANNEL_MASK                      (0x0F)
137 
138 /* INTC-Related Definitions */
139 #define BSP_FEATURE_INTC_IRQ_VALID_CHANNEL_MASK                 (0xFFU)
140 
141 /* IOPORT-Related Definitions */
142 #define BSP_FEATURE_IOPORT_SUPPORT_SR_REG                       (0U)
143 #define BSP_FEATURE_IOPORT_GP_REG_BASE_NUM                      _20
144 #define BSP_FEATURE_IOPORT_SP_REG_BASE_NUM                      1
145 #define BSP_FEATURE_IOPORT_FIL_SP_REG_BASE_NUM                  _00
146 #define BSP_FEATURE_IOPORT_IEN_SP_REG_BASE_NUM                  _01
147 #define BSP_FEATURE_IOPORT_IOLH_SP_REG_BASE_NUM                 _01
148 #define BSP_FEATURE_IOPORT_SR_SP_REG_BASE_NUM                   0
149 
150 /* MHU-Related Definitions */
151 #if BSP_CURRENT_CORE == RZG3S_CORE_CM33
152  #define BSP_FEATURE_MHU_NS_VALID_CHANNEL_MASK                  (0x3AU)
153  #define BSP_FEATURE_MHU_NS_SEND_TYPE_RSP_VALID_CHANNEL_MASK    (0x0AU)
154  #define BSP_FEATURE_MHU_NS_SWINT_GET_VALID_CHANNEL_MASK        (0x03U)
155  #define BSP_FEATURE_MHU_NS_SWINT_SET_VALID_CHANNEL_MASK        (0x0CU)
156  #define BSP_FEATURE_MHU_S_VALID_CHANNEL_MASK                   (0x3AU)
157  #define BSP_FEATURE_MHU_S_SEND_TYPE_RSP_VALID_CHANNEL_MASK     (0x0AU)
158 #elif BSP_CURRENT_CORE == RZG3S_CORE_CM33_FPU
159  #define BSP_FEATURE_MHU_NS_VALID_CHANNEL_MASK                  (0x2DU)
160  #define BSP_FEATURE_MHU_NS_SEND_TYPE_RSP_VALID_CHANNEL_MASK    (0x21U)
161  #define BSP_FEATURE_MHU_NS_SWINT_GET_VALID_CHANNEL_MASK        (0x28U)
162  #define BSP_FEATURE_MHU_NS_SWINT_SET_VALID_CHANNEL_MASK        (0x12U)
163  #define BSP_FEATURE_MHU_S_VALID_CHANNEL_MASK                   (0x2DU)
164  #define BSP_FEATURE_MHU_S_SEND_TYPE_RSP_VALID_CHANNEL_MASK     (0x21U)
165 #endif
166 
167 /* POEG-Related Definitions */
168 #define BSP_FEATURE_POEG_CHANNEL_MASK                           (0xFU)
169 
170 /* RSPI-Related Definitions */
171 #define BSP_FEATURE_RSPI_VALID_CHANNELS_MASK                    (0x1FU)
172 #define BSP_FEATURE_RSPI_CLOCK                                  (FSP_PRIV_CLOCK_P0CLK)
173 #define BSP_FEATURE_RSPI_CLK_MAX_DIV                            (4096U)
174 #define BSP_FEATURE_RSPI_CLK_MIN_DIV                            (4U)
175 
176 /* SCIF-Related Definitions */
177 #define BSP_FEATURE_SCIF_CHANNELS                               (0x3FU)
178 #define BSP_FEATURE_SCIF_CHANNELS_HAS_RTSCTS                    (0x07U)
179 #define BSP_FEATURE_SCIF_CLOCK                                  (FSP_PRIV_CLOCK_P0CLK)
180 
181 /* SSI-Related Definitions */
182 #define BSP_FEATURE_SSI_FIFO_NUM_STAGES                         (32U)
183 #define BSP_FEATURE_SSI_VALID_CHANNEL_MASK                      (0x0FU)
184 
185 /* TrustZone-Related Definitions */
186 #define BSP_FEATURE_TZ_HAS_TRUSTZONE                            (1U)
187 
188 /* WDT-Related Definitions */
189 #define BSP_FEATURE_WDT_MAX_CHANNELS                            (2U)
190 
191 #define BSP_FEATURE_XSPI_CHANNELS                               (0x01U)
192 #define BSP_FEATURE_XSPI_NUM_CHIP_SELECT                        (2U)
193 #define BSP_FEATURE_XSPI_NUM_UNITS                              (1U)
194 #define BSP_FEATURE_XSPI_DO_NOT_HAS_CSSCTL                      (1U)
195 #define BSP_FEATURE_XSPI_START_ADDRESS                          (0x80000000)
196 #define BSP_FEATURE_XSPI_DEVICE_CS0_1_ADDRESS_DELTA             (0x08000000)
197 
198 #endif                                 /* BSP_FEATURE_H */
199