1 /* 2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BSP_MCU_DEVICE_MEMORY_CFG_H_ 8 #define BSP_MCU_DEVICE_MEMORY_CFG_H_ 9 #define BSP_CFG_MPU0_READ0 (0) 10 #define BSP_CFG_MPU0_WRITE0 (0) 11 #define BSP_CFG_MPU0_STADD0 (0x00000000) 12 #define BSP_CFG_MPU0_ENDADD0 (0x00000C00) 13 #define BSP_CFG_MPU0_READ1 (0) 14 #define BSP_CFG_MPU0_WRITE1 (0) 15 #define BSP_CFG_MPU0_STADD1 (0x00000000) 16 #define BSP_CFG_MPU0_ENDADD1 (0x00000C00) 17 #define BSP_CFG_MPU0_READ2 (0) 18 #define BSP_CFG_MPU0_WRITE2 (0) 19 #define BSP_CFG_MPU0_STADD2 (0x00000000) 20 #define BSP_CFG_MPU0_ENDADD2 (0x00000C00) 21 #define BSP_CFG_MPU0_READ3 (0) 22 #define BSP_CFG_MPU0_WRITE3 (0) 23 #define BSP_CFG_MPU0_STADD3 (0x00000000) 24 #define BSP_CFG_MPU0_ENDADD3 (0x00000C00) 25 #define BSP_CFG_MPU0_READ4 (0) 26 #define BSP_CFG_MPU0_WRITE4 (0) 27 #define BSP_CFG_MPU0_STADD4 (0x00000000) 28 #define BSP_CFG_MPU0_ENDADD4 (0x00000C00) 29 #define BSP_CFG_MPU0_READ5 (0) 30 #define BSP_CFG_MPU0_WRITE5 (0) 31 #define BSP_CFG_MPU0_STADD5 (0x00000000) 32 #define BSP_CFG_MPU0_ENDADD5 (0x00000C00) 33 #define BSP_CFG_MPU0_READ6 (0) 34 #define BSP_CFG_MPU0_WRITE6 (0) 35 #define BSP_CFG_MPU0_STADD6 (0x00000000) 36 #define BSP_CFG_MPU0_ENDADD6 (0x00000C00) 37 #define BSP_CFG_MPU0_READ7 (0) 38 #define BSP_CFG_MPU0_WRITE7 (0) 39 #define BSP_CFG_MPU0_STADD7 (0x00000000) 40 #define BSP_CFG_MPU0_ENDADD7 (0x00000C00) 41 #define BSP_CFG_MPU1_READ0 (0) 42 #define BSP_CFG_MPU1_WRITE0 (0) 43 #define BSP_CFG_MPU1_STADD0 (0x00000000) 44 #define BSP_CFG_MPU1_ENDADD0 (0x00000C00) 45 #define BSP_CFG_MPU1_READ1 (0) 46 #define BSP_CFG_MPU1_WRITE1 (0) 47 #define BSP_CFG_MPU1_STADD1 (0x00000000) 48 #define BSP_CFG_MPU1_ENDADD1 (0x00000C00) 49 #define BSP_CFG_MPU1_READ2 (0) 50 #define BSP_CFG_MPU1_WRITE2 (0) 51 #define BSP_CFG_MPU1_STADD2 (0x00000000) 52 #define BSP_CFG_MPU1_ENDADD2 (0x00000C00) 53 #define BSP_CFG_MPU1_READ3 (0) 54 #define BSP_CFG_MPU1_WRITE3 (0) 55 #define BSP_CFG_MPU1_STADD3 (0x00000000) 56 #define BSP_CFG_MPU1_ENDADD3 (0x00000C00) 57 #define BSP_CFG_MPU1_READ4 (0) 58 #define BSP_CFG_MPU1_WRITE4 (0) 59 #define BSP_CFG_MPU1_STADD4 (0x00000000) 60 #define BSP_CFG_MPU1_ENDADD4 (0x00000C00) 61 #define BSP_CFG_MPU1_READ5 (0) 62 #define BSP_CFG_MPU1_WRITE5 (0) 63 #define BSP_CFG_MPU1_STADD5 (0x00000000) 64 #define BSP_CFG_MPU1_ENDADD5 (0x00000C00) 65 #define BSP_CFG_MPU1_READ6 (0) 66 #define BSP_CFG_MPU1_WRITE6 (0) 67 #define BSP_CFG_MPU1_STADD6 (0x00000000) 68 #define BSP_CFG_MPU1_ENDADD6 (0x00000C00) 69 #define BSP_CFG_MPU1_READ7 (0) 70 #define BSP_CFG_MPU1_WRITE7 (0) 71 #define BSP_CFG_MPU1_STADD7 (0x00000000) 72 #define BSP_CFG_MPU1_ENDADD7 (0x00000C00) 73 #define BSP_CFG_MPU2_READ0 (0) 74 #define BSP_CFG_MPU2_WRITE0 (0) 75 #define BSP_CFG_MPU2_STADD0 (0x00000000) 76 #define BSP_CFG_MPU2_ENDADD0 (0x00000C00) 77 #define BSP_CFG_MPU2_READ1 (0) 78 #define BSP_CFG_MPU2_WRITE1 (0) 79 #define BSP_CFG_MPU2_STADD1 (0x00000000) 80 #define BSP_CFG_MPU2_ENDADD1 (0x00000C00) 81 #define BSP_CFG_MPU2_READ2 (0) 82 #define BSP_CFG_MPU2_WRITE2 (0) 83 #define BSP_CFG_MPU2_STADD2 (0x00000000) 84 #define BSP_CFG_MPU2_ENDADD2 (0x00000C00) 85 #define BSP_CFG_MPU2_READ3 (0) 86 #define BSP_CFG_MPU2_WRITE3 (0) 87 #define BSP_CFG_MPU2_STADD3 (0x00000000) 88 #define BSP_CFG_MPU2_ENDADD3 (0x00000C00) 89 #define BSP_CFG_MPU2_READ4 (0) 90 #define BSP_CFG_MPU2_WRITE4 (0) 91 #define BSP_CFG_MPU2_STADD4 (0x00000000) 92 #define BSP_CFG_MPU2_ENDADD4 (0x00000C00) 93 #define BSP_CFG_MPU2_READ5 (0) 94 #define BSP_CFG_MPU2_WRITE5 (0) 95 #define BSP_CFG_MPU2_STADD5 (0x00000000) 96 #define BSP_CFG_MPU2_ENDADD5 (0x00000C00) 97 #define BSP_CFG_MPU2_READ6 (0) 98 #define BSP_CFG_MPU2_WRITE6 (0) 99 #define BSP_CFG_MPU2_STADD6 (0x00000000) 100 #define BSP_CFG_MPU2_ENDADD6 (0x00000C00) 101 #define BSP_CFG_MPU2_READ7 (0) 102 #define BSP_CFG_MPU2_WRITE7 (0) 103 #define BSP_CFG_MPU2_STADD7 (0x00000000) 104 #define BSP_CFG_MPU2_ENDADD7 (0x00000C00) 105 #define BSP_CFG_MPU3_READ0 (0) 106 #define BSP_CFG_MPU3_WRITE0 (0) 107 #define BSP_CFG_MPU3_STADD0 (0x00000000) 108 #define BSP_CFG_MPU3_ENDADD0 (0x00000000) 109 #define BSP_CFG_MPU3_READ1 (0) 110 #define BSP_CFG_MPU3_WRITE1 (0) 111 #define BSP_CFG_MPU3_STADD1 (0x00000000) 112 #define BSP_CFG_MPU3_ENDADD1 (0x00000000) 113 #define BSP_CFG_MPU3_READ2 (0) 114 #define BSP_CFG_MPU3_WRITE2 (0) 115 #define BSP_CFG_MPU3_STADD2 (0x00000000) 116 #define BSP_CFG_MPU3_ENDADD2 (0x00000000) 117 #define BSP_CFG_MPU3_READ3 (0) 118 #define BSP_CFG_MPU3_WRITE3 (0) 119 #define BSP_CFG_MPU3_STADD3 (0x00000000) 120 #define BSP_CFG_MPU3_ENDADD3 (0x00000000) 121 #define BSP_CFG_MPU3_READ4 (0) 122 #define BSP_CFG_MPU3_WRITE4 (0) 123 #define BSP_CFG_MPU3_STADD4 (0x00000000) 124 #define BSP_CFG_MPU3_ENDADD4 (0x00000000) 125 #define BSP_CFG_MPU3_READ5 (0) 126 #define BSP_CFG_MPU3_WRITE5 (0) 127 #define BSP_CFG_MPU3_STADD5 (0x00000000) 128 #define BSP_CFG_MPU3_ENDADD5 (0x00000000) 129 #define BSP_CFG_MPU3_READ6 (0) 130 #define BSP_CFG_MPU3_WRITE6 (0) 131 #define BSP_CFG_MPU3_STADD6 (0x00000000) 132 #define BSP_CFG_MPU3_ENDADD6 (0x00000000) 133 #define BSP_CFG_MPU3_READ7 (0) 134 #define BSP_CFG_MPU3_WRITE7 (0) 135 #define BSP_CFG_MPU3_STADD7 (0x00000000) 136 #define BSP_CFG_MPU3_ENDADD7 (0x00000000) 137 #define BSP_CFG_MPU4_READ0 (0) 138 #define BSP_CFG_MPU4_WRITE0 (0) 139 #define BSP_CFG_MPU4_STADD0 (0x00000000) 140 #define BSP_CFG_MPU4_ENDADD0 (0x00000000) 141 #define BSP_CFG_MPU4_READ1 (0) 142 #define BSP_CFG_MPU4_WRITE1 (0) 143 #define BSP_CFG_MPU4_STADD1 (0x00000000) 144 #define BSP_CFG_MPU4_ENDADD1 (0x00000000) 145 #define BSP_CFG_MPU4_READ2 (0) 146 #define BSP_CFG_MPU4_WRITE2 (0) 147 #define BSP_CFG_MPU4_STADD2 (0x00000000) 148 #define BSP_CFG_MPU4_ENDADD2 (0x00000000) 149 #define BSP_CFG_MPU4_READ3 (0) 150 #define BSP_CFG_MPU4_WRITE3 (0) 151 #define BSP_CFG_MPU4_STADD3 (0x00000000) 152 #define BSP_CFG_MPU4_ENDADD3 (0x00000000) 153 #define BSP_CFG_MPU4_READ4 (0) 154 #define BSP_CFG_MPU4_WRITE4 (0) 155 #define BSP_CFG_MPU4_STADD4 (0x00000000) 156 #define BSP_CFG_MPU4_ENDADD4 (0x00000000) 157 #define BSP_CFG_MPU4_READ5 (0) 158 #define BSP_CFG_MPU4_WRITE5 (0) 159 #define BSP_CFG_MPU4_STADD5 (0x00000000) 160 #define BSP_CFG_MPU4_ENDADD5 (0x00000000) 161 #define BSP_CFG_MPU4_READ6 (0) 162 #define BSP_CFG_MPU4_WRITE6 (0) 163 #define BSP_CFG_MPU4_STADD6 (0x00000000) 164 #define BSP_CFG_MPU4_ENDADD6 (0x00000000) 165 #define BSP_CFG_MPU4_READ7 (0) 166 #define BSP_CFG_MPU4_WRITE7 (0) 167 #define BSP_CFG_MPU4_STADD7 (0x00000000) 168 #define BSP_CFG_MPU4_ENDADD7 (0x00000000) 169 #define BSP_CFG_MPU6_READ0 (0) 170 #define BSP_CFG_MPU6_WRITE0 (0) 171 #define BSP_CFG_MPU6_STADD0 (0x00000000) 172 #define BSP_CFG_MPU6_ENDADD0 (0x00000C00) 173 #define BSP_CFG_MPU6_READ1 (0) 174 #define BSP_CFG_MPU6_WRITE1 (0) 175 #define BSP_CFG_MPU6_STADD1 (0x00000000) 176 #define BSP_CFG_MPU6_ENDADD1 (0x00000C00) 177 #define BSP_CFG_MPU6_READ2 (0) 178 #define BSP_CFG_MPU6_WRITE2 (0) 179 #define BSP_CFG_MPU6_STADD2 (0x00000000) 180 #define BSP_CFG_MPU6_ENDADD2 (0x00000C00) 181 #define BSP_CFG_MPU6_READ3 (0) 182 #define BSP_CFG_MPU6_WRITE3 (0) 183 #define BSP_CFG_MPU6_STADD3 (0x00000000) 184 #define BSP_CFG_MPU6_ENDADD3 (0x00000C00) 185 #define BSP_CFG_MPU6_READ4 (0) 186 #define BSP_CFG_MPU6_WRITE4 (0) 187 #define BSP_CFG_MPU6_STADD4 (0x00000000) 188 #define BSP_CFG_MPU6_ENDADD4 (0x00000C00) 189 #define BSP_CFG_MPU6_READ5 (0) 190 #define BSP_CFG_MPU6_WRITE5 (0) 191 #define BSP_CFG_MPU6_STADD5 (0x00000000) 192 #define BSP_CFG_MPU6_ENDADD5 (0x00000C00) 193 #define BSP_CFG_MPU6_READ6 (0) 194 #define BSP_CFG_MPU6_WRITE6 (0) 195 #define BSP_CFG_MPU6_STADD6 (0x00000000) 196 #define BSP_CFG_MPU6_ENDADD6 (0x00000C00) 197 #define BSP_CFG_MPU6_READ7 (0) 198 #define BSP_CFG_MPU6_WRITE7 (0) 199 #define BSP_CFG_MPU6_STADD7 (0x00000000) 200 #define BSP_CFG_MPU6_ENDADD7 (0x00000C00) 201 #define BSP_CFG_MPU7_READ0 (0) 202 #define BSP_CFG_MPU7_WRITE0 (0) 203 #define BSP_CFG_MPU7_STADD0 (0x00000000) 204 #define BSP_CFG_MPU7_ENDADD0 (0x00000000) 205 #define BSP_CFG_MPU7_READ1 (0) 206 #define BSP_CFG_MPU7_WRITE1 (0) 207 #define BSP_CFG_MPU7_STADD1 (0x00000000) 208 #define BSP_CFG_MPU7_ENDADD1 (0x00000000) 209 #define BSP_CFG_MPU7_READ2 (0) 210 #define BSP_CFG_MPU7_WRITE2 (0) 211 #define BSP_CFG_MPU7_STADD2 (0x00000000) 212 #define BSP_CFG_MPU7_ENDADD2 (0x00000000) 213 #define BSP_CFG_MPU7_READ3 (0) 214 #define BSP_CFG_MPU7_WRITE3 (0) 215 #define BSP_CFG_MPU7_STADD3 (0x00000000) 216 #define BSP_CFG_MPU7_ENDADD3 (0x00000000) 217 #define BSP_CFG_MPU7_READ4 (0) 218 #define BSP_CFG_MPU7_WRITE4 (0) 219 #define BSP_CFG_MPU7_STADD4 (0x00000000) 220 #define BSP_CFG_MPU7_ENDADD4 (0x00000000) 221 #define BSP_CFG_MPU7_READ5 (0) 222 #define BSP_CFG_MPU7_WRITE5 (0) 223 #define BSP_CFG_MPU7_STADD5 (0x00000000) 224 #define BSP_CFG_MPU7_ENDADD5 (0x00000000) 225 #define BSP_CFG_MPU7_READ6 (0) 226 #define BSP_CFG_MPU7_WRITE6 (0) 227 #define BSP_CFG_MPU7_STADD6 (0x00000000) 228 #define BSP_CFG_MPU7_ENDADD6 (0x00000000) 229 #define BSP_CFG_MPU7_READ7 (0) 230 #define BSP_CFG_MPU7_WRITE7 (0) 231 #define BSP_CFG_MPU7_STADD7 (0x00000000) 232 #define BSP_CFG_MPU7_ENDADD7 (0x00000000) 233 #define BSP_CFG_MPU8_READ0 (0) 234 #define BSP_CFG_MPU8_WRITE0 (0) 235 #define BSP_CFG_MPU8_STADD0 (0x00000000) 236 #define BSP_CFG_MPU8_ENDADD0 (0x00000000) 237 #define BSP_CFG_MPU8_READ1 (0) 238 #define BSP_CFG_MPU8_WRITE1 (0) 239 #define BSP_CFG_MPU8_STADD1 (0x00000000) 240 #define BSP_CFG_MPU8_ENDADD1 (0x00000000) 241 #define BSP_CFG_MPU8_READ2 (0) 242 #define BSP_CFG_MPU8_WRITE2 (0) 243 #define BSP_CFG_MPU8_STADD2 (0x00000000) 244 #define BSP_CFG_MPU8_ENDADD2 (0x00000000) 245 #define BSP_CFG_MPU8_READ3 (0) 246 #define BSP_CFG_MPU8_WRITE3 (0) 247 #define BSP_CFG_MPU8_STADD3 (0x00000000) 248 #define BSP_CFG_MPU8_ENDADD3 (0x00000000) 249 #define BSP_CFG_MPU8_READ4 (0) 250 #define BSP_CFG_MPU8_WRITE4 (0) 251 #define BSP_CFG_MPU8_STADD4 (0x00000000) 252 #define BSP_CFG_MPU8_ENDADD4 (0x00000000) 253 #define BSP_CFG_MPU8_READ5 (0) 254 #define BSP_CFG_MPU8_WRITE5 (0) 255 #define BSP_CFG_MPU8_STADD5 (0x00000000) 256 #define BSP_CFG_MPU8_ENDADD5 (0x00000000) 257 #define BSP_CFG_MPU8_READ6 (0) 258 #define BSP_CFG_MPU8_WRITE6 (0) 259 #define BSP_CFG_MPU8_STADD6 (0x00000000) 260 #define BSP_CFG_MPU8_ENDADD6 (0x00000000) 261 #define BSP_CFG_MPU8_READ7 (0) 262 #define BSP_CFG_MPU8_WRITE7 (0) 263 #define BSP_CFG_MPU8_STADD7 (0x00000000) 264 #define BSP_CFG_MPU8_ENDADD7 (0x00000000) 265 266 #define BSP_CFG_CPU_MPU_ATTR0_TYPE (BSP_TYPE_NORMAL_MEMORY) 267 #define BSP_CFG_CPU_MPU_ATTR0_INNER (BSP_WRITE_BACK_NON_TRANSIENT) 268 #define BSP_CFG_CPU_MPU_ATTR0_INNER_READ (BSP_READ_ALLOCATE) 269 #define BSP_CFG_CPU_MPU_ATTR0_INNER_WRITE (BSP_WRITE_ALLOCATE) 270 #define BSP_CFG_CPU_MPU_ATTR0_OUTER (BSP_WRITE_BACK_NON_TRANSIENT) 271 #define BSP_CFG_CPU_MPU_ATTR0_OUTER_READ (BSP_READ_ALLOCATE) 272 #define BSP_CFG_CPU_MPU_ATTR0_OUTER_WRITE (BSP_WRITE_ALLOCATE) 273 #define BSP_CFG_CPU_MPU_ATTR0_DEVICE_TYPE (BSP_DEVICE_NGNRNE) 274 275 #define BSP_CFG_CPU_MPU_ATTR1_TYPE (BSP_TYPE_NORMAL_MEMORY) 276 #define BSP_CFG_CPU_MPU_ATTR1_INNER (BSP_WRITE_NON_THROUGH) 277 #define BSP_CFG_CPU_MPU_ATTR1_INNER_READ (BSP_READ_ALLOCATE) 278 #define BSP_CFG_CPU_MPU_ATTR1_INNER_WRITE (BSP_WRITE_ALLOCATE) 279 #define BSP_CFG_CPU_MPU_ATTR1_OUTER (BSP_WRITE_NON_THROUGH) 280 #define BSP_CFG_CPU_MPU_ATTR1_OUTER_READ (BSP_READ_ALLOCATE) 281 #define BSP_CFG_CPU_MPU_ATTR1_OUTER_WRITE (BSP_WRITE_ALLOCATE) 282 #define BSP_CFG_CPU_MPU_ATTR1_DEVICE_TYPE (BSP_DEVICE_NGNRNE) 283 284 #define BSP_CFG_CPU_MPU_ATTR2_TYPE (BSP_TYPE_NORMAL_MEMORY) 285 #define BSP_CFG_CPU_MPU_ATTR2_INNER (BSP_WRITE_NON_THROUGH) 286 #define BSP_CFG_CPU_MPU_ATTR2_INNER_READ (BSP_READ_NOT_ALLOCATE) 287 #define BSP_CFG_CPU_MPU_ATTR2_INNER_WRITE (BSP_WRITE_NOT_ALLOCATE) 288 #define BSP_CFG_CPU_MPU_ATTR2_OUTER (BSP_WRITE_NON_THROUGH) 289 #define BSP_CFG_CPU_MPU_ATTR2_OUTER_READ (BSP_READ_NOT_ALLOCATE) 290 #define BSP_CFG_CPU_MPU_ATTR2_OUTER_WRITE (BSP_WRITE_NOT_ALLOCATE) 291 #define BSP_CFG_CPU_MPU_ATTR2_DEVICE_TYPE (BSP_DEVICE_NGNRNE) 292 293 #define BSP_CFG_CPU_MPU_ATTR3_TYPE (BSP_TYPE_NORMAL_MEMORY) 294 #define BSP_CFG_CPU_MPU_ATTR3_INNER (BSP_NON_CACHEABLE) 295 #define BSP_CFG_CPU_MPU_ATTR3_INNER_READ (BSP_READ_NOT_ALLOCATE) 296 #define BSP_CFG_CPU_MPU_ATTR3_INNER_WRITE (BSP_WRITE_NOT_ALLOCATE) 297 #define BSP_CFG_CPU_MPU_ATTR3_OUTER (BSP_NON_CACHEABLE) 298 #define BSP_CFG_CPU_MPU_ATTR3_OUTER_READ (BSP_READ_NOT_ALLOCATE) 299 #define BSP_CFG_CPU_MPU_ATTR3_OUTER_WRITE (BSP_WRITE_NOT_ALLOCATE) 300 #define BSP_CFG_CPU_MPU_ATTR3_DEVICE_TYPE (BSP_DEVICE_NGNRNE) 301 302 #define BSP_CFG_CPU_MPU_ATTR4_TYPE (BSP_TYPE_DEVICE_MEMORY) 303 #define BSP_CFG_CPU_MPU_ATTR4_INNER (BSP_WRITE_THROUGH_TRANSIENT) 304 #define BSP_CFG_CPU_MPU_ATTR4_INNER_READ (BSP_READ_NOT_ALLOCATE) 305 #define BSP_CFG_CPU_MPU_ATTR4_INNER_WRITE (BSP_WRITE_NOT_ALLOCATE) 306 #define BSP_CFG_CPU_MPU_ATTR4_OUTER (BSP_WRITE_THROUGH_TRANSIENT) 307 #define BSP_CFG_CPU_MPU_ATTR4_OUTER_READ (BSP_READ_NOT_ALLOCATE) 308 #define BSP_CFG_CPU_MPU_ATTR4_OUTER_WRITE (BSP_WRITE_NOT_ALLOCATE) 309 #define BSP_CFG_CPU_MPU_ATTR4_DEVICE_TYPE (BSP_DEVICE_NGNRNE) 310 311 #define BSP_CFG_CPU_MPU_ATTR5_TYPE (BSP_TYPE_DEVICE_MEMORY) 312 #define BSP_CFG_CPU_MPU_ATTR5_INNER (BSP_WRITE_THROUGH_TRANSIENT) 313 #define BSP_CFG_CPU_MPU_ATTR5_INNER_READ (BSP_READ_NOT_ALLOCATE) 314 #define BSP_CFG_CPU_MPU_ATTR5_INNER_WRITE (BSP_WRITE_NOT_ALLOCATE) 315 #define BSP_CFG_CPU_MPU_ATTR5_OUTER (BSP_WRITE_THROUGH_TRANSIENT) 316 #define BSP_CFG_CPU_MPU_ATTR5_OUTER_READ (BSP_READ_NOT_ALLOCATE) 317 #define BSP_CFG_CPU_MPU_ATTR5_OUTER_WRITE (BSP_WRITE_NOT_ALLOCATE) 318 #define BSP_CFG_CPU_MPU_ATTR5_DEVICE_TYPE (BSP_DEVICE_NGNRE) 319 320 #define BSP_CFG_CPU_MPU_ATTR6_TYPE (BSP_TYPE_DEVICE_MEMORY) 321 #define BSP_CFG_CPU_MPU_ATTR6_INNER (BSP_WRITE_THROUGH_TRANSIENT) 322 #define BSP_CFG_CPU_MPU_ATTR6_INNER_READ (BSP_READ_NOT_ALLOCATE) 323 #define BSP_CFG_CPU_MPU_ATTR6_INNER_WRITE (BSP_WRITE_NOT_ALLOCATE) 324 #define BSP_CFG_CPU_MPU_ATTR6_OUTER (BSP_WRITE_THROUGH_TRANSIENT) 325 #define BSP_CFG_CPU_MPU_ATTR6_OUTER_READ (BSP_READ_NOT_ALLOCATE) 326 #define BSP_CFG_CPU_MPU_ATTR6_OUTER_WRITE (BSP_WRITE_NOT_ALLOCATE) 327 #define BSP_CFG_CPU_MPU_ATTR6_DEVICE_TYPE (BSP_DEVICE_NGRE) 328 329 #define BSP_CFG_CPU_MPU_ATTR7_TYPE (BSP_TYPE_DEVICE_MEMORY) 330 #define BSP_CFG_CPU_MPU_ATTR7_INNER (BSP_WRITE_THROUGH_TRANSIENT) 331 #define BSP_CFG_CPU_MPU_ATTR7_INNER_READ (BSP_READ_NOT_ALLOCATE) 332 #define BSP_CFG_CPU_MPU_ATTR7_INNER_WRITE (BSP_WRITE_NOT_ALLOCATE) 333 #define BSP_CFG_CPU_MPU_ATTR7_OUTER (BSP_WRITE_THROUGH_TRANSIENT) 334 #define BSP_CFG_CPU_MPU_ATTR7_OUTER_READ (BSP_READ_NOT_ALLOCATE) 335 #define BSP_CFG_CPU_MPU_ATTR7_OUTER_WRITE (BSP_WRITE_NOT_ALLOCATE) 336 #define BSP_CFG_CPU_MPU_ATTR7_DEVICE_TYPE (BSP_DEVICE_GRE) 337 338 /* Region00 : ATCM */ 339 #define BSP_CFG_EL1_MPU_REGION00_BASE (0x00000000) 340 #define BSP_CFG_EL1_MPU_REGION00_LIMIT (0x0001FFFF) 341 #define BSP_CFG_EL1_MPU_REGION00_SH (BSP_OUTER_SHAREABLE) 342 #define BSP_CFG_EL1_MPU_REGION00_AP (BSP_EL1RW_EL0RW) 343 #define BSP_CFG_EL1_MPU_REGION00_XN (BSP_EXECUTE_ENABLE) 344 #define BSP_CFG_EL1_MPU_REGION00_ATTRINDEX (BSP_ATTRINDEX3) 345 #define BSP_CFG_EL1_MPU_REGION00_ENABLE (BSP_REGION_ENABLE) 346 347 /* Region01 : BTCM */ 348 #define BSP_CFG_EL1_MPU_REGION01_BASE (0x00100000) 349 #define BSP_CFG_EL1_MPU_REGION01_LIMIT (0x0011FFFF) 350 #define BSP_CFG_EL1_MPU_REGION01_SH (BSP_OUTER_SHAREABLE) 351 #define BSP_CFG_EL1_MPU_REGION01_AP (BSP_EL1RW_EL0RW) 352 #define BSP_CFG_EL1_MPU_REGION01_XN (BSP_EXECUTE_ENABLE) 353 #define BSP_CFG_EL1_MPU_REGION01_ATTRINDEX (BSP_ATTRINDEX3) 354 #define BSP_CFG_EL1_MPU_REGION01_ENABLE (BSP_REGION_ENABLE) 355 356 /* Region02 : System RAM */ 357 #define BSP_CFG_EL1_MPU_REGION02_BASE (0x10000000) 358 #define BSP_CFG_EL1_MPU_REGION02_LIMIT (0x1017FFFF) 359 #define BSP_CFG_EL1_MPU_REGION02_SH (BSP_NON_SHAREABLE) 360 #define BSP_CFG_EL1_MPU_REGION02_AP (BSP_EL1RW_EL0RW) 361 #define BSP_CFG_EL1_MPU_REGION02_XN (BSP_EXECUTE_ENABLE) 362 #define BSP_CFG_EL1_MPU_REGION02_ATTRINDEX (BSP_ATTRINDEX1) 363 #define BSP_CFG_EL1_MPU_REGION02_ENABLE (BSP_REGION_ENABLE) 364 365 /* Region03 : Mirror area of System RAM */ 366 #define BSP_CFG_EL1_MPU_REGION03_BASE (0x30000000) 367 #define BSP_CFG_EL1_MPU_REGION03_LIMIT (0x3017FFFF) 368 #define BSP_CFG_EL1_MPU_REGION03_SH (BSP_OUTER_SHAREABLE) 369 #define BSP_CFG_EL1_MPU_REGION03_AP (BSP_EL1RW_EL0RW) 370 #define BSP_CFG_EL1_MPU_REGION03_XN (BSP_EXECUTE_ENABLE) 371 #define BSP_CFG_EL1_MPU_REGION03_ATTRINDEX (BSP_ATTRINDEX3) 372 #define BSP_CFG_EL1_MPU_REGION03_ENABLE (BSP_REGION_ENABLE) 373 374 /* Region04 : Mirror area of external address space */ 375 #define BSP_CFG_EL1_MPU_REGION04_BASE (0x40000000) 376 #define BSP_CFG_EL1_MPU_REGION04_LIMIT (0x5FFFFFFF) 377 #define BSP_CFG_EL1_MPU_REGION04_SH (BSP_OUTER_SHAREABLE) 378 #define BSP_CFG_EL1_MPU_REGION04_AP (BSP_EL1RW_EL0RW) 379 #define BSP_CFG_EL1_MPU_REGION04_XN (BSP_EXECUTE_ENABLE) 380 #define BSP_CFG_EL1_MPU_REGION04_ATTRINDEX (BSP_ATTRINDEX3) 381 #define BSP_CFG_EL1_MPU_REGION04_ENABLE (BSP_REGION_ENABLE) 382 383 /* Region05 : External address space */ 384 #define BSP_CFG_EL1_MPU_REGION05_BASE (0x60000000) 385 #define BSP_CFG_EL1_MPU_REGION05_LIMIT (0x7FFFFFFF) 386 #define BSP_CFG_EL1_MPU_REGION05_SH (BSP_NON_SHAREABLE) 387 #define BSP_CFG_EL1_MPU_REGION05_AP (BSP_EL1RW_EL0RW) 388 #define BSP_CFG_EL1_MPU_REGION05_XN (BSP_EXECUTE_ENABLE) 389 #define BSP_CFG_EL1_MPU_REGION05_ATTRINDEX (BSP_ATTRINDEX1) 390 #define BSP_CFG_EL1_MPU_REGION05_ENABLE (BSP_REGION_ENABLE) 391 392 /* Region06 : Non-Safety Peripheral */ 393 #define BSP_CFG_EL1_MPU_REGION06_BASE (0x80000000) 394 #define BSP_CFG_EL1_MPU_REGION06_LIMIT (0x80FFFFFF) 395 #define BSP_CFG_EL1_MPU_REGION06_SH (BSP_OUTER_SHAREABLE) 396 #define BSP_CFG_EL1_MPU_REGION06_AP (BSP_EL1RW_EL0RW) 397 #define BSP_CFG_EL1_MPU_REGION06_XN (BSP_EXECUTE_NEVER) 398 #define BSP_CFG_EL1_MPU_REGION06_ATTRINDEX (BSP_ATTRINDEX5) 399 #define BSP_CFG_EL1_MPU_REGION06_ENABLE (BSP_REGION_ENABLE) 400 401 /* Region07 : Safety Peripheral */ 402 #define BSP_CFG_EL1_MPU_REGION07_BASE (0x81000000) 403 #define BSP_CFG_EL1_MPU_REGION07_LIMIT (0x81FFFFFF) 404 #define BSP_CFG_EL1_MPU_REGION07_SH (BSP_OUTER_SHAREABLE) 405 #define BSP_CFG_EL1_MPU_REGION07_AP (BSP_EL1RW_EL0RW) 406 #define BSP_CFG_EL1_MPU_REGION07_XN (BSP_EXECUTE_NEVER) 407 #define BSP_CFG_EL1_MPU_REGION07_ATTRINDEX (BSP_ATTRINDEX5) 408 #define BSP_CFG_EL1_MPU_REGION07_ENABLE (BSP_REGION_ENABLE) 409 410 /* Region08 : LLPP Peripheral */ 411 #define BSP_CFG_EL1_MPU_REGION08_BASE (0x90000000) 412 #define BSP_CFG_EL1_MPU_REGION08_LIMIT (0x901FFFFF) 413 #define BSP_CFG_EL1_MPU_REGION08_SH (BSP_OUTER_SHAREABLE) 414 #define BSP_CFG_EL1_MPU_REGION08_AP (BSP_EL1RW_EL0RW) 415 #define BSP_CFG_EL1_MPU_REGION08_XN (BSP_EXECUTE_NEVER) 416 #define BSP_CFG_EL1_MPU_REGION08_ATTRINDEX (BSP_ATTRINDEX5) 417 #define BSP_CFG_EL1_MPU_REGION08_ENABLE (BSP_REGION_ENABLE) 418 419 /* Region09 : GIC0 */ 420 #define BSP_CFG_EL1_MPU_REGION09_BASE (0x94000000) 421 #define BSP_CFG_EL1_MPU_REGION09_LIMIT (0x941FFFFF) 422 #define BSP_CFG_EL1_MPU_REGION09_SH (BSP_OUTER_SHAREABLE) 423 #define BSP_CFG_EL1_MPU_REGION09_AP (BSP_EL1RW_EL0RW) 424 #define BSP_CFG_EL1_MPU_REGION09_XN (BSP_EXECUTE_NEVER) 425 #define BSP_CFG_EL1_MPU_REGION09_ATTRINDEX (BSP_ATTRINDEX4) 426 #define BSP_CFG_EL1_MPU_REGION09_ENABLE (BSP_REGION_ENABLE) 427 428 /* Region10 : Debug Private */ 429 #define BSP_CFG_EL1_MPU_REGION10_BASE (0xC0000000) 430 #define BSP_CFG_EL1_MPU_REGION10_LIMIT (0xC0FFFFFF) 431 #define BSP_CFG_EL1_MPU_REGION10_SH (BSP_OUTER_SHAREABLE) 432 #define BSP_CFG_EL1_MPU_REGION10_AP (BSP_EL1RW_EL0RW) 433 #define BSP_CFG_EL1_MPU_REGION10_XN (BSP_EXECUTE_NEVER) 434 #define BSP_CFG_EL1_MPU_REGION10_ATTRINDEX (BSP_ATTRINDEX4) 435 #define BSP_CFG_EL1_MPU_REGION10_ENABLE (BSP_REGION_ENABLE) 436 437 /* Region11 : Not Used */ 438 #define BSP_CFG_EL1_MPU_REGION11_BASE (0x00000000) 439 #define BSP_CFG_EL1_MPU_REGION11_LIMIT (0x00000000) 440 #define BSP_CFG_EL1_MPU_REGION11_SH (BSP_NON_SHAREABLE) 441 #define BSP_CFG_EL1_MPU_REGION11_AP (BSP_EL1RW_EL0NO) 442 #define BSP_CFG_EL1_MPU_REGION11_XN (BSP_EXECUTE_ENABLE) 443 #define BSP_CFG_EL1_MPU_REGION11_ATTRINDEX (BSP_ATTRINDEX0) 444 #define BSP_CFG_EL1_MPU_REGION11_ENABLE (BSP_REGION_DISABLE) 445 446 /* Region12 : Not Used */ 447 #define BSP_CFG_EL1_MPU_REGION12_BASE (0x00000000) 448 #define BSP_CFG_EL1_MPU_REGION12_LIMIT (0x00000000) 449 #define BSP_CFG_EL1_MPU_REGION12_SH (BSP_NON_SHAREABLE) 450 #define BSP_CFG_EL1_MPU_REGION12_AP (BSP_EL1RW_EL0NO) 451 #define BSP_CFG_EL1_MPU_REGION12_XN (BSP_EXECUTE_ENABLE) 452 #define BSP_CFG_EL1_MPU_REGION12_ATTRINDEX (BSP_ATTRINDEX0) 453 #define BSP_CFG_EL1_MPU_REGION12_ENABLE (BSP_REGION_DISABLE) 454 455 /* Region13 : Not Used */ 456 #define BSP_CFG_EL1_MPU_REGION13_BASE (0x00000000) 457 #define BSP_CFG_EL1_MPU_REGION13_LIMIT (0x00000000) 458 #define BSP_CFG_EL1_MPU_REGION13_SH (BSP_NON_SHAREABLE) 459 #define BSP_CFG_EL1_MPU_REGION13_AP (BSP_EL1RW_EL0NO) 460 #define BSP_CFG_EL1_MPU_REGION13_XN (BSP_EXECUTE_ENABLE) 461 #define BSP_CFG_EL1_MPU_REGION13_ATTRINDEX (BSP_ATTRINDEX0) 462 #define BSP_CFG_EL1_MPU_REGION13_ENABLE (BSP_REGION_DISABLE) 463 464 /* Region14 : Not Used */ 465 #define BSP_CFG_EL1_MPU_REGION14_BASE (0x00000000) 466 #define BSP_CFG_EL1_MPU_REGION14_LIMIT (0x00000000) 467 #define BSP_CFG_EL1_MPU_REGION14_SH (BSP_NON_SHAREABLE) 468 #define BSP_CFG_EL1_MPU_REGION14_AP (BSP_EL1RW_EL0NO) 469 #define BSP_CFG_EL1_MPU_REGION14_XN (BSP_EXECUTE_ENABLE) 470 #define BSP_CFG_EL1_MPU_REGION14_ATTRINDEX (BSP_ATTRINDEX0) 471 #define BSP_CFG_EL1_MPU_REGION14_ENABLE (BSP_REGION_DISABLE) 472 473 /* Region15 : Not Used */ 474 #define BSP_CFG_EL1_MPU_REGION15_BASE (0x00000000) 475 #define BSP_CFG_EL1_MPU_REGION15_LIMIT (0x00000000) 476 #define BSP_CFG_EL1_MPU_REGION15_SH (BSP_NON_SHAREABLE) 477 #define BSP_CFG_EL1_MPU_REGION15_AP (BSP_EL1RW_EL0NO) 478 #define BSP_CFG_EL1_MPU_REGION15_XN (BSP_EXECUTE_ENABLE) 479 #define BSP_CFG_EL1_MPU_REGION15_ATTRINDEX (BSP_ATTRINDEX0) 480 #define BSP_CFG_EL1_MPU_REGION15_ENABLE (BSP_REGION_DISABLE) 481 482 /* Region16 : Not Used */ 483 #define BSP_CFG_EL1_MPU_REGION16_BASE (0x00000000) 484 #define BSP_CFG_EL1_MPU_REGION16_LIMIT (0x00000000) 485 #define BSP_CFG_EL1_MPU_REGION16_SH (BSP_NON_SHAREABLE) 486 #define BSP_CFG_EL1_MPU_REGION16_AP (BSP_EL1RW_EL0NO) 487 #define BSP_CFG_EL1_MPU_REGION16_XN (BSP_EXECUTE_ENABLE) 488 #define BSP_CFG_EL1_MPU_REGION16_ATTRINDEX (BSP_ATTRINDEX0) 489 #define BSP_CFG_EL1_MPU_REGION16_ENABLE (BSP_REGION_DISABLE) 490 491 /* Region17 : Not Used */ 492 #define BSP_CFG_EL1_MPU_REGION17_BASE (0x00000000) 493 #define BSP_CFG_EL1_MPU_REGION17_LIMIT (0x00000000) 494 #define BSP_CFG_EL1_MPU_REGION17_SH (BSP_NON_SHAREABLE) 495 #define BSP_CFG_EL1_MPU_REGION17_AP (BSP_EL1RW_EL0NO) 496 #define BSP_CFG_EL1_MPU_REGION17_XN (BSP_EXECUTE_ENABLE) 497 #define BSP_CFG_EL1_MPU_REGION17_ATTRINDEX (BSP_ATTRINDEX0) 498 #define BSP_CFG_EL1_MPU_REGION17_ENABLE (BSP_REGION_DISABLE) 499 500 /* Region18 : Not Used */ 501 #define BSP_CFG_EL1_MPU_REGION18_BASE (0x00000000) 502 #define BSP_CFG_EL1_MPU_REGION18_LIMIT (0x00000000) 503 #define BSP_CFG_EL1_MPU_REGION18_SH (BSP_NON_SHAREABLE) 504 #define BSP_CFG_EL1_MPU_REGION18_AP (BSP_EL1RW_EL0NO) 505 #define BSP_CFG_EL1_MPU_REGION18_XN (BSP_EXECUTE_ENABLE) 506 #define BSP_CFG_EL1_MPU_REGION18_ATTRINDEX (BSP_ATTRINDEX0) 507 #define BSP_CFG_EL1_MPU_REGION18_ENABLE (BSP_REGION_DISABLE) 508 509 /* Region19 : Not Used */ 510 #define BSP_CFG_EL1_MPU_REGION19_BASE (0x00000000) 511 #define BSP_CFG_EL1_MPU_REGION19_LIMIT (0x00000000) 512 #define BSP_CFG_EL1_MPU_REGION19_SH (BSP_NON_SHAREABLE) 513 #define BSP_CFG_EL1_MPU_REGION19_AP (BSP_EL1RW_EL0NO) 514 #define BSP_CFG_EL1_MPU_REGION19_XN (BSP_EXECUTE_ENABLE) 515 #define BSP_CFG_EL1_MPU_REGION19_ATTRINDEX (BSP_ATTRINDEX0) 516 #define BSP_CFG_EL1_MPU_REGION19_ENABLE (BSP_REGION_DISABLE) 517 518 /* Region20 : Not Used */ 519 #define BSP_CFG_EL1_MPU_REGION20_BASE (0x00000000) 520 #define BSP_CFG_EL1_MPU_REGION20_LIMIT (0x00000000) 521 #define BSP_CFG_EL1_MPU_REGION20_SH (BSP_NON_SHAREABLE) 522 #define BSP_CFG_EL1_MPU_REGION20_AP (BSP_EL1RW_EL0NO) 523 #define BSP_CFG_EL1_MPU_REGION20_XN (BSP_EXECUTE_ENABLE) 524 #define BSP_CFG_EL1_MPU_REGION20_ATTRINDEX (BSP_ATTRINDEX0) 525 #define BSP_CFG_EL1_MPU_REGION20_ENABLE (BSP_REGION_DISABLE) 526 527 /* Region21 : Not Used */ 528 #define BSP_CFG_EL1_MPU_REGION21_BASE (0x00000000) 529 #define BSP_CFG_EL1_MPU_REGION21_LIMIT (0x00000000) 530 #define BSP_CFG_EL1_MPU_REGION21_SH (BSP_NON_SHAREABLE) 531 #define BSP_CFG_EL1_MPU_REGION21_AP (BSP_EL1RW_EL0NO) 532 #define BSP_CFG_EL1_MPU_REGION21_XN (BSP_EXECUTE_ENABLE) 533 #define BSP_CFG_EL1_MPU_REGION21_ATTRINDEX (BSP_ATTRINDEX0) 534 #define BSP_CFG_EL1_MPU_REGION21_ENABLE (BSP_REGION_DISABLE) 535 536 /* Region22 : Not Used */ 537 #define BSP_CFG_EL1_MPU_REGION22_BASE (0x00000000) 538 #define BSP_CFG_EL1_MPU_REGION22_LIMIT (0x00000000) 539 #define BSP_CFG_EL1_MPU_REGION22_SH (BSP_NON_SHAREABLE) 540 #define BSP_CFG_EL1_MPU_REGION22_AP (BSP_EL1RW_EL0NO) 541 #define BSP_CFG_EL1_MPU_REGION22_XN (BSP_EXECUTE_ENABLE) 542 #define BSP_CFG_EL1_MPU_REGION22_ATTRINDEX (BSP_ATTRINDEX0) 543 #define BSP_CFG_EL1_MPU_REGION22_ENABLE (BSP_REGION_DISABLE) 544 545 /* Region23 : Not Used */ 546 #define BSP_CFG_EL1_MPU_REGION23_BASE (0x00000000) 547 #define BSP_CFG_EL1_MPU_REGION23_LIMIT (0x00000000) 548 #define BSP_CFG_EL1_MPU_REGION23_SH (BSP_NON_SHAREABLE) 549 #define BSP_CFG_EL1_MPU_REGION23_AP (BSP_EL1RW_EL0NO) 550 #define BSP_CFG_EL1_MPU_REGION23_XN (BSP_EXECUTE_ENABLE) 551 #define BSP_CFG_EL1_MPU_REGION23_ATTRINDEX (BSP_ATTRINDEX0) 552 #define BSP_CFG_EL1_MPU_REGION23_ENABLE (BSP_REGION_DISABLE) 553 554 #define BSP_CFG_SCTLR_BR_BIT (BSP_BG_REGION_DISABLE) 555 #define BSP_CFG_SCTLR_I_BIT (BSP_ICACHE_ENABLE) 556 #define BSP_CFG_SCTLR_C_BIT (BSP_DATACACHE_ENABLE) 557 #endif /* BSP_MCU_DEVICE_MEMORY_CFG_H_ */ 558
