1 /*
2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef BSP_COMMON_H
8 #define BSP_COMMON_H
9
10 /***********************************************************************************************************************
11 * Includes <System Includes> , "Project Includes"
12 **********************************************************************************************************************/
13
14 /* C99 includes. */
15 #include <stdint.h>
16 #include <stddef.h>
17 #include <stdbool.h>
18 #include <assert.h>
19 #include <string.h>
20
21 /* Different compiler support. */
22 #include "fsp_common_api.h"
23 #include "bsp_compiler_support.h"
24 #include "bsp_cfg.h"
25
26 /** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
27 FSP_HEADER
28
29 /*******************************************************************************************************************//**
30 * @addtogroup BSP_MCU
31 * @{
32 **********************************************************************************************************************/
33
34 /***********************************************************************************************************************
35 * Macro definitions
36 **********************************************************************************************************************/
37
38 /** Used to signify that an interrupt factor is not available. */
39 #define BSP_IRQ_DISABLED (0xFFU)
40
41 /* Version of this module's code and API. */
42 #define BSP_CODE_VERSION_MAJOR (1U)
43 #define BSP_CODE_VERSION_MINOR (0U)
44 #define BSP_API_VERSION_MAJOR (1U)
45 #define BSP_API_VERSION_MINOR (0U)
46
47 #define FSP_CONTEXT_SAVE
48 #define FSP_CONTEXT_RESTORE
49
50 /** Macro to log and return error without an assertion. */
51 #ifndef FSP_RETURN
52
53 #define FSP_RETURN(err) FSP_ERROR_LOG((err)); \
54 return err;
55 #endif
56
57 /** This function is called before returning an error code. To stop on a runtime error, define fsp_error_log in
58 * user code and do required debugging (breakpoints, stack dump, etc) in this function.*/
59 #if (1 == BSP_CFG_ERROR_LOG)
60
61 #ifndef FSP_ERROR_LOG
62 #define FSP_ERROR_LOG(err) \
63 fsp_error_log((err), __FILE__, __LINE__);
64 #endif
65 #else
66
67 #define FSP_ERROR_LOG(err)
68 #endif
69
70 /** Default assertion calls ::FSP_ERROR_RETURN if condition "a" is false. Used to identify incorrect use of API's in FSP
71 * functions. */
72 #if (3 == BSP_CFG_ASSERT)
73 #define FSP_ASSERT(a)
74 #elif (2 == BSP_CFG_ASSERT)
75 #define FSP_ASSERT(a) {assert(a);}
76 #else
77 #define FSP_ASSERT(a) FSP_ERROR_RETURN((a), FSP_ERR_ASSERTION)
78 #endif // ifndef FSP_ASSERT
79
80 /** All FSP error codes are returned using this macro. Calls ::FSP_ERROR_LOG function if condition "a" is false. Used
81 * to identify runtime errors in FSP functions. */
82
83 #define FSP_ERROR_RETURN(a, err) \
84 { \
85 if ((a)) \
86 { \
87 (void) 0; /* Do nothing */ \
88 } \
89 else \
90 { \
91 FSP_ERROR_LOG(err); \
92 return err; \
93 } \
94 }
95
96 /* Function-like macro used to wait for a condition to be met, most often used to wait for hardware register updates.
97 * This macro can be redefined to add a timeout if necessary. */
98 #ifndef FSP_HARDWARE_REGISTER_WAIT
99 #define FSP_HARDWARE_REGISTER_WAIT(reg, required_value) while (reg != required_value) { /* Wait. */}
100 #endif
101
102 #ifndef FSP_REGISTER_READ
103
104 /* Read a register and discard the result. */
105 #define FSP_REGISTER_READ(A) __ASM volatile ("" : : "r" (A));
106 #endif
107
108 /** Version data structure used by error logger macro. */
109 extern const fsp_version_t g_bsp_version;
110
111 /****************************************************************
112 *
113 * This check is performed to select suitable ASM API with respect to core
114 *
115 * The macros __CORE__ , __ARM7EM__ and __ARM_ARCH_8M_BASE__ are undefined for GCC,
116 * but defined(__IAR_SYSTEMS_ICC__) is false for GCC,
117 * so the left half of the || expression evaluates to false for GCC regardless of the values of these macros. */
118
119 #if (defined(__IAR_SYSTEMS_ICC__) && ((__CORE__ == __ARM7EM__) || (__CORE__ == __ARM_ARCH_8M_BASE__))) || \
120 defined(__ARM_ARCH_7EM__) // CM4
121 #ifndef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION
122 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U)
123 #endif
124 #else // CM23
125 #ifdef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION
126 #undef BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION
127 #endif
128 #define BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION (0U)
129 #endif
130
131 /* This macro defines a variable for saving previous mask value */
132 #ifndef FSP_CRITICAL_SECTION_DEFINE
133
134 #define FSP_CRITICAL_SECTION_DEFINE uint32_t old_mask_level = 0U
135 #endif
136
137 /* These macros abstract methods to save and restore the interrupt state for different architectures. */
138 #if (0 == BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION)
139 #define FSP_CRITICAL_SECTION_GET_CURRENT_STATE __get_PRIMASK
140 #define FSP_CRITICAL_SECTION_SET_STATE __set_PRIMASK
141 #define FSP_CRITICAL_SECTION_IRQ_MASK_SET (1U)
142 #else
143 #define FSP_CRITICAL_SECTION_GET_CURRENT_STATE __get_BASEPRI
144 #define FSP_CRITICAL_SECTION_SET_STATE __set_BASEPRI
145 #define FSP_CRITICAL_SECTION_IRQ_MASK_SET ((uint8_t) (BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION << \
146 (8U - __NVIC_PRIO_BITS)))
147 #endif
148
149 /** This macro temporarily saves the current interrupt state and disables interrupts. */
150 #ifndef FSP_CRITICAL_SECTION_ENTER
151 #define FSP_CRITICAL_SECTION_ENTER \
152 old_mask_level = FSP_CRITICAL_SECTION_GET_CURRENT_STATE(); \
153 FSP_CRITICAL_SECTION_SET_STATE(FSP_CRITICAL_SECTION_IRQ_MASK_SET)
154 #endif
155
156 /** This macro restores the previously saved interrupt state, reenabling interrupts. */
157 #ifndef FSP_CRITICAL_SECTION_EXIT
158 #define FSP_CRITICAL_SECTION_EXIT FSP_CRITICAL_SECTION_SET_STATE(old_mask_level)
159 #endif
160
161 /* Number of Cortex processor exceptions, used as an offset from XPSR value for the IRQn_Type macro. */
162 #define FSP_PRIV_CORTEX_PROCESSOR_EXCEPTIONS (16U)
163
164 /** Used to signify that the requested IRQ vector is not defined in this system. */
165 #define FSP_INVALID_VECTOR ((IRQn_Type) - 33)
166
167 /* Use the secure registers for secure projects and flat projects. */
168 #if !BSP_TZ_NONSECURE_BUILD && BSP_FEATURE_TZ_HAS_TRUSTZONE
169 #define FSP_PRIV_TZ_USE_SECURE_REGS (1)
170 #else
171 #define FSP_PRIV_TZ_USE_SECURE_REGS (0)
172 #endif
173
174 /***********************************************************************************************************************
175 * Typedef definitions
176 **********************************************************************************************************************/
177
178 /** Different warm start entry locations in the BSP. */
179 typedef enum e_bsp_warm_start_event
180 {
181 BSP_WARM_START_RESET = 0, ///< Called almost immediately after reset. No C runtime environment, clocks, or IRQs.
182 BSP_WARM_START_POST_CLOCK, ///< Called after clock initialization. No C runtime environment or IRQs.
183 BSP_WARM_START_POST_C ///< Called after clocks and C runtime environment have been set up
184 } bsp_warm_start_event_t;
185
186 #ifndef BSP_OVERRIDE_FSP_PRIV_CLOCK_T
187
188 /* Private enum used in R_FSP_SystemClockHzGet. */
189 typedef enum e_fsp_priv_clock
190 {
191 FSP_PRIV_CLOCK_ICLK = 0, /* Cortex-A55 Clock */
192 FSP_PRIV_CLOCK_I2CLK, /* Cortex-M33 Clock */
193 FSP_PRIV_CLOCK_GCLK, /* GPU Clock */
194 FSP_PRIV_CLOCK_S0CLK, /* DDR-PHY Clock */
195 FSP_PRIV_CLOCK_SPI0CLK, /* SPI0 Clock */
196 FSP_PRIV_CLOCK_SPI1CLK, /* SPI1 Clock */
197 FSP_PRIV_CLOCK_SD0CLK, /* SDH0 Clock */
198 FSP_PRIV_CLOCK_SD1CLK, /* SDH1 Clock */
199 FSP_PRIV_CLOCK_M0CLK, /* VCP, LCDC Clock */
200 FSP_PRIV_CLOCK_M1CLK, /* MIPI-DSI, MIPI-CSI Clock */
201 FSP_PRIV_CLOCK_M2CLK, /* CRU, MIPI-DSI Clock */
202 FSP_PRIV_CLOCK_M3CLK, /* MIPI-DSI, LCDC Clock */
203 FSP_PRIV_CLOCK_M4CLK, /* MIPI-DSI Clock */
204 FSP_PRIV_CLOCK_HPCLK, /* Ethernet Clock */
205 FSP_PRIV_CLOCK_TSUCLK, /* TSU Clock */
206 FSP_PRIV_CLOCK_ZTCLK, /* JAUTH Clock */
207 FSP_PRIV_CLOCK_P0CLK, /* APB-BUS Clock */
208 FSP_PRIV_CLOCK_P1CLK, /* AXI-BUS Clock */
209 FSP_PRIV_CLOCK_P2CLK, /* P2CLK */
210 FSP_PRIV_CLOCK_ATCLK, /* ATCLK */
211 FSP_PRIV_CLOCK_OSCCLK, /* OSC Clock */
212 FSP_PRIV_CLOCK_NUM,
213 } fsp_priv_clock_t;
214
215 #endif
216
217 typedef struct st_bsp_unique_id
218 {
219 union
220 {
221 uint32_t unique_id_words[4];
222 uint8_t unique_id_bytes[16];
223 };
224 } bsp_unique_id_t;
225
226 /***********************************************************************************************************************
227 * Exported global variables
228 **********************************************************************************************************************/
229
230 /***********************************************************************************************************************
231 * Global variables (defined in other files)
232 **********************************************************************************************************************/
233
234 /***********************************************************************************************************************
235 * Inline Functions
236 **********************************************************************************************************************/
237
238 /*******************************************************************************************************************//**
239 * Return active interrupt vector number value
240 *
241 * @return Active interrupt vector number value
242 **********************************************************************************************************************/
R_FSP_CurrentIrqGet(void)243 __STATIC_INLINE IRQn_Type R_FSP_CurrentIrqGet (void)
244 {
245 xPSR_Type xpsr_value;
246 xpsr_value.w = __get_xPSR();
247
248 return (IRQn_Type) (xpsr_value.b.ISR - FSP_PRIV_CORTEX_PROCESSOR_EXCEPTIONS);
249 }
250
251 /*******************************************************************************************************************//**
252 * Get unique ID is not supported in this device.
253 *
254 * @return A pointer to the unique identifier structure
255 **********************************************************************************************************************/
R_BSP_UniqueIdGet()256 __STATIC_INLINE bsp_unique_id_t const * R_BSP_UniqueIdGet ()
257 {
258 return (bsp_unique_id_t *) NULL;
259 }
260
261 /***********************************************************************************************************************
262 * Exported global functions (to be accessed by other files)
263 **********************************************************************************************************************/
264 uint32_t R_FSP_SystemClockHzGet(fsp_priv_clock_t clock);
265 void R_FSP_SystemClockHzSet(fsp_priv_clock_t clock, uint32_t clock_sel, uint32_t clock_div);
266
267 #if ((1 == BSP_CFG_ERROR_LOG) || (1 == BSP_CFG_ASSERT))
268
269 /** Prototype of default function called before errors are returned in FSP code if BSP_CFG_LOG_ERRORS is set to 1. */
270 void fsp_error_log(fsp_err_t err, const char * file, int32_t line);
271
272 #endif
273
274 /** In the event of an unrecoverable error the BSP will by default call the __BKPT() intrinsic function which will
275 * alert the user of the error. The user can override this default behavior by defining their own
276 * BSP_CFG_HANDLE_UNRECOVERABLE_ERROR macro.
277 */
278 #if !defined(BSP_CFG_HANDLE_UNRECOVERABLE_ERROR)
279
280 #define BSP_CFG_HANDLE_UNRECOVERABLE_ERROR(x) __BKPT((x))
281 #endif
282
283 /** @} (end addtogroup BSP_MCU) */
284
285 /** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
286 FSP_FOOTER
287
288 #endif
289
