Searched defs:BRR (Results 1 – 8 of 8) sorted by relevance
/loramac-node-latest/src/boards/SKiM881AXL/cmsis/ |
D | stm32l081xx.h | 313 …__IO uint32_t BRR; /*!< GPIO bit reset register, Address offset: 0x28… member 517 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ member
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/loramac-node-latest/src/boards/B-L072Z-LRWAN1/cmsis/ |
D | stm32l072xx.h | 330 …__IO uint32_t BRR; /*!< GPIO bit reset register, Address offset: 0x28… member 565 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ member
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/loramac-node-latest/src/boards/NucleoL073/cmsis/ |
D | stm32l073xx.h | 331 …__IO uint32_t BRR; /*!< GPIO bit reset register, Address offset: 0x28… member 579 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ member
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/loramac-node-latest/src/boards/NAMote72/cmsis/ |
D | stm32l152xc.h | 359 …__IO uint32_t BRR; /*!< GPIO bit reset register, Address offset: 0x28… member 583 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x08 */ member
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/loramac-node-latest/src/boards/NucleoL152/cmsis/ |
D | stm32l152xe.h | 368 …__IO uint32_t BRR; /*!< GPIO bit reset register, Address offset: 0x28… member 598 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x08 */ member
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/loramac-node-latest/src/boards/NucleoL476/cmsis/ |
D | stm32l476xx.h | 559 …__IO uint32_t BRR; /*!< GPIO Bit Reset register, Address offset: 0x28 */ member 878 __IO uint32_t BRR; /*!< SWPMI bitrate register, Address offset: 0x04 */ member 972 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ member
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/loramac-node-latest/src/boards/SKiM880B/cmsis/ |
D | stm32l151xba.h | 515 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x08 */ member
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/loramac-node-latest/src/boards/SKiM980A/cmsis/ |
D | stm32l151xba.h | 515 __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x08 */ member
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