1 /* 2 * Copyright 2017-2020 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef _BOARD_H_ 9 #define _BOARD_H_ 10 11 #include "clock_config.h" 12 #include "fsl_gpio.h" 13 14 /* SCFW includes */ 15 #include "main/rpc.h" 16 #include "svc/pm/pm_api.h" 17 #include "svc/irq/irq_api.h" 18 #include "svc/timer/timer_api.h" 19 #include "svc/misc/misc_api.h" 20 21 #if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED 22 #include "fsl_lpi2c.h" 23 #endif 24 25 /******************************************************************************* 26 * Definitions 27 ******************************************************************************/ 28 /*! @brief The board name */ 29 #define BOARD_NAME "MEK-MIMX8QM" 30 31 /* The UART to use for debug messages. */ 32 #define BOARD_DEBUG_UART_TYPE kSerialPort_Uart 33 #define BOARD_DEBUG_UART_BAUDRATE 115200u 34 35 #if defined(MIMX8QM_CM4_CORE0) 36 #define BOARD_DEBUG_UART_BASEADDR (uint32_t) CM4_0__LPUART 37 #define BOARD_DEBUG_UART_INSTANCE 0U 38 #define BOARD_DEBUG_UART_SC_RSRC SC_R_M4_0_UART 39 #define BOARD_DEBUG_UART_CLKSRC kCLOCK_M4_0_Lpuart 40 #define BOARD_UART_IRQ M4_0_LPUART_IRQn 41 #define BOARD_UART_IRQ_HANDLER M4_0_LPUART_IRQHandler 42 #define BOARD_M4_CPU_RSRC SC_R_M4_0_PID0 43 #elif defined(MIMX8QM_CM4_CORE1) 44 #define BOARD_DEBUG_UART_BASEADDR (uint32_t) DMA__LPUART2 45 #define BOARD_DEBUG_UART_INSTANCE 4U 46 #define BOARD_DEBUG_UART_SC_RSRC SC_R_UART_2 47 #define BOARD_DEBUG_UART_CLKSRC kCLOCK_DMA_Lpuart2 48 #define BOARD_UART_IRQ DMA_UART2_INT_IRQn 49 #define BOARD_UART_IRQ_HANDLER DMA_UART2_INT_IRQHandler 50 #define BOARD_M4_CPU_RSRC SC_R_M4_1_PID0 51 #else 52 #error "No valid BOARD_DEBUG_UART_BASEADDR defined." 53 #endif 54 55 #define BOARD_ENET0_PHY_ADDRESS (0x00) 56 57 /* DISPLAY 0: MIPI DSI0. */ 58 #define BOARD_DISPLAY0_I2C_BASEADDR DI_MIPI_0__LPI2C0 59 #define BOARD_DISPLAY0_I2C_RSRC SC_R_MIPI_0_I2C_0 60 61 /* DISPLAY 1: MIPI DSI1. */ 62 #define BOARD_DISPLAY1_I2C_BASEADDR DI_MIPI_1__LPI2C0 63 #define BOARD_DISPLAY1_I2C_RSRC SC_R_MIPI_1_I2C_0 64 65 /* DISPLAY 2: LVDS0 CH0. */ 66 #define BOARD_DISPLAY2_I2C_BASEADDR DI_LVDS_0__LPI2C1 67 #define BOARD_DISPLAY2_I2C_RSRC SC_R_LVDS_0_I2C_0 /* LPI2C0 & LPI2C1 share one resource. */ 68 69 /* DISPLAY 3: LVDS0 CH1. */ 70 #define BOARD_DISPLAY3_I2C_BASEADDR DI_LVDS_0__LPI2C1 71 #define BOARD_DISPLAY3_I2C_RSRC SC_R_LVDS_0_I2C_0 /* LPI2C0 & LPI2C1 share one resource. */ 72 73 /* DISPLAY 4: LVDS1 CH0. */ 74 #define BOARD_DISPLAY4_I2C_BASEADDR DI_LVDS_1__LPI2C1 75 #define BOARD_DISPLAY4_I2C_RSRC SC_R_LVDS_1_I2C_0 /* LPI2C0 & LPI2C1 share one resource. */ 76 77 /* DISPLAY 5: LVDS1 CH1. */ 78 #define BOARD_DISPLAY5_I2C_BASEADDR DI_LVDS_1__LPI2C1 79 #define BOARD_DISPLAY5_I2C_RSRC SC_R_LVDS_1_I2C_0 /* LPI2C0 & LPI2C1 share one resource. */ 80 81 /* CAMERA 0: MIPI CSI 0. */ 82 #define BOARD_CAMERA0_I2C_BASEADDR MIPI_CSI_0__LPI2C 83 #define BOARD_CAMERA0_I2C_RSRC SC_R_CSI_0_I2C_0 84 85 /* CAMERA 1: MIPI CSI 1. */ 86 #define BOARD_CAMERA1_I2C_BASEADDR MIPI_CSI_1__LPI2C 87 #define BOARD_CAMERA1_I2C_RSRC SC_R_CSI_1_I2C_0 88 89 #define BOARD_CODEC_I2C_BASEADDR DMA__LPI2C1 90 #define BOARD_CODEC_I2C_CLOCK_FREQ CLOCK_GetIpFreq(kCLOCK_DMA_Lpi2c1) 91 #define BOARD_CODEC_I2C_INSTANCE 12U /* Codec I2C on CPU board: DMA__LPI2C1. */ 92 #define BOARD_CS42888_I2C_ADDR 0x48 93 #define BOARD_CS42888_I2C_INSTANCE 1U /* Codec I2C on AUDIO card: CM4_1__LPI2C1. */ 94 95 /* VRING used for communicate with Linux */ 96 #if defined(MIMX8QM_CM4_CORE0) 97 #define VDEV0_VRING_BASE (0x90000000U) 98 #define VDEV1_VRING_BASE (0x90010000U) 99 #elif defined(MIMX8QM_CM4_CORE1) 100 #define VDEV0_VRING_BASE (0x90100000U) 101 #define VDEV1_VRING_BASE (0x90110000U) 102 #else 103 #error "No valid VDEVn_VRING_BASE defined." 104 #endif 105 #define RESOURCE_TABLE_OFFSET (0xFF000) 106 107 /* VRING used for communicate between M40 and M41 */ 108 #define M40_M41_VRING_BASE (0x90200000U) 109 110 #if defined(__cplusplus) 111 extern "C" { 112 #endif /* __cplusplus */ 113 114 /******************************************************************************* 115 * API 116 ******************************************************************************/ 117 sc_ipc_t BOARD_InitRpc(void); 118 sc_ipc_t BOARD_GetRpcHandle(void); 119 void BOARD_InitDebugConsole(void); 120 void BOARD_InitMemory(void); 121 122 #if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED 123 void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz); 124 void BOARD_LPI2C_Deinit(LPI2C_Type *base); 125 status_t BOARD_LPI2C_Send(LPI2C_Type *base, 126 uint8_t deviceAddress, 127 uint32_t subAddress, 128 uint8_t subaddressSize, 129 uint8_t *txBuff, 130 uint8_t txBuffSize); 131 status_t BOARD_LPI2C_SendWithoutSubAddr(LPI2C_Type *base, 132 uint32_t baudRate_Hz, 133 uint8_t deviceAddress, 134 uint8_t *txBuff, 135 uint8_t txBuffSize, 136 uint8_t needStop); 137 status_t BOARD_LPI2C_Receive(LPI2C_Type *base, 138 uint8_t deviceAddress, 139 uint32_t subAddress, 140 uint8_t subaddressSize, 141 uint8_t *rxBuff, 142 uint8_t rxBuffSize); 143 status_t BOARD_LPI2C_ReceiveWithoutSubAddr(LPI2C_Type *base, 144 uint32_t baudRate_Hz, 145 uint8_t deviceAddress, 146 uint8_t *txBuff, 147 uint8_t txBuffSize, 148 uint8_t needStop); 149 status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base, 150 uint8_t deviceAddress, 151 uint32_t subAddress, 152 uint8_t subaddressSize, 153 uint8_t *txBuff, 154 uint8_t txBuffSize); 155 status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base, 156 uint8_t deviceAddress, 157 uint32_t subAddress, 158 uint8_t subaddressSize, 159 uint8_t *rxBuff, 160 uint8_t rxBuffSize); 161 162 void BOARD_Display0_I2C_Init(void); 163 void BOARD_Display0_I2C_Deinit(void); 164 status_t BOARD_Display0_I2C_Send( 165 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 166 status_t BOARD_Display0_I2C_Receive( 167 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 168 169 void BOARD_Display1_I2C_Init(void); 170 void BOARD_Display1_I2C_Deinit(void); 171 status_t BOARD_Display1_I2C_Send( 172 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 173 status_t BOARD_Display1_I2C_Receive( 174 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 175 176 /* LVDS 0 CH 0 */ 177 void BOARD_Display2_I2C_Init(void); 178 void BOARD_Display2_I2C_Deinit(void); 179 status_t BOARD_Display2_I2C_Send( 180 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 181 status_t BOARD_Display2_I2C_Receive( 182 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 183 184 /* LVDS 0 CH 1 */ 185 void BOARD_Display3_I2C_Init(void); 186 void BOARD_Display3_I2C_Deinit(void); 187 status_t BOARD_Display3_I2C_Send( 188 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 189 status_t BOARD_Display3_I2C_Receive( 190 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 191 192 /* LVDS 1 CH 0 */ 193 void BOARD_Display4_I2C_Init(void); 194 void BOARD_Display4_I2C_Deinit(void); 195 status_t BOARD_Display4_I2C_Send( 196 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 197 status_t BOARD_Display4_I2C_Receive( 198 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 199 200 /* LVDS 1 CH 1 */ 201 void BOARD_Display5_I2C_Init(void); 202 void BOARD_Display5_I2C_Deinit(void); 203 status_t BOARD_Display5_I2C_Send( 204 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 205 status_t BOARD_Display5_I2C_Receive( 206 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 207 208 void BOARD_Camera0_I2C_Init(void); 209 void BOARD_Camera0_I2C_Deinit(void); 210 status_t BOARD_Camera0_I2C_SendSCCB( 211 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 212 status_t BOARD_Camera0_I2C_ReceiveSCCB( 213 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 214 215 void BOARD_Camera1_I2C_Init(void); 216 void BOARD_Camera1_I2C_Deinit(void); 217 status_t BOARD_Camera1_I2C_SendSCCB( 218 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 219 status_t BOARD_Camera1_I2C_ReceiveSCCB( 220 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 221 void BOARD_Codec_I2C_Init(void); 222 status_t BOARD_Codec_I2C_Send( 223 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize); 224 status_t BOARD_Codec_I2C_Receive( 225 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 226 #endif /* SDK_I2C_BASED_COMPONENT_USED */ 227 228 #if defined(__cplusplus) 229 } 230 #endif /* __cplusplus */ 231 232 #endif /* _BOARD_H_ */ 233