| /trusted-firmware-a-latest/plat/nxp/soc-ls1028a/ls1028ardb/ |
| D | plat_def.h | 47 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
50 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
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| /trusted-firmware-a-latest/plat/nxp/soc-lx2160a/lx2160ardb/ |
| D | plat_def.h | 52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
|
| /trusted-firmware-a-latest/plat/nxp/soc-lx2160a/lx2160aqds/ |
| D | plat_def.h | 52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
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| /trusted-firmware-a-latest/plat/nxp/soc-lx2160a/lx2162aqds/ |
| D | plat_def.h | 52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
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| /trusted-firmware-a-latest/plat/brcm/board/stingray/include/ |
| D | platform_def.h | 113 #define BL2_LIMIT (BL2_BASE + 0x40000) macro
119 #define BL2_LIMIT (BL2_BASE + 0x40000) macro
125 #define BL2_LIMIT (BRCM_BL_RAM_BASE + BRCM_BL_RAM_SIZE) macro
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| /trusted-firmware-a-latest/plat/nxp/soc-ls1043a/ls1043ardb/ |
| D | plat_def.h | 44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
|
| /trusted-firmware-a-latest/plat/nxp/soc-ls1046a/ls1046afrwy/ |
| D | plat_def.h | 44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
|
| /trusted-firmware-a-latest/plat/nxp/soc-ls1046a/ls1046aqds/ |
| D | plat_def.h | 44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
|
| /trusted-firmware-a-latest/plat/nxp/soc-ls1046a/ls1046ardb/ |
| D | plat_def.h | 44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
|
| /trusted-firmware-a-latest/plat/nxp/soc-ls1088a/ls1088ardb/ |
| D | plat_def.h | 42 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
|
| /trusted-firmware-a-latest/plat/nxp/soc-ls1088a/ls1088aqds/ |
| D | plat_def.h | 42 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
|
| /trusted-firmware-a-latest/plat/hisilicon/poplar/include/ |
| D | poplar_layout.h | 126 #define BL2_LIMIT (BL2_BASE + BL2_SIZE) macro
|
| /trusted-firmware-a-latest/plat/st/stm32mp2/include/ |
| D | platform_def.h | 61 #define BL2_LIMIT (STM32MP_BL2_BASE + \ macro
|
| /trusted-firmware-a-latest/plat/renesas/common/include/ |
| D | platform_def.h | 109 #define BL2_LIMIT U(0xE6320000) macro
111 #define BL2_LIMIT U(0xE6360000) macro
|
| /trusted-firmware-a-latest/plat/socionext/uniphier/include/ |
| D | platform_def.h | 54 #define BL2_LIMIT (BL2_BASE + UNIPHIER_BL2_MAX_SIZE) macro
|
| /trusted-firmware-a-latest/plat/hisilicon/hikey/include/ |
| D | hikey_layout.h | 64 #define BL2_LIMIT (0xF9830000) /* 0xf983_0000 */ macro
|
| /trusted-firmware-a-latest/plat/intel/soc/n5x/include/ |
| D | socfpga_plat_def.h | 69 #define BL2_LIMIT (0xffe1b000) macro
|
| /trusted-firmware-a-latest/plat/intel/soc/stratix10/include/ |
| D | socfpga_plat_def.h | 67 #define BL2_LIMIT (0xffe1b000) macro
|
| /trusted-firmware-a-latest/plat/hisilicon/hikey960/include/ |
| D | platform_def.h | 62 #define BL2_LIMIT (BL2_BASE + 0x58000) /* 1AC5_8000 */ macro
|
| /trusted-firmware-a-latest/include/plat/marvell/armada/a3k/common/ |
| D | marvell_def.h | 161 #define BL2_LIMIT BL31_BASE macro
|
| /trusted-firmware-a-latest/plat/intel/soc/agilex/include/ |
| D | socfpga_plat_def.h | 68 #define BL2_LIMIT (0xffe1b000) macro
|
| /trusted-firmware-a-latest/include/plat/marvell/armada/a8k/common/ |
| D | marvell_def.h | 197 #define BL2_LIMIT BL31_BASE macro
|
| /trusted-firmware-a-latest/plat/st/stm32mp1/include/ |
| D | platform_def.h | 51 #define BL2_LIMIT (STM32MP_BL2_BASE + \ macro
|
| /trusted-firmware-a-latest/plat/intel/soc/agilex5/include/ |
| D | socfpga_plat_def.h | 86 #define BL2_LIMIT (0x0001b000) macro
|
| /trusted-firmware-a-latest/include/plat/nuvoton/common/ |
| D | npcm845x_arm_def.h | 437 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) macro
443 #define BL2_LIMIT BL1_RW_BASE macro
|
