1 /****************************************************************************** 2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") 3 * All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 *****************************************************************************/ 18 #ifndef ISO_H_ 19 #define ISO_H_ 20 21 #define ISO_RX_EVENT_LENGTH (24) //Note: user can't modify this value,and this value must 4 byte aligned 22 #define CIS_TX_PDU_BUFFER_LENGTH (28) //Note: user can't modify this value,and this value must 4 byte aligned 23 #define BIS_TX_PDU_BUFFER_LENGTH (20) //Note: user can't modify this value,and this value must 4 byte aligned 24 /** 25 * @brief for user to initialize CIS ISO TX FIFO. 26 * @param[in] pRxbuf - TX FIFO buffer address(Tx buffer must concern all CISes). 27 * @param[in] fifo_size - TX FIFO size, size must be 4*n 28 * @param[in] fifo_number - TX FIFO number, can only be 4, 8, 16 or 32 29 * @return status, 0x00: succeed 30 * other: failed 31 */ 32 ble_sts_t blc_ll_initCisTxFifo(u8 *pTxbuf, int fifo_size, int fifo_number); 33 34 35 /** 36 * @brief for user to initialize CIS ISO RX FIFO. 37 * @param[in] pRxbuf - RX FIFO buffer address. 38 * @param[in] fifo_size - RX FIFO size, size must be 4*n 39 * @param[in] fifo_number - RX FIFO number, can only be 4, 8, 16 or 32 40 * @return status, 0x00: succeed 41 * other: failed 42 */ 43 ble_sts_t blc_ll_initCisRxFifo(u8 *pRxbuf, int fifo_size, int fifo_number); 44 45 46 /** 47 * @brief for user to initialize CIS RX EVT FIFO. 48 * @param[in] pRxbuf - RX FIFO buffer address. 49 * @param[in] fifo_size - RX FIFO size, size must be 4*n 50 * @param[in] fifo_number - RX FIFO number, can only be 4, 8, 16 or 32 51 * @return status, 0x00: succeed 52 * other: failed 53 */ 54 ble_sts_t blc_ll_initCisRxEvtFifo(u8 *pRxbuf, int fifo_size, int fifo_number); 55 56 57 /** 58 * @brief for user to initialize BIS ISO TX FIFO. 59 * @param[in] pRxbuf - TX FIFO buffer address. 60 * @param[in] fifo_size - RX FIFO size 61 * @param[in] fifo_number - RX FIFO number, can only be 4, 8, 16 or 32 62 * @return status, 0x00: succeed 63 * other: failed 64 */ 65 ble_sts_t blc_ll_initBisTxFifo(u8 *pTxbuf, int fifo_size, int fifo_number); 66 67 68 /** 69 * @brief for user to initialize BIS ISO RX FIFO. 70 * @param[in] pRxbuf - RX FIFO buffer address. 71 * @param[in] fifo_size - RX FIFO size 72 * @param[in] fifo_number - RX FIFO number, can only be 4, 8, 16 or 32 73 * @return status, 0x00: succeed 74 * other: failed 75 */ 76 //ble_sts_t blc_ll_initBisRxFifo(u8 *pRxbuf, int fifo_size, int fifo_number); 77 ble_sts_t blc_ll_initBisRxFifo(u8 *pRxbuf, int full_size, int fifo_number, u8 bis_sync_num); 78 79 /** 80 * @brief this function is used by the Host to enable LL feature of Isochronous channels, 81 * @param[in] en - 1:enable 0: disable. 82 * @return status, 0x00: succeed 83 * other: failed 84 */ 85 ble_sts_t blc_setHostFeatureISOChannel_en(u8 en); 86 87 88 #endif 89 90 91
