1 /***************************************************************************//** 2 * \file cyip_backup_v3.h 3 * 4 * \brief 5 * BACKUP IP definitions 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2023), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #ifndef _CYIP_BACKUP_V3_H_ 28 #define _CYIP_BACKUP_V3_H_ 29 30 #include "cyip_headers.h" 31 32 /******************************************************************************* 33 * BACKUP 34 *******************************************************************************/ 35 36 #define BACKUP_V3_SECTION_SIZE 0x00010000UL 37 38 /** 39 * \brief SRSS Backup Domain (ver3) (BACKUP) 40 */ 41 typedef struct { 42 __IOM uint32_t CTL; /*!< 0x00000000 Control */ 43 __IM uint32_t RESERVED; 44 __IOM uint32_t RTC_RW; /*!< 0x00000008 RTC Read Write register */ 45 __IOM uint32_t CAL_CTL; /*!< 0x0000000C Oscillator calibration for absolute frequency */ 46 __IM uint32_t STATUS; /*!< 0x00000010 Status */ 47 __IOM uint32_t RTC_TIME; /*!< 0x00000014 Calendar Seconds, Minutes, Hours, Day of Week */ 48 __IOM uint32_t RTC_DATE; /*!< 0x00000018 Calendar Day of Month, Month, Year */ 49 __IOM uint32_t ALM1_TIME; /*!< 0x0000001C Alarm 1 Seconds, Minute, Hours, Day of Week */ 50 __IOM uint32_t ALM1_DATE; /*!< 0x00000020 Alarm 1 Day of Month, Month */ 51 __IOM uint32_t ALM2_TIME; /*!< 0x00000024 Alarm 2 Seconds, Minute, Hours, Day of Week */ 52 __IOM uint32_t ALM2_DATE; /*!< 0x00000028 Alarm 2 Day of Month, Month */ 53 __IOM uint32_t INTR; /*!< 0x0000002C Interrupt request register */ 54 __IOM uint32_t INTR_SET; /*!< 0x00000030 Interrupt set request register */ 55 __IOM uint32_t INTR_MASK; /*!< 0x00000034 Interrupt mask register */ 56 __IM uint32_t INTR_MASKED; /*!< 0x00000038 Interrupt masked request register */ 57 __IM uint32_t RESERVED1[2]; 58 __IOM uint32_t PMIC_CTL; /*!< 0x00000044 PMIC control register */ 59 __IOM uint32_t RESET; /*!< 0x00000048 Backup reset register */ 60 __IM uint32_t RESERVED2[13]; 61 __IOM uint32_t LPECO_CTL; /*!< 0x00000080 Low-power external crystal oscillator control */ 62 __IOM uint32_t LPECO_PRESCALE; /*!< 0x00000084 Low-power external crystal oscillator prescaler */ 63 __IM uint32_t LPECO_STATUS; /*!< 0x00000088 Low-power external crystal oscillator status */ 64 __IM uint32_t RESERVED3[989]; 65 __IOM uint32_t BREG[64]; /*!< 0x00001000 Backup register region */ 66 } BACKUP_V3_Type; /*!< Size = 4352 (0x1100) */ 67 68 69 /* BACKUP.CTL */ 70 #define BACKUP_V3_CTL_WCO_EN_Pos 3UL 71 #define BACKUP_V3_CTL_WCO_EN_Msk 0x8UL 72 #define BACKUP_V3_CTL_CLK_SEL_Pos 8UL 73 #define BACKUP_V3_CTL_CLK_SEL_Msk 0x300UL 74 #define BACKUP_V3_CTL_PRESCALER_Pos 12UL 75 #define BACKUP_V3_CTL_PRESCALER_Msk 0x3000UL 76 #define BACKUP_V3_CTL_WCO_BYPASS_Pos 16UL 77 #define BACKUP_V3_CTL_WCO_BYPASS_Msk 0x10000UL 78 #define BACKUP_V3_CTL_VDDBAK_CTL_Pos 17UL 79 #define BACKUP_V3_CTL_VDDBAK_CTL_Msk 0x60000UL 80 #define BACKUP_V3_CTL_VBACKUP_MEAS_Pos 19UL 81 #define BACKUP_V3_CTL_VBACKUP_MEAS_Msk 0x80000UL 82 #define BACKUP_V3_CTL_EN_CHARGE_KEY_Pos 24UL 83 #define BACKUP_V3_CTL_EN_CHARGE_KEY_Msk 0xFF000000UL 84 /* BACKUP.RTC_RW */ 85 #define BACKUP_V3_RTC_RW_READ_Pos 0UL 86 #define BACKUP_V3_RTC_RW_READ_Msk 0x1UL 87 #define BACKUP_V3_RTC_RW_WRITE_Pos 1UL 88 #define BACKUP_V3_RTC_RW_WRITE_Msk 0x2UL 89 /* BACKUP.CAL_CTL */ 90 #define BACKUP_V3_CAL_CTL_CALIB_VAL_Pos 0UL 91 #define BACKUP_V3_CAL_CTL_CALIB_VAL_Msk 0x3FUL 92 #define BACKUP_V3_CAL_CTL_CALIB_SIGN_Pos 6UL 93 #define BACKUP_V3_CAL_CTL_CALIB_SIGN_Msk 0x40UL 94 #define BACKUP_V3_CAL_CTL_CAL_SEL_Pos 28UL 95 #define BACKUP_V3_CAL_CTL_CAL_SEL_Msk 0x30000000UL 96 #define BACKUP_V3_CAL_CTL_CAL_OUT_Pos 31UL 97 #define BACKUP_V3_CAL_CTL_CAL_OUT_Msk 0x80000000UL 98 /* BACKUP.STATUS */ 99 #define BACKUP_V3_STATUS_RTC_BUSY_Pos 0UL 100 #define BACKUP_V3_STATUS_RTC_BUSY_Msk 0x1UL 101 #define BACKUP_V3_STATUS_WCO_OK_Pos 2UL 102 #define BACKUP_V3_STATUS_WCO_OK_Msk 0x4UL 103 /* BACKUP.RTC_TIME */ 104 #define BACKUP_V3_RTC_TIME_RTC_SEC_Pos 0UL 105 #define BACKUP_V3_RTC_TIME_RTC_SEC_Msk 0x3FUL 106 #define BACKUP_V3_RTC_TIME_RTC_MIN_Pos 8UL 107 #define BACKUP_V3_RTC_TIME_RTC_MIN_Msk 0x3F00UL 108 #define BACKUP_V3_RTC_TIME_RTC_HOUR_Pos 16UL 109 #define BACKUP_V3_RTC_TIME_RTC_HOUR_Msk 0x1F0000UL 110 #define BACKUP_V3_RTC_TIME_CTRL_12HR_Pos 22UL 111 #define BACKUP_V3_RTC_TIME_CTRL_12HR_Msk 0x400000UL 112 #define BACKUP_V3_RTC_TIME_RTC_DAY_Pos 24UL 113 #define BACKUP_V3_RTC_TIME_RTC_DAY_Msk 0x7000000UL 114 /* BACKUP.RTC_DATE */ 115 #define BACKUP_V3_RTC_DATE_RTC_DATE_Pos 0UL 116 #define BACKUP_V3_RTC_DATE_RTC_DATE_Msk 0x1FUL 117 #define BACKUP_V3_RTC_DATE_RTC_MON_Pos 8UL 118 #define BACKUP_V3_RTC_DATE_RTC_MON_Msk 0xF00UL 119 #define BACKUP_V3_RTC_DATE_RTC_YEAR_Pos 16UL 120 #define BACKUP_V3_RTC_DATE_RTC_YEAR_Msk 0x7F0000UL 121 /* BACKUP.ALM1_TIME */ 122 #define BACKUP_V3_ALM1_TIME_ALM_SEC_Pos 0UL 123 #define BACKUP_V3_ALM1_TIME_ALM_SEC_Msk 0x3FUL 124 #define BACKUP_V3_ALM1_TIME_ALM_SEC_EN_Pos 7UL 125 #define BACKUP_V3_ALM1_TIME_ALM_SEC_EN_Msk 0x80UL 126 #define BACKUP_V3_ALM1_TIME_ALM_MIN_Pos 8UL 127 #define BACKUP_V3_ALM1_TIME_ALM_MIN_Msk 0x3F00UL 128 #define BACKUP_V3_ALM1_TIME_ALM_MIN_EN_Pos 15UL 129 #define BACKUP_V3_ALM1_TIME_ALM_MIN_EN_Msk 0x8000UL 130 #define BACKUP_V3_ALM1_TIME_ALM_HOUR_Pos 16UL 131 #define BACKUP_V3_ALM1_TIME_ALM_HOUR_Msk 0x1F0000UL 132 #define BACKUP_V3_ALM1_TIME_ALM_HOUR_EN_Pos 23UL 133 #define BACKUP_V3_ALM1_TIME_ALM_HOUR_EN_Msk 0x800000UL 134 #define BACKUP_V3_ALM1_TIME_ALM_DAY_Pos 24UL 135 #define BACKUP_V3_ALM1_TIME_ALM_DAY_Msk 0x7000000UL 136 #define BACKUP_V3_ALM1_TIME_ALM_DAY_EN_Pos 31UL 137 #define BACKUP_V3_ALM1_TIME_ALM_DAY_EN_Msk 0x80000000UL 138 /* BACKUP.ALM1_DATE */ 139 #define BACKUP_V3_ALM1_DATE_ALM_DATE_Pos 0UL 140 #define BACKUP_V3_ALM1_DATE_ALM_DATE_Msk 0x1FUL 141 #define BACKUP_V3_ALM1_DATE_ALM_DATE_EN_Pos 7UL 142 #define BACKUP_V3_ALM1_DATE_ALM_DATE_EN_Msk 0x80UL 143 #define BACKUP_V3_ALM1_DATE_ALM_MON_Pos 8UL 144 #define BACKUP_V3_ALM1_DATE_ALM_MON_Msk 0xF00UL 145 #define BACKUP_V3_ALM1_DATE_ALM_MON_EN_Pos 15UL 146 #define BACKUP_V3_ALM1_DATE_ALM_MON_EN_Msk 0x8000UL 147 #define BACKUP_V3_ALM1_DATE_ALM_EN_Pos 31UL 148 #define BACKUP_V3_ALM1_DATE_ALM_EN_Msk 0x80000000UL 149 /* BACKUP.ALM2_TIME */ 150 #define BACKUP_V3_ALM2_TIME_ALM_SEC_Pos 0UL 151 #define BACKUP_V3_ALM2_TIME_ALM_SEC_Msk 0x3FUL 152 #define BACKUP_V3_ALM2_TIME_ALM_SEC_EN_Pos 7UL 153 #define BACKUP_V3_ALM2_TIME_ALM_SEC_EN_Msk 0x80UL 154 #define BACKUP_V3_ALM2_TIME_ALM_MIN_Pos 8UL 155 #define BACKUP_V3_ALM2_TIME_ALM_MIN_Msk 0x3F00UL 156 #define BACKUP_V3_ALM2_TIME_ALM_MIN_EN_Pos 15UL 157 #define BACKUP_V3_ALM2_TIME_ALM_MIN_EN_Msk 0x8000UL 158 #define BACKUP_V3_ALM2_TIME_ALM_HOUR_Pos 16UL 159 #define BACKUP_V3_ALM2_TIME_ALM_HOUR_Msk 0x1F0000UL 160 #define BACKUP_V3_ALM2_TIME_ALM_HOUR_EN_Pos 23UL 161 #define BACKUP_V3_ALM2_TIME_ALM_HOUR_EN_Msk 0x800000UL 162 #define BACKUP_V3_ALM2_TIME_ALM_DAY_Pos 24UL 163 #define BACKUP_V3_ALM2_TIME_ALM_DAY_Msk 0x7000000UL 164 #define BACKUP_V3_ALM2_TIME_ALM_DAY_EN_Pos 31UL 165 #define BACKUP_V3_ALM2_TIME_ALM_DAY_EN_Msk 0x80000000UL 166 /* BACKUP.ALM2_DATE */ 167 #define BACKUP_V3_ALM2_DATE_ALM_DATE_Pos 0UL 168 #define BACKUP_V3_ALM2_DATE_ALM_DATE_Msk 0x1FUL 169 #define BACKUP_V3_ALM2_DATE_ALM_DATE_EN_Pos 7UL 170 #define BACKUP_V3_ALM2_DATE_ALM_DATE_EN_Msk 0x80UL 171 #define BACKUP_V3_ALM2_DATE_ALM_MON_Pos 8UL 172 #define BACKUP_V3_ALM2_DATE_ALM_MON_Msk 0xF00UL 173 #define BACKUP_V3_ALM2_DATE_ALM_MON_EN_Pos 15UL 174 #define BACKUP_V3_ALM2_DATE_ALM_MON_EN_Msk 0x8000UL 175 #define BACKUP_V3_ALM2_DATE_ALM_EN_Pos 31UL 176 #define BACKUP_V3_ALM2_DATE_ALM_EN_Msk 0x80000000UL 177 /* BACKUP.INTR */ 178 #define BACKUP_V3_INTR_ALARM1_Pos 0UL 179 #define BACKUP_V3_INTR_ALARM1_Msk 0x1UL 180 #define BACKUP_V3_INTR_ALARM2_Pos 1UL 181 #define BACKUP_V3_INTR_ALARM2_Msk 0x2UL 182 #define BACKUP_V3_INTR_CENTURY_Pos 2UL 183 #define BACKUP_V3_INTR_CENTURY_Msk 0x4UL 184 /* BACKUP.INTR_SET */ 185 #define BACKUP_V3_INTR_SET_ALARM1_Pos 0UL 186 #define BACKUP_V3_INTR_SET_ALARM1_Msk 0x1UL 187 #define BACKUP_V3_INTR_SET_ALARM2_Pos 1UL 188 #define BACKUP_V3_INTR_SET_ALARM2_Msk 0x2UL 189 #define BACKUP_V3_INTR_SET_CENTURY_Pos 2UL 190 #define BACKUP_V3_INTR_SET_CENTURY_Msk 0x4UL 191 /* BACKUP.INTR_MASK */ 192 #define BACKUP_V3_INTR_MASK_ALARM1_Pos 0UL 193 #define BACKUP_V3_INTR_MASK_ALARM1_Msk 0x1UL 194 #define BACKUP_V3_INTR_MASK_ALARM2_Pos 1UL 195 #define BACKUP_V3_INTR_MASK_ALARM2_Msk 0x2UL 196 #define BACKUP_V3_INTR_MASK_CENTURY_Pos 2UL 197 #define BACKUP_V3_INTR_MASK_CENTURY_Msk 0x4UL 198 /* BACKUP.INTR_MASKED */ 199 #define BACKUP_V3_INTR_MASKED_ALARM1_Pos 0UL 200 #define BACKUP_V3_INTR_MASKED_ALARM1_Msk 0x1UL 201 #define BACKUP_V3_INTR_MASKED_ALARM2_Pos 1UL 202 #define BACKUP_V3_INTR_MASKED_ALARM2_Msk 0x2UL 203 #define BACKUP_V3_INTR_MASKED_CENTURY_Pos 2UL 204 #define BACKUP_V3_INTR_MASKED_CENTURY_Msk 0x4UL 205 /* BACKUP.PMIC_CTL */ 206 #define BACKUP_V3_PMIC_CTL_UNLOCK_Pos 8UL 207 #define BACKUP_V3_PMIC_CTL_UNLOCK_Msk 0xFF00UL 208 #define BACKUP_V3_PMIC_CTL_POLARITY_Pos 16UL 209 #define BACKUP_V3_PMIC_CTL_POLARITY_Msk 0x10000UL 210 #define BACKUP_V3_PMIC_CTL_PMIC_EN_OUTEN_Pos 29UL 211 #define BACKUP_V3_PMIC_CTL_PMIC_EN_OUTEN_Msk 0x20000000UL 212 #define BACKUP_V3_PMIC_CTL_PMIC_ALWAYSEN_Pos 30UL 213 #define BACKUP_V3_PMIC_CTL_PMIC_ALWAYSEN_Msk 0x40000000UL 214 #define BACKUP_V3_PMIC_CTL_PMIC_EN_Pos 31UL 215 #define BACKUP_V3_PMIC_CTL_PMIC_EN_Msk 0x80000000UL 216 /* BACKUP.RESET */ 217 #define BACKUP_V3_RESET_RESET_Pos 31UL 218 #define BACKUP_V3_RESET_RESET_Msk 0x80000000UL 219 /* BACKUP.LPECO_CTL */ 220 #define BACKUP_V3_LPECO_CTL_LPECO_CRANGE_Pos 4UL 221 #define BACKUP_V3_LPECO_CTL_LPECO_CRANGE_Msk 0x30UL 222 #define BACKUP_V3_LPECO_CTL_LPECO_FRANGE_Pos 8UL 223 #define BACKUP_V3_LPECO_CTL_LPECO_FRANGE_Msk 0x100UL 224 #define BACKUP_V3_LPECO_CTL_LPECO_AMP_SEL_Pos 12UL 225 #define BACKUP_V3_LPECO_CTL_LPECO_AMP_SEL_Msk 0x1000UL 226 #define BACKUP_V3_LPECO_CTL_LPECO_DIV_ENABLE_Pos 28UL 227 #define BACKUP_V3_LPECO_CTL_LPECO_DIV_ENABLE_Msk 0x10000000UL 228 #define BACKUP_V3_LPECO_CTL_LPECO_AMPDET_EN_Pos 30UL 229 #define BACKUP_V3_LPECO_CTL_LPECO_AMPDET_EN_Msk 0x40000000UL 230 #define BACKUP_V3_LPECO_CTL_LPECO_EN_Pos 31UL 231 #define BACKUP_V3_LPECO_CTL_LPECO_EN_Msk 0x80000000UL 232 /* BACKUP.LPECO_PRESCALE */ 233 #define BACKUP_V3_LPECO_PRESCALE_LPECO_DIV_ENABLED_Pos 0UL 234 #define BACKUP_V3_LPECO_PRESCALE_LPECO_DIV_ENABLED_Msk 0x1UL 235 #define BACKUP_V3_LPECO_PRESCALE_LPECO_FRAC_DIV_Pos 8UL 236 #define BACKUP_V3_LPECO_PRESCALE_LPECO_FRAC_DIV_Msk 0xFF00UL 237 #define BACKUP_V3_LPECO_PRESCALE_LPECO_INT_DIV_Pos 16UL 238 #define BACKUP_V3_LPECO_PRESCALE_LPECO_INT_DIV_Msk 0x3FF0000UL 239 /* BACKUP.LPECO_STATUS */ 240 #define BACKUP_V3_LPECO_STATUS_LPECO_AMPDET_OK_Pos 0UL 241 #define BACKUP_V3_LPECO_STATUS_LPECO_AMPDET_OK_Msk 0x1UL 242 #define BACKUP_V3_LPECO_STATUS_LPECO_READY_Pos 1UL 243 #define BACKUP_V3_LPECO_STATUS_LPECO_READY_Msk 0x2UL 244 /* BACKUP.BREG */ 245 #define BACKUP_V3_BREG_BREG_Pos 0UL 246 #define BACKUP_V3_BREG_BREG_Msk 0xFFFFFFFFUL 247 248 249 #endif /* _CYIP_BACKUP_V3_H_ */ 250 251 252 /* [] END OF FILE */ 253
