Searched defs:AUDIOPLL0PFDDOMAINEN (Results 1 – 13 of 13) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/ |
| D | MIMXRT758S_cm33_core1.h | 12060 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT758S_hifi1.h | 12024 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT758S_cm33_core0.h | 20834 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT758S_ezhv.h | 21575 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/ |
| D | MIMXRT735S_hifi1.h | 12024 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT735S_cm33_core1.h | 12060 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT735S_ezhv.h | 21575 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT735S_cm33_core0.h | 20834 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/ |
| D | MIMXRT798S_hifi1.h | 12024 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT798S_cm33_core1.h | 12060 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT798S_hifi4.h | 20773 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT798S_cm33_core0.h | 20834 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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| D | MIMXRT798S_ezhv.h | 21575 …__IO uint32_t AUDIOPLL0PFDDOMAINEN; /**< Audio PLL0 PFD Clock Enable, offset: 0x420 */ member
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