1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017, 2020 NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #include "fsl_asmc.h"
10 
11 /* Component ID definition, used by tools. */
12 #ifndef FSL_COMPONENT_ID
13 #define FSL_COMPONENT_ID "platform.drivers.asmc"
14 #endif
15 
16 /*!
17  * brief Configure the system to RUN power mode.
18  *
19  * param base ASMC peripheral base address.
20  * return ASMC configuration error code.
21  */
ASMC_SetPowerModeRun(ASMC_Type * base)22 status_t ASMC_SetPowerModeRun(ASMC_Type *base)
23 {
24     uint32_t reg;
25 
26     reg = base->PMCTRL;
27     /* configure Normal RUN mode */
28     reg &= ~ASMC_PMCTRL_RUNM_MASK;
29     reg |= ((uint32_t)kASMC_RunNormal << ASMC_PMCTRL_RUNM_SHIFT);
30     base->PMCTRL = reg;
31 
32     return kStatus_Success;
33 }
34 
35 #if (defined(FSL_FEATURE_ASMC_HAS_HIGH_SPEED_RUN_MODE) && FSL_FEATURE_ASMC_HAS_HIGH_SPEED_RUN_MODE)
36 /*!
37  * brief Configure the system to HSRUN power mode.
38  *
39  * param base ASMC peripheral base address.
40  * return ASMC configuration error code.
41  */
ASMC_SetPowerModeHsrun(ASMC_Type * base)42 status_t ASMC_SetPowerModeHsrun(ASMC_Type *base)
43 {
44     uint32_t reg;
45 
46     reg = base->PMCTRL;
47     /* configure High Speed RUN mode */
48     reg &= ~ASMC_PMCTRL_RUNM_MASK;
49     reg |= (kASMC_Hsrun << ASMC_PMCTRL_RUNM_SHIFT);
50     base->PMCTRL = reg;
51 
52     return kStatus_Success;
53 }
54 #endif /* FSL_FEATURE_ASMC_HAS_HIGH_SPEED_RUN_MODE */
55 
56 /*!
57  * brief Configure the system to WAIT power mode.
58  *
59  * param base ASMC peripheral base address.
60  * return ASMC configuration error code.
61  */
ASMC_SetPowerModeWait(ASMC_Type * base)62 status_t ASMC_SetPowerModeWait(ASMC_Type *base)
63 {
64     /* configure Normal Wait mode */
65     SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
66     __DSB();
67     __WFI();
68     __ISB();
69 
70     return kStatus_Success;
71 }
72 
73 /*!
74  * brief Configure the system to Stop power mode.
75  *
76  * param base ASMC peripheral base address.
77  * param  option Partial Stop mode option.
78  * return ASMC configuration error code.
79  */
ASMC_SetPowerModeStop(ASMC_Type * base,asmc_partial_stop_option_t option)80 status_t ASMC_SetPowerModeStop(ASMC_Type *base, asmc_partial_stop_option_t option)
81 {
82     uint32_t reg;
83 
84     /* configure the Partial Stop mode in Normal Stop mode */
85     reg = base->STOPCTRL;
86     reg &= ~ASMC_STOPCTRL_PSTOPO_MASK;
87     reg |= ((uint32_t)option << ASMC_STOPCTRL_PSTOPO_SHIFT);
88     base->STOPCTRL = reg;
89 
90     /* configure Normal Stop mode */
91     reg = base->PMCTRL;
92     reg &= ~ASMC_PMCTRL_STOPM_MASK;
93     reg |= ((uint32_t)kASMC_StopNormal << ASMC_PMCTRL_STOPM_SHIFT);
94     base->PMCTRL = reg;
95 
96     /* Set the SLEEPDEEP bit to enable deep sleep mode (stop mode) */
97     SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
98 
99     /* read back to make sure the configuration valid before entering stop mode */
100     (void)base->PMCTRL;
101     __DSB();
102     __WFI();
103     __ISB();
104 
105     return kStatus_Success;
106 }
107 
108 /*!
109  * brief Configure the system to VLPR power mode.
110  *
111  * param base ASMC peripheral base address.
112  * return ASMC configuration error code.
113  */
ASMC_SetPowerModeVlpr(ASMC_Type * base)114 status_t ASMC_SetPowerModeVlpr(ASMC_Type *base)
115 {
116     uint32_t reg;
117 
118     reg = base->PMCTRL;
119 
120     /* configure VLPR mode */
121     reg &= ~ASMC_PMCTRL_RUNM_MASK;
122     reg |= ((uint32_t)kASMC_RunVlpr << ASMC_PMCTRL_RUNM_SHIFT);
123     base->PMCTRL = reg;
124 
125     return kStatus_Success;
126 }
127 
128 /*!
129  * brief Configure the system to VLPW power mode.
130  *
131  * param base ASMC peripheral base address.
132  * return ASMC configuration error code.
133  */
ASMC_SetPowerModeVlpw(ASMC_Type * base)134 status_t ASMC_SetPowerModeVlpw(ASMC_Type *base)
135 {
136     /* configure VLPW mode */
137     /* Clear the SLEEPDEEP bit to disable deep sleep mode */
138     SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
139     __DSB();
140     __WFI();
141     __ISB();
142 
143     return kStatus_Success;
144 }
145 
146 /*!
147  * brief Configure the system to VLPS power mode.
148  *
149  * param base ASMC peripheral base address.
150  * return ASMC configuration error code.
151  */
ASMC_SetPowerModeVlps(ASMC_Type * base)152 status_t ASMC_SetPowerModeVlps(ASMC_Type *base)
153 {
154     uint32_t reg;
155 
156     /* configure VLPS mode */
157     reg = base->PMCTRL;
158     reg &= ~ASMC_PMCTRL_STOPM_MASK;
159     reg |= ((uint32_t)kASMC_StopVlps << ASMC_PMCTRL_STOPM_SHIFT);
160     base->PMCTRL = reg;
161 
162     /* Set the SLEEPDEEP bit to enable deep sleep mode */
163     SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
164 
165     /* read back to make sure the configuration valid before enter stop mode */
166     (void)base->PMCTRL;
167     __DSB();
168     __WFI();
169     __ISB();
170 
171     return kStatus_Success;
172 }
173 
174 /*!
175  * brief Configure the system to LLS power mode.
176  *
177  * param base ASMC peripheral base address.
178  * return ASMC configuration error code.
179  */
ASMC_SetPowerModeLls(ASMC_Type * base)180 status_t ASMC_SetPowerModeLls(ASMC_Type *base)
181 {
182     uint32_t reg;
183 
184     /* configure to LLS mode */
185     reg = base->PMCTRL;
186     reg &= ~ASMC_PMCTRL_STOPM_MASK;
187     reg |= ((uint32_t)kASMC_StopLls << ASMC_PMCTRL_STOPM_SHIFT);
188     base->PMCTRL = reg;
189 
190     /* Set the SLEEPDEEP bit to enable deep sleep mode */
191     SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
192 
193     /* read back to make sure the configuration valid before entering stop mode */
194     (void)base->PMCTRL;
195     __DSB();
196     __WFI();
197     __ISB();
198 
199     return kStatus_Success;
200 }
201 
202 /*!
203  * brief Configure the system to VLLS power mode.
204  *
205  * param base ASMC peripheral base address.
206  * return ASMC configuration error code.
207  */
ASMC_SetPowerModeVlls(ASMC_Type * base)208 status_t ASMC_SetPowerModeVlls(ASMC_Type *base)
209 {
210     uint32_t reg;
211 
212     /* configure to VLLS mode */
213     reg = base->PMCTRL;
214     reg &= ~ASMC_PMCTRL_STOPM_MASK;
215     reg |= ((uint32_t)kASMC_StopVlls << ASMC_PMCTRL_STOPM_SHIFT);
216     base->PMCTRL = reg;
217 
218     /* Set the SLEEPDEEP bit to enable deep sleep mode */
219     SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
220 
221     /* read back to make sure the configuration valid before enter stop mode */
222     (void)base->PMCTRL;
223     __DSB();
224     __WFI();
225     __ISB();
226 
227     return kStatus_Success;
228 }
229