1 /* 2 * Copyright 2020 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef DRIVER_GPIO_H_ 9 #define DRIVER_GPIO_H_ 10 11 #ifdef __cplusplus 12 extern "C" 13 { 14 #endif 15 16 #include "Driver_Common.h" 17 18 #define ARM_GPIO_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) /* API version */ 19 20 /*----- GPIO Logic Value -----*/ 21 #define ARM_GPIO_LOGIC_ZERO 0 22 #define ARM_GPIO_LOGIC_ONE 1 23 24 /*----- GPIO Interrupt Type -----*/ 25 #define ARM_GPIO_INTERRUPT_NONE 0x00U /* Disable Interrupt */ 26 #define ARM_GPIO_INTERRUPT_RISING_EDGE 0x01U /* Interrupt on Rising Edge */ 27 #define ARM_GPIO_INTERRUPT_FALLING_EDGE 0x02U /* Interrupt on Falling Edge */ 28 #define ARM_GPIO_INTERRUPT_RISING_FALLING_EDGE 0x03U /* Interrupt on Rising or Falling edge */ 29 #define ARM_GPIO_INTERRUPT_LOGIC_ONE 0x04U /* Interrupt on Logic Level One */ 30 #define ARM_GPIO_INTERRUPT_LOGIC_ZERO 0x05U /* Interrupt on Logic Level Zero */ 31 #define ARM_GPIO_INTERRUPT_MAX_CONFIG_PARA 0x06U /* Internal use and not used by user */ 32 33 /*----- GPIO Control Codes: Interrupt -----*/ 34 #define ARM_GPIO_CONTROL_INTERRUPT (0x01U) 35 #define ARM_GPIO_INTERRUPT_DISABLE (0x00U) 36 #define ARM_GPIO_INTERRUPT_ENABLE (0x01U) 37 38 typedef void (*ARM_GPIO_SignalEvent_t) (uint32_t pin); ///< Pointer to \ref ARM_GPIO_SignalEvent : Signal GPIO Event. 39 40 /** 41 \brief GPIO Driver Capabilities. 42 */ 43 typedef struct _ARM_GPIO_CAPABILITIES { 44 uint32_t irq : 1; ///< supports IRQ 45 uint32_t reserved : 31; ///< Reserved (must be zero) 46 } ARM_GPIO_CAPABILITIES; 47 48 /** 49 \brief Access structure of the GPIO Driver. 50 */ 51 typedef struct _ARM_DRIVER_GPIO { 52 ARM_DRIVER_VERSION (*GetVersion) (void); 53 ARM_GPIO_CAPABILITIES (*GetCapabilities)(void); 54 int32_t (*Initialize) (void); 55 int32_t (*Uninitialize) (void); 56 int32_t (*PowerControl) (ARM_POWER_STATE state); 57 /// Init Pin As Output 58 int32_t (*InitPinAsOutput)(uint32_t pin, uint32_t output_logic); 59 /// Init Pin as Input with or without interrupt enabled , with or without callback if interrupt is requested 60 int32_t (*InitPinAsInput)(uint32_t pin, uint32_t irq_type, ARM_GPIO_SignalEvent_t cb_event); 61 /// Write pin with ARM_GPIO_LOGIC_[ONE|ZERO] 62 int32_t (*PinWrite) (uint32_t pin, uint32_t logic_value); 63 /// Toggle specified Pin 64 int32_t (*PinToggle) (uint32_t pin); 65 /// Read Logic value from pin. false stands for logic zero, true stands for logic one. 66 bool (*PinRead) (uint32_t pin); 67 /// Write selected pins with logic one or zero. Example, pin0 and pin 4, ored_pins = (0x01U << 0U) | (0x01 << 4U) 68 int32_t (*PortWrite) (uint32_t ored_pins, uint32_t logic_value); 69 /// Toggle selected pins. Example, pin0 and pin 4, ored_pins = (0x01U << 0U) | (0x01 << 4U) 70 int32_t (*PortToggle) (uint32_t ored_pins); 71 /// Read all pins status for this GPIO interface. use (read_value & (0x01U << 4)) to decide whether pin4 is logic one or logic zero 72 uint32_t (*PortRead)(void); 73 /// Configuare the pin with field ARM_GPIO_CONTROL_[INTERRUPT] with value filled into arg. values are defined following the ARM_GPIO_CONTROL_XXX. 74 int32_t (*Control)(uint32_t pin, uint32_t control, uint32_t arg); 75 } const ARM_DRIVER_GPIO; 76 77 78 #ifdef __cplusplus 79 } 80 #endif 81 82 #endif /* DRIVER_GPIO_H_ */ 83
