1 /******************************************************************************
2 * Filename: aon_ioc.h
3 * Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
4 * Revision: 47343
5 *
6 * Description: Defines and prototypes for the AON IO Controller
7 *
8 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
41 //! \addtogroup aon_group
42 //! @{
43 //! \addtogroup aonioc_api
44 //! @{
45 //
46 //*****************************************************************************
47
48 #ifndef __AON_IOC_H__
49 #define __AON_IOC_H__
50
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include "../inc/hw_types.h"
65 #include "../inc/hw_memmap.h"
66 #include "../inc/hw_aon_ioc.h"
67 #include "debug.h"
68
69 //*****************************************************************************
70 //
71 // Defines for the drive strength
72 //
73 //*****************************************************************************
74 #define AONIOC_DRV_STR_1 0x00000000 // Lowest drive strength
75 #define AONIOC_DRV_STR_2 0x00000001
76 #define AONIOC_DRV_STR_3 0x00000003
77 #define AONIOC_DRV_STR_4 0x00000002
78 #define AONIOC_DRV_STR_5 0x00000006
79 #define AONIOC_DRV_STR_6 0x00000007
80 #define AONIOC_DRV_STR_7 0x00000005
81 #define AONIOC_DRV_STR_8 0x00000004 // Highest drive strength
82
83 #define AONIOC_DRV_LVL_MIN (AON_IOC_O_IOSTRMIN)
84 #define AONIOC_DRV_LVL_MED (AON_IOC_O_IOSTRMED)
85 #define AONIOC_DRV_LVL_MAX (AON_IOC_O_IOSTRMAX)
86
87 //*****************************************************************************
88 //
89 // API Functions and prototypes
90 //
91 //*****************************************************************************
92
93 //*****************************************************************************
94 //
95 //! \brief Configure drive strength values for the manual drive strength options.
96 //!
97 //! This function defines the general drive strength settings for the non-AUTO
98 //! drive strength options in the MCU IOC. Consequently, if all IOs are using the
99 //! automatic drive strength option this function has no effect.
100 //!
101 //! Changing the drive strength values affects all current modes (Low-Current,
102 //! High-Current, and Extended-Current). Current mode for individual IOs is set in
103 //! MCU IOC by \ref IOCIODrvStrengthSet().
104 //!
105 //! \note Values are Gray encoded. Simply incrementing values to increase drive
106 //! strength will not work.
107 //!
108 //! \param ui32DriveLevel
109 //! - \ref AONIOC_DRV_LVL_MIN : Minimum drive strength option. Default value is selected
110 //! to give minimum 2/4/8 mA @3.3V for Low-Current mode, High-Current mode,
111 //! and Extended-Current mode respectively.
112 //! - \ref AONIOC_DRV_LVL_MED : Medium drive strength option. Default value is selected
113 //! to give minimum 2/4/8 mA @2.5V for Low-Current mode, High-Current mode,
114 //! and Extended-Current mode respectively.
115 //! - \ref AONIOC_DRV_LVL_MAX : Maximum drive strength option. Default value is selected
116 //! to give minimum 2/4/8 mA @1.8V for Low-Current mode, High-Current mode,
117 //! and Extended-Current mode respectively.
118 //! \param ui32DriveStrength sets the value used by IOs configured as non-AUTO drive strength in MCU IOC.
119 //! - \ref AONIOC_DRV_STR_1 : Lowest drive strength
120 //! - \ref AONIOC_DRV_STR_2
121 //! - \ref AONIOC_DRV_STR_3
122 //! - \ref AONIOC_DRV_STR_4
123 //! - \ref AONIOC_DRV_STR_5
124 //! - \ref AONIOC_DRV_STR_6
125 //! - \ref AONIOC_DRV_STR_7
126 //! - \ref AONIOC_DRV_STR_8 : Highest drive strength
127 //!
128 //! \return None
129 //!
130 //! \sa \ref AONIOCDriveStrengthGet(), \ref IOCIODrvStrengthSet()
131 //
132 //*****************************************************************************
133 __STATIC_INLINE void
AONIOCDriveStrengthSet(uint32_t ui32DriveLevel,uint32_t ui32DriveStrength)134 AONIOCDriveStrengthSet(uint32_t ui32DriveLevel, uint32_t ui32DriveStrength)
135 {
136 ASSERT((ui32DriveLevel == AONIOC_DRV_LVL_MIN) ||
137 (ui32DriveLevel == AONIOC_DRV_LVL_MED) ||
138 (ui32DriveLevel == AONIOC_DRV_LVL_MAX));
139 ASSERT((ui32DriveStrength == AONIOC_DRV_STR_1) ||
140 (ui32DriveStrength == AONIOC_DRV_STR_2) ||
141 (ui32DriveStrength == AONIOC_DRV_STR_3) ||
142 (ui32DriveStrength == AONIOC_DRV_STR_4) ||
143 (ui32DriveStrength == AONIOC_DRV_STR_5) ||
144 (ui32DriveStrength == AONIOC_DRV_STR_6) ||
145 (ui32DriveStrength == AONIOC_DRV_STR_7) ||
146 (ui32DriveStrength == AONIOC_DRV_STR_8));
147
148 // Set the drive strength.
149 HWREG(AON_IOC_BASE + ui32DriveLevel) = ui32DriveStrength;
150 }
151
152 //*****************************************************************************
153 //
154 //! \brief Get a specific drive level setting for all IOs.
155 //!
156 //! Use this function to read the drive strength setting for a specific
157 //! IO drive level.
158 //!
159 //! \note Values are Gray encoded.
160 //!
161 //! \param ui32DriveLevel is the specific drive level to get the setting for.
162 //! - \ref AONIOC_DRV_LVL_MIN : Minimum drive strength option.
163 //! - \ref AONIOC_DRV_LVL_MED : Medium drive strength option.
164 //! - \ref AONIOC_DRV_LVL_MAX : Maximum drive strength option.
165 //!
166 //! \return Returns the requested drive strength level setting for all IOs.
167 //! Possible values are:
168 //! - \ref AONIOC_DRV_STR_1 : Lowest drive strength
169 //! - \ref AONIOC_DRV_STR_2
170 //! - \ref AONIOC_DRV_STR_3
171 //! - \ref AONIOC_DRV_STR_4
172 //! - \ref AONIOC_DRV_STR_5
173 //! - \ref AONIOC_DRV_STR_6
174 //! - \ref AONIOC_DRV_STR_7
175 //! - \ref AONIOC_DRV_STR_8 : Highest drive strength
176 //!
177 //! \sa AONIOCDriveStrengthSet()
178 //
179 //*****************************************************************************
180 __STATIC_INLINE uint32_t
AONIOCDriveStrengthGet(uint32_t ui32DriveLevel)181 AONIOCDriveStrengthGet(uint32_t ui32DriveLevel)
182 {
183 // Check the arguments.
184 ASSERT((ui32DriveLevel == AONIOC_DRV_LVL_MIN) ||
185 (ui32DriveLevel == AONIOC_DRV_LVL_MED) ||
186 (ui32DriveLevel == AONIOC_DRV_LVL_MAX));
187
188 // Return the drive strength value.
189 return( HWREG(AON_IOC_BASE + ui32DriveLevel) );
190 }
191
192 //*****************************************************************************
193 //
194 //! \brief Freeze the IOs.
195 //!
196 //! To retain the values of the output IOs during a powerdown/shutdown of the
197 //! device all IO latches in the AON domain should be frozen in their current
198 //! state. This ensures that software can regain control of the IOs after a
199 //! reboot without the IOs first falling back to the default values (i.e. input
200 //! and no pull).
201 //!
202 //! \return None
203 //!
204 //! \sa AONIOCFreezeDisable()
205 //
206 //*****************************************************************************
207 __STATIC_INLINE void
AONIOCFreezeEnable(void)208 AONIOCFreezeEnable(void)
209 {
210 // Set the AON IO latches as static.
211 HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = 0x0;
212 }
213
214 //*****************************************************************************
215 //
216 //! \brief Un-freeze the IOs.
217 //!
218 //! When rebooting the chip after it has entered powerdown/shutdown mode, the
219 //! software can regain control of the IOs by setting the IO latches as
220 //! transparent. The IOs should not be unfrozen before software has restored
221 //! the functionality of the IO.
222 //!
223 //! \return None
224 //!
225 //! \sa AONIOCFreezeEnable()
226 //
227 //*****************************************************************************
228 __STATIC_INLINE void
AONIOCFreezeDisable(void)229 AONIOCFreezeDisable(void)
230 {
231 // Set the AON IOC latches as transparent.
232 HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = AON_IOC_IOCLATCH_EN;
233 }
234
235 //*****************************************************************************
236 //
237 //! \brief Disable the 32kHz clock output.
238 //!
239 //! When outputting a 32 kHz clock on an IO, the output enable/disable functionality
240 //! in the IOC is bypassed. Therefore, the programmer needs to call this
241 //! function to disable the clock output.
242 //!
243 //! \return None
244 //!
245 //! \sa AONIOC32kHzOutputEnable()
246 //
247 //*****************************************************************************
248 __STATIC_INLINE void
AONIOC32kHzOutputDisable(void)249 AONIOC32kHzOutputDisable(void)
250 {
251 // Disable the LF clock output.
252 HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = AON_IOC_CLK32KCTL_OE_N;
253 }
254
255 //*****************************************************************************
256 //
257 //! \brief Enable the 32kHz clock output.
258 //!
259 //! When outputting a 32 kHz clock on an IO, the output enable/disable functionality
260 //! in the IOC is bypassed. Therefore, the programmer needs to call this
261 //! function to enable the clock output.
262 //!
263 //! \return None
264 //!
265 //! \sa AONIOC32kHzOutputDisable()
266 //
267 //*****************************************************************************
268 __STATIC_INLINE void
AONIOC32kHzOutputEnable(void)269 AONIOC32kHzOutputEnable(void)
270 {
271 // Enable the LF clock output.
272 HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = 0x0;
273 }
274
275 //*****************************************************************************
276 //
277 // Mark the end of the C bindings section for C++ compilers.
278 //
279 //*****************************************************************************
280 #ifdef __cplusplus
281 }
282 #endif
283
284 #endif // __AON_IOC_H__
285
286 //*****************************************************************************
287 //
288 //! Close the Doxygen group.
289 //! @}
290 //! @}
291 //
292 //*****************************************************************************
293
