Home
last modified time | relevance | path

Searched defs:ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h3737 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h3782 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h3782 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h3737 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h3737 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h3782 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h3881 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h4864 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h3784 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h3784 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h4864 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h4866 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h4866 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h3882 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h4866 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
DLPC55S66_cm33_core0.h4866 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core0.h4866 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
DLPC55S69_cm33_core1.h4866 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h3883 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h3885 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h3884 #define ANACTRL_FREQ_ME_CTRL_CAPVAL_SCALE_MASK (0x7FFFFFFFU) macro