1 /*! 2 * Copyright (c) 2015, Freescale Semiconductor, Inc. 3 * All rights reserved. 4 * 5 * \file BLEDefaults.h 6 * This is a header file for the default register values of the transceiver 7 * used for BLE mode. 8 * 9 * Redistribution and use in source and binary forms, with or without modification, 10 * are permitted provided that the following conditions are met: 11 * 12 * o Redistributions of source code must retain the above copyright notice, this list 13 * of conditions and the following disclaimer. 14 * 15 * o Redistributions in binary form must reproduce the above copyright notice, this 16 * list of conditions and the following disclaimer in the documentation and/or 17 * other materials provided with the distribution. 18 * 19 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its 20 * contributors may be used to endorse or promote products derived from this 21 * software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef __BLE_DEFAULTS_H__ 36 #define __BLE_DEFAULTS_H__ 37 38 39 /*! ********************************************************************************* 40 ************************************************************************************* 41 * Constants 42 ************************************************************************************* 43 ********************************************************************************** */ 44 #define USE_DCOC_MAGIC_NUMBERS 0 /* Set to 1 to use RAW register settings */ 45 #define OVERRIDE_ADC_SCALE_FACTOR 1 /* Use a manually defined ADC_SCALE_FACTOR */ 46 47 48 /* XCVR_CTRL Defaults */ 49 50 /* XCVR_CTRL */ 51 #define BLE_TGT_PWR_SRC_def_c 0x01 52 #define BLE_PROTOCOL_def_c 0x00 53 54 /* TSM Defaults (no PA ramp)*/ 55 56 /*TSM_CTRL*/ 57 #define BKPT_def_c 0xff 58 #define ABORT_ON_FREQ_TARG_def_c 0x00 59 #define ABORT_ON_CYCLE_SLIP_def_c 0x00 60 #define ABORT_ON_CTUNE_def_c 0x00 61 #define RX_ABORT_DIS_def_c 0x00 62 #define TX_ABORT_DIS_def_c 0x00 63 #define DATA_PADDING_EN_def_c 0x01 /* Turn on Data Padding */ 64 #define PA_RAMP_SEL_def_c 0x01 /* Use 2uS Ramp */ 65 #define FORCE_RX_EN_def_c 0x00 66 #define FORCE_TX_EN_def_c 0x00 67 68 /*PA_POWER*/ 69 #define PA_POWER_def_c 0x00 70 71 /*PA_BIAS_TBL0*/ 72 #define PA_BIAS3_def_c 0x00 73 #define PA_BIAS2_def_c 0x00 74 #define PA_BIAS1_def_c 0x00 75 #define PA_BIAS0_def_c 0x00 76 77 /*PA_BIAS_TBL1*/ 78 #define PA_BIAS7_def_c 0x00 79 #define PA_BIAS6_def_c 0x00 80 #define PA_BIAS5_def_c 0x00 81 #define PA_BIAS4_def_c 0x00 82 83 /*DATA_PAD_CTRL*/ 84 #define DATA_PAD_1ST_IDX_55_def_c 0x3E 85 #define DATA_PAD_1ST_IDX_AA_def_c 0x1E 86 87 /*TX DIG, PLL DIG */ 88 #define HPM_LSB_INVERT_def_c 0x3 89 #define HPM_DENOM_def_c 0x100 90 #define HPM_BANK_DELAY_def_c 0x4 91 #define HPM_SDM_DELAY_def_c 0x2 92 #define LP_SDM_DELAY_def_c 0x9 93 #define PLL_LFILT_CNTL_def_c 0x03 94 #define FSK_MODULATION_SCALE_1_def_c 0x0800 95 96 /*Analog: BBW Filter */ 97 98 /* XCVR_TZA_CTRL */ 99 #define BLE_TZA_CAP_TUNE_def_c 3 100 101 /* XCVR_BBF_CTRL */ 102 #define BLE_BBF_CAP_TUNE_def_c 4 103 #define BLE_BBF_RES_TUNE2_def_c 6 104 105 /*RX DIG: AGC, DCOC, and filtering */ 106 107 /*RX_CHF_COEFn*/ 108 /*Dig Channel- 580kHz (no IIR), 545kHz (with 700kHz IIR) */ 109 #define RX_CHF_COEF0_def_c 0xFE 110 #define RX_CHF_COEF1_def_c 0xFC 111 #define RX_CHF_COEF2_def_c 0xFA 112 #define RX_CHF_COEF3_def_c 0xFC 113 #define RX_CHF_COEF4_def_c 0x03 114 #define RX_CHF_COEF5_def_c 0x0F 115 #define RX_CHF_COEF6_def_c 0x1B 116 #define RX_CHF_COEF7_def_c 0x23 117 118 /*RX_DIG_CTRL*/ 119 #define RX_DIG_CTRL_def_c 0x10 120 #define RX_CH_FILT_BYPASS_def_c 0x00 121 #define RX_DEC_FILT_OSR_BLE_def_c 0x01 122 #define RX_INTERP_EN_def_c 0x00 123 #define RX_NORM_EN_BLE_def_c 0x00 124 #define RX_RSSI_EN_def_c 0x01 125 #define RX_AGC_EN_def_c 0x01 126 #define RX_DCOC_EN_def_c 0x01 127 #define RX_DCOC_CAL_EN_def_c 0x01 128 129 /* AGC_CTRL */ 130 /* AGC_CTRL_0 */ 131 #define AGC_DOWN_RSSI_THRESH_def_c 0xFF 132 #define AGC_UP_RSSI_THRESH_def_c 0xd0 133 #define AGC_DOWN_TZA_STEP_SZ_def_c 0x04 134 #define AGC_DOWN_BBF_STEP_SZ_def_c 0x02 135 #define AGC_UP_SRC_def_c 0x00 136 #define AGC_UP_EN_def_c 0x01 137 #define FREEZE_AGC_SRC_def_c 0x02 138 #define AGC_FREEZE_EN_def_c 0x01 139 #define SLOW_AGC_SRC_def_c 0x02 140 #define SLOW_AGC_EN_def_c 0x01 141 142 /* AGC_CTRL_1 */ 143 #define TZA_GAIN_SETTLE_TIME_def_c 0x0c 144 #define PRESLOW_EN_def_c 0x01 145 #define USER_BBF_GAIN_EN_def_c 0x00 146 #define USER_LNM_GAIN_EN_def_c 0x00 147 #define BBF_USER_GAIN_def_c 0x00 148 #define LNM_USER_GAIN_def_c 0x00 149 #define LNM_ALT_CODE_def_c 0x00 150 #define BBF_ALT_CODE_def_c 0x00 151 152 /* AGC_CTRL_2 */ 153 #define AGC_FAST_EXPIRE_def_c 0x2 154 #define TZA_PDET_THRESH_HI_def_c 0x02 155 #define TZA_PDET_THRESH_LO_def_c 0x01 156 #define BBF_PDET_THRESH_HI_def_c 0x06 157 #define BBF_PDET_THRESH_LO_def_c 0x01 158 #define BBF_GAIN_SETTLE_TIME_def_c 0x0c 159 #define TZA_PDET_RST_def_c 0x00 160 #define BBF_PDET_RST_def_c 0x00 161 162 /* AGC_CTRL_3 */ 163 #define AGC_UP_STEP_SZ_def_c 0x02 164 #define AGC_H2S_STEP_SZ_def_c 0x18 165 #define AGC_RSSI_DELT_H2S_def_c 0x0e 166 #define AGC_PDET_LO_DLY_def_c 0x07 167 #define AGC_UNFREEZE_TIME_def_c 0xfff 168 169 /* RSSI_CTRL 0*/ 170 #define RSSI_ADJ_def_c 0x00 171 #define RSSI_IIR_WEIGHT_def_c 0x03 172 #define RSSI_IIR_CW_WEIGHT_ENABLEDdef_c 0x02 173 #define RSSI_IIR_CW_WEIGHT_BYPASSEDdef_c 0x00 174 #define RSSI_DEC_EN_def_c 0x01 175 #define RSSI_HOLD_EN_def_c 0x01 176 #define RSSI_HOLD_SRC_def_c 0x00 177 #define RSSI_USE_VALS_def_c 0x01 178 179 /* RSSI_CTRL_1 */ 180 #define RSSI_ED_THRESH1_H_def_c 0x04 181 #define RSSI_ED_THRESH0_H_def_c 0x04 182 #define RSSI_ED_THRESH1_def_c 0xAC 183 #define RSSI_ED_THRESH0_def_c 0xA4 184 185 /* AGC_GAIN_TBL_03_00 */ 186 #define LNM_GAIN_00_def_c 0x00 187 #define BBF_GAIN_00_def_c 0x00 188 #define LNM_GAIN_01_def_c 0x00 189 #define BBF_GAIN_01_def_c 0x00 190 #define LNM_GAIN_02_def_c 0x00 191 #define BBF_GAIN_02_def_c 0x01 192 #define LNM_GAIN_03_def_c 0x01 193 #define BBF_GAIN_03_def_c 0x00 194 195 /* AGC_GAIN_TBL_07_04 */ 196 #define LNM_GAIN_04_def_c 0x01 197 #define BBF_GAIN_04_def_c 0x01 198 #define LNM_GAIN_05_def_c 0x02 199 #define BBF_GAIN_05_def_c 0x01 200 #define LNM_GAIN_06_def_c 0x02 201 #define BBF_GAIN_06_def_c 0x02 202 #define LNM_GAIN_07_def_c 0x02 203 #define BBF_GAIN_07_def_c 0x03 204 205 /* AGC_GAIN_TBL_11_08 */ 206 #define LNM_GAIN_08_def_c 0x02 207 #define BBF_GAIN_08_def_c 0x04 208 #define LNM_GAIN_09_def_c 0x03 209 #define BBF_GAIN_09_def_c 0x03 210 #define LNM_GAIN_10_def_c 0x03 211 #define BBF_GAIN_10_def_c 0x04 212 #define LNM_GAIN_11_def_c 0x03 213 #define BBF_GAIN_11_def_c 0x05 214 215 /* AGC_GAIN_TBL_15_12 */ 216 #define LNM_GAIN_12_def_c 0x04 217 #define BBF_GAIN_12_def_c 0x04 218 #define LNM_GAIN_13_def_c 0x04 219 #define BBF_GAIN_13_def_c 0x05 220 #define LNM_GAIN_14_def_c 0x04 221 #define BBF_GAIN_14_def_c 0x06 222 #define LNM_GAIN_15_def_c 0x05 223 #define BBF_GAIN_15_def_c 0x05 224 225 /* AGC_GAIN_TBL_19_16 */ 226 #define LNM_GAIN_16_def_c 0x05 227 #define BBF_GAIN_16_def_c 0x06 228 #define LNM_GAIN_17_def_c 0x05 229 #define BBF_GAIN_17_def_c 0x07 230 #define LNM_GAIN_18_def_c 0x06 231 #define BBF_GAIN_18_def_c 0x06 232 #define LNM_GAIN_19_def_c 0x06 233 #define BBF_GAIN_19_def_c 0x07 234 235 /* AGC_GAIN_TBL_23_20 */ 236 #define LNM_GAIN_20_def_c 0x06 237 #define BBF_GAIN_20_def_c 0x08 238 #define LNM_GAIN_21_def_c 0x07 239 #define BBF_GAIN_21_def_c 0x07 240 #define LNM_GAIN_22_def_c 0x07 241 #define BBF_GAIN_22_def_c 0x08 242 #define LNM_GAIN_23_def_c 0x07 243 #define BBF_GAIN_23_def_c 0x09 244 245 /* AGC_GAIN_TBL_26_24 */ 246 #define LNM_GAIN_24_def_c 0x08 247 #define BBF_GAIN_24_def_c 0x08 248 #define LNM_GAIN_25_def_c 0x08 249 #define BBF_GAIN_25_def_c 0x09 250 #define LNM_GAIN_26_def_c 0x08 251 #define BBF_GAIN_26_def_c 0x0A 252 253 /* TCA_AGC gain adjust */ 254 #define TCA_AGC_VAL_0_def_c 0x1E 255 #define TCA_AGC_VAL_1_def_c 0x34 256 #define TCA_AGC_VAL_2_def_c 0x25 257 #define TCA_AGC_VAL_3_def_c 0x3B 258 #define TCA_AGC_VAL_4_def_c 0x51 259 #define TCA_AGC_VAL_5_def_c 0x69 260 #define TCA_AGC_VAL_6_def_c 0x81 261 #define TCA_AGC_VAL_7_def_c 0x99 262 #define TCA_AGC_VAL_8_def_c 0xB1 263 264 /* BBF_RES_TUNE gain adjust */ 265 #define BBF_RES_TUNE_VAL_0_def_c 0x00 266 #define BBF_RES_TUNE_VAL_1_def_c 0x00 267 #define BBF_RES_TUNE_VAL_2_def_c 0x00 268 #define BBF_RES_TUNE_VAL_3_def_c 0x01 269 #define BBF_RES_TUNE_VAL_4_def_c 0x01 270 #define BBF_RES_TUNE_VAL_5_def_c 0x00 271 #define BBF_RES_TUNE_VAL_6_def_c 0x00 272 #define BBF_RES_TUNE_VAL_7_def_c 0x00 273 #define BBF_RES_TUNE_VAL_8_def_c 0x01 274 #define BBF_RES_TUNE_VAL_9_def_c 0x02 275 #define BBF_RES_TUNE_VAL_10_def_c 0x02 276 277 278 /*! ********************************************************************************* 279 * DCOC can be setup based on a set of raw register values (MAGIC NUMBERS) 280 * or based on a set of equations which allow for easier correction of DCOC 281 * operation during debug or testing. Setting the USE_DCOC_MAGIC_NUMBERS flag 282 * selects the use of raw register values 283 ********************************************************************************** */ 284 285 /* Common DCOC settings, independent of USE_DCOC_MAGIC_NUMBERS flag */ 286 /* DCOC_CTRL_0 */ 287 #define DCOC_CAL_DURATION_def_c 0x12 /* Max: 1F */ 288 #define DCOC_CORR_HOLD_TIME_def_c 0x51 /* Max: 7F - track continuously */ 289 #define DCOC_CORR_DLY_def_c 0x0C 290 #define ALPHA_RADIUS_IDX_def_c 0x03 291 #define ALPHAC_SCALE_IDX_def_c 0x01 292 #define SIGN_SCALE_IDX_def_c 0x03 293 #define DCOC_CORRECT_EN_def_c 0x01 294 #define DCOC_TRACK_EN_def_c 0x01 295 #define DCOC_MAN_def_c 0x00 296 297 /* DCOC Tracking & GearShift Control (Misc Registers) */ 298 #define DCOC_ALPHA_RADIUS_GS_IDX_def_c 05 /* Register: XCVR_ADC_TEST_CTRL */ 299 #define DCOC_ALPHAC_SCALE_GS_IDX_def_c 01 /* Register: XCVR_BBF_CTRL */ 300 #define DCOC_TRK_EST_GS_CNT_def_c 00 /* Register: XCVR_ANA_SPARE */ 301 #define IQMC_DC_GAIN_ADJ_EN_def_c 01 /* Register: XCVR_RX_ANA_CTRL */ 302 303 /* DCOC_CTRL_1 */ 304 #define TZA_CORR_POL_def_c 1 305 #define BBF_CORR_POL_def_c 1 306 #define TRACK_FROM_ZERO_def_c 0 307 308 /* DCOC_CAL_GAIN */ 309 #define DCOC_TZA_CAL_GAIN1_def_c 0x04 310 #define DCOC_BBF_CAL_GAIN1_def_c 0x04 311 #define DCOC_TZA_CAL_GAIN2_def_c 0x08 312 #define DCOC_BBF_CAL_GAIN2_def_c 0x04 313 #define DCOC_TZA_CAL_GAIN3_def_c 0x04 314 #define DCOC_BBF_CAL_GAIN3_def_c 0x08 315 316 /* DCOC_CAL_IIR */ 317 #define DCOC_CAL_IIR3A_IDX_def_c 0x01 318 #define DCOC_CAL_IIR2A_IDX_def_c 0x02 319 #define DCOC_CAL_IIR1A_IDX_def_c 0x02 320 321 #if USE_DCOC_MAGIC_NUMBERS /* Define raw register contents */ 322 323 /* DCOC_CAL_RCP */ 324 #define ALPHA_CALC_RECIP_def_c 0x00 325 #define TMP_CALC_RECIP_def_c 0x00 326 327 /* TCA_AGC_LIN_VAL_2_0 */ 328 #define TCA_AGC_LIN_VAL_0_def_c 0x00 329 #define TCA_AGC_LIN_VAL_1_def_c 0x00 330 #define TCA_AGC_LIN_VAL_2_def_c 0x00 331 332 /* TCA_AGC_LIN_VAL_5_3 */ 333 #define TCA_AGC_LIN_VAL_3_def_c 0x00 334 #define TCA_AGC_LIN_VAL_4_def_c 0x00 335 #define TCA_AGC_LIN_VAL_5_def_c 0x00 336 337 /* TCA_AGC_LIN_VAL_8_6 */ 338 #define TCA_AGC_LIN_VAL_6_def_c 0x00 339 #define TCA_AGC_LIN_VAL_7_def_c 0x00 340 #define TCA_AGC_LIN_VAL_8_def_c 0x00 341 342 /* BBF_RES_TUNE_LIN_VAL_3_0 */ 343 #define BBF_RES_TUNE_LIN_VAL_0_def_c 0x00 344 #define BBF_RES_TUNE_LIN_VAL_1_def_c 0x00 345 #define BBF_RES_TUNE_LIN_VAL_2_def_c 0x00 346 #define BBF_RES_TUNE_LIN_VAL_3_def_c 0x00 347 348 /* BBF_RES_TUNE_LIN_VAL_7_4 */ 349 #define BBF_RES_TUNE_LIN_VAL_4_def_c 0x00 350 #define BBF_RES_TUNE_LIN_VAL_5_def_c 0x00 351 #define BBF_RES_TUNE_LIN_VAL_6_def_c 0x00 352 #define BBF_RES_TUNE_LIN_VAL_7_def_c 0x00 353 354 /* BBF_RES_TUNE_LIN_VAL_10_8 */ 355 #define BBF_RES_TUNE_LIN_VAL_0_def_c 0x00 356 #define BBF_RES_TUNE_LIN_VAL_0_def_c 0x00 357 #define BBF_RES_TUNE_LIN_VAL_0_def_c 0x00 358 359 /* DCOC_TZA_STEP */ 360 #define DCOC_TZA_STEP_GAIN_00_def_c 0x00 361 #define DCOC_TZA_STEP_RCP_00_def_c 0x00 362 #define DCOC_TZA_STEP_GAIN_01_def_c 0x00 363 #define DCOC_TZA_STEP_RCP_01_def_c 0x00 364 #define DCOC_TZA_STEP_GAIN_02_def_c 0x00 365 #define DCOC_TZA_STEP_RCP_02_def_c 0x00 366 #define DCOC_TZA_STEP_GAIN_03_def_c 0x00 367 #define DCOC_TZA_STEP_RCP_03_def_c 0x00 368 #define DCOC_TZA_STEP_GAIN_04_def_c 0x00 369 #define DCOC_TZA_STEP_RCP_04_def_c 0x00 370 #define DCOC_TZA_STEP_GAIN_05_def_c 0x00 371 #define DCOC_TZA_STEP_RCP_05_def_c 0x00 372 #define DCOC_TZA_STEP_GAIN_06_def_c 0x00 373 #define DCOC_TZA_STEP_RCP_06_def_c 0x00 374 #define DCOC_TZA_STEP_GAIN_07_def_c 0x00 375 #define DCOC_TZA_STEP_RCP_07_def_c 0x00 376 #define DCOC_TZA_STEP_GAIN_08_def_c 0x00 377 #define DCOC_TZA_STEP_RCP_08_def_c 0x00 378 #define DCOC_TZA_STEP_GAIN_09_def_c 0x00 379 #define DCOC_TZA_STEP_RCP_09_def_c 0x00 380 #define DCOC_TZA_STEP_GAIN_10_def_c 0x00 381 #define DCOC_TZA_STEP_RCP_10_def_c 0x00 382 383 /* DCOC_CTRL_1 DCOC_CTRL_2 */ 384 #define BBF_STEP_def_c 0x00 385 #define BBF_STEP_RECIP_def_c 0x00 386 387 /* DCOC_CAL_RCP */ 388 #define RCP_GLHmGLLxGBL_def_c 0x00 389 #define RCP_GBHmGBL_def_c 0x00 390 391 #else /* USE_DCOC_MAGIC_NUMBERS == 0 */ 392 393 /* Uses unsigned inputs for val and biaspt */ 394 #define DCOC_ADD_BIAS(val,biaspt) ((val > biaspt) ? ((val-biaspt)) : ((biaspt+val))) /* Use when taking DCOC_OFFSET_n values to use for manual corrections */ 395 #define DCOC_REMOVE_BIAS(val,biaspt) ((val >= biaspt) ? ((val-biaspt)) : ((biaspt+val))) /* Use when writing desired values to DCOC_OFFSET_n register. */ 396 397 #define DB_TO_LINEAR(x) (pow(10,((x)/(double)20.0))) 398 #define ABS(x) ((x) > 0 ? (x) : -(x)) 399 #define MAX(x,y) ((x) > (y) ? (x) : (y)) 400 /* This scale factor will be copied to a variable which is overwritten by a trimmed variable if one is available from IFR. */ 401 #if OVERRIDE_ADC_SCALE_FACTOR 402 #define ADC_SCALE_FACTOR 2.25 /* Range: 1.8 to 2.2. Different ADC_GAIN needed for DCOC_Q CAL (I/Q gain mismatch) */ 403 #else 404 #define ADC_SCALE_FACTOR (DB_TO_LINEAR(-1.7)*(0x800)/((double)(1000))) 405 #endif 406 #define TZA_DCOC_STEP_RAW (((1.0)*1200)/((double)(0x100))) 407 #define BBF_DCOC_STEP_RAW (((1.0)*1200)/((double)(0x40))) 408 409 #define TCA_GAIN_DB_0_def_c ((double)(-0.525)) /* (-3)) */ 410 #define TCA_GAIN_DB_1_def_c ((double)(4.883)) /* (3)) */ 411 #define TCA_GAIN_DB_2_def_c ((double)(9.355)) /* (9)) */ 412 #define TCA_GAIN_DB_3_def_c ((double)(14.731)) /* (15)) */ 413 #define TCA_GAIN_DB_4_def_c ((double)(20.188)) /* (21)) */ 414 #define TCA_GAIN_DB_5_def_c ((double)(26.320)) /* (27)) */ 415 #define TCA_GAIN_DB_6_def_c ((double)(32.309)) /* (33)) */ 416 #define TCA_GAIN_DB_7_def_c ((double)(38.249)) /* (39)) */ 417 #define TCA_GAIN_DB_8_def_c ((double)(44.120)) /* (45)) */ 418 419 #define BBF_GAIN_DB_0_def_c ((double)(0)) /* (0)) */ 420 #define BBF_GAIN_DB_1_def_c ((double)(3.071)) /* (3)) */ 421 #define BBF_GAIN_DB_2_def_c ((double)(6.144)) /* (6)) */ 422 #define BBF_GAIN_DB_3_def_c ((double)(9.266)) /* (9)) */ 423 #define BBF_GAIN_DB_4_def_c ((double)(12.299)) /* (12)) */ 424 #define BBF_GAIN_DB_5_def_c ((double)(15.242)) /* (15)) */ 425 #define BBF_GAIN_DB_6_def_c ((double)(18.114)) /* (18)) */ 426 #define BBF_GAIN_DB_7_def_c ((double)(21.198)) /* (21)) */ 427 #define BBF_GAIN_DB_8_def_c ((double)(24.584)) /* (24)) */ 428 #define BBF_GAIN_DB_9_def_c ((double)(27.885)) /* (27)) */ 429 #define BBF_GAIN_DB_10_def_c ((double)(30.95)) /* (30)) */ 430 431 #endif /* USE_DCOC_MAGIC_NUMBERS */ 432 433 #endif /* __BLE_DEFAULTS_H__*/
