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Searched defs:ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h1700 #define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (0x100U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h1722 #define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (0x100U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h1725 #define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (0x100U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h1778 #define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (0x100U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h1702 #define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (0x100U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h1782 #define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (0x100U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h1856 #define ADC_ETC_CTRL_EXT0_TRIG_ENABLE_MASK (0x100U) macro