1 /****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL1_H__ 153 #define __ACTBL1_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 172 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 173 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 174 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 175 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 176 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 177 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 178 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 179 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 180 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 181 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 182 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 183 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 184 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 185 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 186 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 187 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 188 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 189 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 190 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 191 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 192 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 193 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/ 194 195 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 196 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 197 198 199 /* Reserved table signatures */ 200 201 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 202 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 203 204 /* 205 * These tables have been seen in the field, but no definition has been found 206 */ 207 #ifdef ACPI_UNDEFINED_TABLES 208 #define ACPI_SIG_ATKG "ATKG" 209 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 210 #define ACPI_SIG_IEIT "IEIT" 211 #endif 212 213 /* 214 * All tables must be byte-packed to match the ACPI specification, since 215 * the tables are provided by the system BIOS. 216 */ 217 #pragma pack(1) 218 219 /* 220 * Note: C bitfields are not used for this reason: 221 * 222 * "Bitfields are great and easy to read, but unfortunately the C language 223 * does not specify the layout of bitfields in memory, which means they are 224 * essentially useless for dealing with packed data in on-disk formats or 225 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 226 * this decision was a design error in C. Ritchie could have picked an order 227 * and stuck with it." Norman Ramsey. 228 * See http://stackoverflow.com/a/1053662/41661 229 */ 230 231 232 /******************************************************************************* 233 * 234 * Common subtable headers 235 * 236 ******************************************************************************/ 237 238 /* Generic subtable header (used in MADT, SRAT, etc.) */ 239 240 typedef struct acpi_subtable_header 241 { 242 UINT8 Type; 243 UINT8 Length; 244 245 } ACPI_SUBTABLE_HEADER; 246 247 248 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 249 250 typedef struct acpi_whea_header 251 { 252 UINT8 Action; 253 UINT8 Instruction; 254 UINT8 Flags; 255 UINT8 Reserved; 256 ACPI_GENERIC_ADDRESS RegisterRegion; 257 UINT64 Value; /* Value used with Read/Write register */ 258 UINT64 Mask; /* Bitmask required for this register instruction */ 259 260 } ACPI_WHEA_HEADER; 261 262 263 /******************************************************************************* 264 * 265 * ASF - Alert Standard Format table (Signature "ASF!") 266 * Revision 0x10 267 * 268 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 269 * 270 ******************************************************************************/ 271 272 typedef struct acpi_table_asf 273 { 274 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 275 276 } ACPI_TABLE_ASF; 277 278 279 /* ASF subtable header */ 280 281 typedef struct acpi_asf_header 282 { 283 UINT8 Type; 284 UINT8 Reserved; 285 UINT16 Length; 286 287 } ACPI_ASF_HEADER; 288 289 290 /* Values for Type field above */ 291 292 enum AcpiAsfType 293 { 294 ACPI_ASF_TYPE_INFO = 0, 295 ACPI_ASF_TYPE_ALERT = 1, 296 ACPI_ASF_TYPE_CONTROL = 2, 297 ACPI_ASF_TYPE_BOOT = 3, 298 ACPI_ASF_TYPE_ADDRESS = 4, 299 ACPI_ASF_TYPE_RESERVED = 5 300 }; 301 302 /* 303 * ASF subtables 304 */ 305 306 /* 0: ASF Information */ 307 308 typedef struct acpi_asf_info 309 { 310 ACPI_ASF_HEADER Header; 311 UINT8 MinResetValue; 312 UINT8 MinPollInterval; 313 UINT16 SystemId; 314 UINT32 MfgId; 315 UINT8 Flags; 316 UINT8 Reserved2[3]; 317 318 } ACPI_ASF_INFO; 319 320 /* Masks for Flags field above */ 321 322 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 323 324 325 /* 1: ASF Alerts */ 326 327 typedef struct acpi_asf_alert 328 { 329 ACPI_ASF_HEADER Header; 330 UINT8 AssertMask; 331 UINT8 DeassertMask; 332 UINT8 Alerts; 333 UINT8 DataLength; 334 335 } ACPI_ASF_ALERT; 336 337 typedef struct acpi_asf_alert_data 338 { 339 UINT8 Address; 340 UINT8 Command; 341 UINT8 Mask; 342 UINT8 Value; 343 UINT8 SensorType; 344 UINT8 Type; 345 UINT8 Offset; 346 UINT8 SourceType; 347 UINT8 Severity; 348 UINT8 SensorNumber; 349 UINT8 Entity; 350 UINT8 Instance; 351 352 } ACPI_ASF_ALERT_DATA; 353 354 355 /* 2: ASF Remote Control */ 356 357 typedef struct acpi_asf_remote 358 { 359 ACPI_ASF_HEADER Header; 360 UINT8 Controls; 361 UINT8 DataLength; 362 UINT16 Reserved2; 363 364 } ACPI_ASF_REMOTE; 365 366 typedef struct acpi_asf_control_data 367 { 368 UINT8 Function; 369 UINT8 Address; 370 UINT8 Command; 371 UINT8 Value; 372 373 } ACPI_ASF_CONTROL_DATA; 374 375 376 /* 3: ASF RMCP Boot Options */ 377 378 typedef struct acpi_asf_rmcp 379 { 380 ACPI_ASF_HEADER Header; 381 UINT8 Capabilities[7]; 382 UINT8 CompletionCode; 383 UINT32 EnterpriseId; 384 UINT8 Command; 385 UINT16 Parameter; 386 UINT16 BootOptions; 387 UINT16 OemParameters; 388 389 } ACPI_ASF_RMCP; 390 391 392 /* 4: ASF Address */ 393 394 typedef struct acpi_asf_address 395 { 396 ACPI_ASF_HEADER Header; 397 UINT8 EpromAddress; 398 UINT8 Devices; 399 400 } ACPI_ASF_ADDRESS; 401 402 /******************************************************************************* 403 * 404 * ASPT - AMD Secure Processor Table (Signature "ASPT") 405 * Revision 0x1 406 * 407 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification, 408 * 12 September 2022 409 * 410 ******************************************************************************/ 411 412 typedef struct acpi_table_aspt 413 { 414 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 415 UINT32 NumEntries; 416 417 } ACPI_TABLE_ASPT; 418 419 420 /* ASPT subtable header */ 421 422 typedef struct acpi_aspt_header 423 { 424 UINT16 Type; 425 UINT16 Length; 426 427 } ACPI_ASPT_HEADER; 428 429 430 /* Values for Type field above */ 431 432 enum AcpiAsptType 433 { 434 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 435 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 436 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 437 ACPI_ASPT_TYPE_UNKNOWN = 3, 438 }; 439 440 /* 441 * ASPT subtables 442 */ 443 444 /* 0: ASPT Global Registers */ 445 446 typedef struct acpi_aspt_global_regs 447 { 448 ACPI_ASPT_HEADER Header; 449 UINT32 Reserved; 450 UINT64 FeatureRegAddr; 451 UINT64 IrqEnRegAddr; 452 UINT64 IrqStRegAddr; 453 454 } ACPI_ASPT_GLOBAL_REGS; 455 456 457 /* 1: ASPT SEV Mailbox Registers */ 458 459 typedef struct acpi_aspt_sev_mbox_regs 460 { 461 ACPI_ASPT_HEADER Header; 462 UINT8 MboxIrqId; 463 UINT8 Reserved[3]; 464 UINT64 CmdRespRegAddr; 465 UINT64 CmdBufLoRegAddr; 466 UINT64 CmdBufHiRegAddr; 467 468 } ACPI_ASPT_SEV_MBOX_REGS; 469 470 471 /* 2: ASPT ACPI Mailbox Registers */ 472 473 typedef struct acpi_aspt_acpi_mbox_regs 474 { 475 ACPI_ASPT_HEADER Header; 476 UINT32 Reserved1; 477 UINT64 CmdRespRegAddr; 478 UINT64 Reserved2[2]; 479 480 } ACPI_ASPT_ACPI_MBOX_REGS; 481 482 483 /******************************************************************************* 484 * 485 * BERT - Boot Error Record Table (ACPI 4.0) 486 * Version 1 487 * 488 ******************************************************************************/ 489 490 typedef struct acpi_table_bert 491 { 492 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 493 UINT32 RegionLength; /* Length of the boot error region */ 494 UINT64 Address; /* Physical address of the error region */ 495 496 } ACPI_TABLE_BERT; 497 498 499 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 500 501 typedef struct acpi_bert_region 502 { 503 UINT32 BlockStatus; /* Type of error information */ 504 UINT32 RawDataOffset; /* Offset to raw error data */ 505 UINT32 RawDataLength; /* Length of raw error data */ 506 UINT32 DataLength; /* Length of generic error data */ 507 UINT32 ErrorSeverity; /* Severity code */ 508 509 } ACPI_BERT_REGION; 510 511 /* Values for BlockStatus flags above */ 512 513 #define ACPI_BERT_UNCORRECTABLE (1) 514 #define ACPI_BERT_CORRECTABLE (1<<1) 515 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 516 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 517 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 518 519 /* Values for ErrorSeverity above */ 520 521 enum AcpiBertErrorSeverity 522 { 523 ACPI_BERT_ERROR_CORRECTABLE = 0, 524 ACPI_BERT_ERROR_FATAL = 1, 525 ACPI_BERT_ERROR_CORRECTED = 2, 526 ACPI_BERT_ERROR_NONE = 3, 527 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 528 }; 529 530 /* 531 * Note: The generic error data that follows the ErrorSeverity field above 532 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 533 */ 534 535 536 /******************************************************************************* 537 * 538 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 539 * Version 1 540 * 541 ******************************************************************************/ 542 543 typedef struct acpi_table_bgrt 544 { 545 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 546 UINT16 Version; 547 UINT8 Status; 548 UINT8 ImageType; 549 UINT64 ImageAddress; 550 UINT32 ImageOffsetX; 551 UINT32 ImageOffsetY; 552 553 } ACPI_TABLE_BGRT; 554 555 /* Flags for Status field above */ 556 557 #define ACPI_BGRT_DISPLAYED (1) 558 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 559 560 561 /******************************************************************************* 562 * 563 * BOOT - Simple Boot Flag Table 564 * Version 1 565 * 566 * Conforms to the "Simple Boot Flag Specification", Version 2.1 567 * 568 ******************************************************************************/ 569 570 typedef struct acpi_table_boot 571 { 572 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 573 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */ 574 UINT8 Reserved[3]; 575 576 } ACPI_TABLE_BOOT; 577 578 579 /******************************************************************************* 580 * 581 * CDAT - Coherent Device Attribute Table 582 * Version 1 583 * 584 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 585 " (Revision 1.01, October 2020.) 586 * 587 ******************************************************************************/ 588 589 typedef struct acpi_table_cdat 590 { 591 UINT32 Length; /* Length of table in bytes, including this header */ 592 UINT8 Revision; /* ACPI Specification minor version number */ 593 UINT8 Checksum; /* To make sum of entire table == 0 */ 594 UINT8 Reserved[6]; 595 UINT32 Sequence; /* Used to detect runtime CDAT table changes */ 596 597 } ACPI_TABLE_CDAT; 598 599 600 /* CDAT common subtable header */ 601 602 typedef struct acpi_cdat_header 603 { 604 UINT8 Type; 605 UINT8 Reserved; 606 UINT16 Length; 607 608 } ACPI_CDAT_HEADER; 609 610 /* Values for Type field above */ 611 612 enum AcpiCdatType 613 { 614 ACPI_CDAT_TYPE_DSMAS = 0, 615 ACPI_CDAT_TYPE_DSLBIS = 1, 616 ACPI_CDAT_TYPE_DSMSCIS = 2, 617 ACPI_CDAT_TYPE_DSIS = 3, 618 ACPI_CDAT_TYPE_DSEMTS = 4, 619 ACPI_CDAT_TYPE_SSLBIS = 5, 620 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 621 }; 622 623 624 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 625 626 typedef struct acpi_cdat_dsmas 627 { 628 UINT8 DsmadHandle; 629 UINT8 Flags; 630 UINT16 Reserved; 631 UINT64 DpaBaseAddress; 632 UINT64 DpaLength; 633 634 } ACPI_CDAT_DSMAS; 635 636 /* Flags for subtable above */ 637 638 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 639 640 641 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 642 643 typedef struct acpi_cdat_dslbis 644 { 645 UINT8 Handle; 646 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches 647 * Flags field in HMAT System Locality Latency */ 648 UINT8 DataType; 649 UINT8 Reserved; 650 UINT64 EntryBaseUnit; 651 UINT16 Entry[3]; 652 UINT16 Reserved2; 653 654 } ACPI_CDAT_DSLBIS; 655 656 657 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 658 659 typedef struct acpi_cdat_dsmscis 660 { 661 UINT8 DsmasHandle; 662 UINT8 Reserved[3]; 663 UINT64 SideCacheSize; 664 UINT32 CacheAttributes; 665 666 } ACPI_CDAT_DSMSCIS; 667 668 669 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 670 671 typedef struct acpi_cdat_dsis 672 { 673 UINT8 Flags; 674 UINT8 Handle; 675 UINT16 Reserved; 676 677 } ACPI_CDAT_DSIS; 678 679 /* Flags for above subtable */ 680 681 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 682 683 684 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 685 686 typedef struct acpi_cdat_dsemts 687 { 688 UINT8 DsmasHandle; 689 UINT8 MemoryType; 690 UINT16 Reserved; 691 UINT64 DpaOffset; 692 UINT64 RangeLength; 693 694 } ACPI_CDAT_DSEMTS; 695 696 697 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 698 699 typedef struct acpi_cdat_sslbis 700 { 701 UINT8 DataType; 702 UINT8 Reserved[3]; 703 UINT64 EntryBaseUnit; 704 705 } ACPI_CDAT_SSLBIS; 706 707 708 /* Sub-subtable for above, SslbeEntries field */ 709 710 typedef struct acpi_cdat_sslbe 711 { 712 UINT16 PortxId; 713 UINT16 PortyId; 714 UINT16 LatencyOrBandwidth; 715 UINT16 Reserved; 716 717 } ACPI_CDAT_SSLBE; 718 719 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 720 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff 721 722 /******************************************************************************* 723 * 724 * CEDT - CXL Early Discovery Table 725 * Version 1 726 * 727 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 728 * 729 ******************************************************************************/ 730 731 typedef struct acpi_table_cedt 732 { 733 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 734 735 } ACPI_TABLE_CEDT; 736 737 /* CEDT subtable header (Performance Record Structure) */ 738 739 typedef struct acpi_cedt_header 740 { 741 UINT8 Type; 742 UINT8 Reserved; 743 UINT16 Length; 744 745 } ACPI_CEDT_HEADER; 746 747 /* Values for Type field above */ 748 749 enum AcpiCedtType 750 { 751 ACPI_CEDT_TYPE_CHBS = 0, 752 ACPI_CEDT_TYPE_CFMWS = 1, 753 ACPI_CEDT_TYPE_CXIMS = 2, 754 ACPI_CEDT_TYPE_RDPAS = 3, 755 ACPI_CEDT_TYPE_RESERVED = 4, 756 }; 757 758 /* Values for version field above */ 759 760 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 761 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 762 763 /* Values for length field above */ 764 765 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 766 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 767 768 /* 769 * CEDT subtables 770 */ 771 772 /* 0: CXL Host Bridge Structure */ 773 774 typedef struct acpi_cedt_chbs 775 { 776 ACPI_CEDT_HEADER Header; 777 UINT32 Uid; 778 UINT32 CxlVersion; 779 UINT32 Reserved; 780 UINT64 Base; 781 UINT64 Length; 782 783 } ACPI_CEDT_CHBS; 784 785 786 /* 1: CXL Fixed Memory Window Structure */ 787 788 typedef struct acpi_cedt_cfmws 789 { 790 ACPI_CEDT_HEADER Header; 791 UINT32 Reserved1; 792 UINT64 BaseHpa; 793 UINT64 WindowSize; 794 UINT8 InterleaveWays; 795 UINT8 InterleaveArithmetic; 796 UINT16 Reserved2; 797 UINT32 Granularity; 798 UINT16 Restrictions; 799 UINT16 QtgId; 800 UINT32 InterleaveTargets[]; 801 802 } ACPI_CEDT_CFMWS; 803 804 typedef struct acpi_cedt_cfmws_target_element 805 { 806 UINT32 InterleaveTarget; 807 808 } ACPI_CEDT_CFMWS_TARGET_ELEMENT; 809 810 /* Values for Interleave Arithmetic field above */ 811 812 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 813 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 814 815 /* Values for Restrictions field above */ 816 817 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 818 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 819 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 820 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 821 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 822 823 /* 2: CXL XOR Interleave Math Structure */ 824 825 struct acpi_cedt_cxims { 826 ACPI_CEDT_HEADER Header; 827 UINT16 Reserved1; 828 UINT8 Hbig; 829 UINT8 NrXormaps; 830 UINT64 XormapList[]; 831 }; 832 833 /* 3: CXL RCEC Downstream Port Association Structure */ 834 835 struct acpi_cedt_rdpas { 836 ACPI_CEDT_HEADER Header; 837 UINT8 Reserved1; 838 UINT16 Length; 839 UINT16 Segment; 840 UINT16 Bdf; 841 UINT8 Protocol; 842 UINT64 Address; 843 }; 844 845 /* Masks for bdf field above */ 846 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 847 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 848 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 849 850 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 851 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 852 853 /******************************************************************************* 854 * 855 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 856 * Version 1 857 * 858 ******************************************************************************/ 859 860 typedef struct acpi_table_cpep 861 { 862 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 863 UINT64 Reserved; 864 865 } ACPI_TABLE_CPEP; 866 867 868 /* Subtable */ 869 870 typedef struct acpi_cpep_polling 871 { 872 ACPI_SUBTABLE_HEADER Header; 873 UINT8 Id; /* Processor ID */ 874 UINT8 Eid; /* Processor EID */ 875 UINT32 Interval; /* Polling interval (msec) */ 876 877 } ACPI_CPEP_POLLING; 878 879 880 /******************************************************************************* 881 * 882 * CSRT - Core System Resource Table 883 * Version 0 884 * 885 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 886 * 887 ******************************************************************************/ 888 889 typedef struct acpi_table_csrt 890 { 891 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 892 893 } ACPI_TABLE_CSRT; 894 895 896 /* Resource Group subtable */ 897 898 typedef struct acpi_csrt_group 899 { 900 UINT32 Length; 901 UINT32 VendorId; 902 UINT32 SubvendorId; 903 UINT16 DeviceId; 904 UINT16 SubdeviceId; 905 UINT16 Revision; 906 UINT16 Reserved; 907 UINT32 SharedInfoLength; 908 909 /* Shared data immediately follows (Length = SharedInfoLength) */ 910 911 } ACPI_CSRT_GROUP; 912 913 /* Shared Info subtable */ 914 915 typedef struct acpi_csrt_shared_info 916 { 917 UINT16 MajorVersion; 918 UINT16 MinorVersion; 919 UINT32 MmioBaseLow; 920 UINT32 MmioBaseHigh; 921 UINT32 GsiInterrupt; 922 UINT8 InterruptPolarity; 923 UINT8 InterruptMode; 924 UINT8 NumChannels; 925 UINT8 DmaAddressWidth; 926 UINT16 BaseRequestLine; 927 UINT16 NumHandshakeSignals; 928 UINT32 MaxBlockSize; 929 930 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */ 931 932 } ACPI_CSRT_SHARED_INFO; 933 934 /* Resource Descriptor subtable */ 935 936 typedef struct acpi_csrt_descriptor 937 { 938 UINT32 Length; 939 UINT16 Type; 940 UINT16 Subtype; 941 UINT32 Uid; 942 943 /* Resource-specific information immediately follows */ 944 945 } ACPI_CSRT_DESCRIPTOR; 946 947 948 /* Resource Types */ 949 950 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 951 #define ACPI_CSRT_TYPE_TIMER 0x0002 952 #define ACPI_CSRT_TYPE_DMA 0x0003 953 954 /* Resource Subtypes */ 955 956 #define ACPI_CSRT_XRUPT_LINE 0x0000 957 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 958 #define ACPI_CSRT_TIMER 0x0000 959 #define ACPI_CSRT_DMA_CHANNEL 0x0000 960 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 961 962 963 /******************************************************************************* 964 * 965 * DBG2 - Debug Port Table 2 966 * Version 0 (Both main table and subtables) 967 * 968 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 969 * 970 ******************************************************************************/ 971 972 typedef struct acpi_table_dbg2 973 { 974 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 975 UINT32 InfoOffset; 976 UINT32 InfoCount; 977 978 } ACPI_TABLE_DBG2; 979 980 981 typedef struct acpi_dbg2_header 982 { 983 UINT32 InfoOffset; 984 UINT32 InfoCount; 985 986 } ACPI_DBG2_HEADER; 987 988 989 /* Debug Device Information Subtable */ 990 991 typedef struct acpi_dbg2_device 992 { 993 UINT8 Revision; 994 UINT16 Length; 995 UINT8 RegisterCount; /* Number of BaseAddress registers */ 996 UINT16 NamepathLength; 997 UINT16 NamepathOffset; 998 UINT16 OemDataLength; 999 UINT16 OemDataOffset; 1000 UINT16 PortType; 1001 UINT16 PortSubtype; 1002 UINT16 Reserved; 1003 UINT16 BaseAddressOffset; 1004 UINT16 AddressSizeOffset; 1005 /* 1006 * Data that follows: 1007 * BaseAddress (required) - Each in 12-byte Generic Address Structure format. 1008 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register. 1009 * Namepath (required) - Null terminated string. Single dot if not supported. 1010 * OemData (optional) - Length is OemDataLength. 1011 */ 1012 } ACPI_DBG2_DEVICE; 1013 1014 /* Types for PortType field above */ 1015 1016 #define ACPI_DBG2_SERIAL_PORT 0x8000 1017 #define ACPI_DBG2_1394_PORT 0x8001 1018 #define ACPI_DBG2_USB_PORT 0x8002 1019 #define ACPI_DBG2_NET_PORT 0x8003 1020 1021 /* Subtypes for PortSubtype field above */ 1022 1023 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 1024 #define ACPI_DBG2_16550_SUBSET 0x0001 1025 #define ACPI_DBG2_MAX311XE_SPI 0x0002 1026 #define ACPI_DBG2_ARM_PL011 0x0003 1027 #define ACPI_DBG2_MSM8X60 0x0004 1028 #define ACPI_DBG2_16550_NVIDIA 0x0005 1029 #define ACPI_DBG2_TI_OMAP 0x0006 1030 #define ACPI_DBG2_APM88XXXX 0x0008 1031 #define ACPI_DBG2_MSM8974 0x0009 1032 #define ACPI_DBG2_SAM5250 0x000A 1033 #define ACPI_DBG2_INTEL_USIF 0x000B 1034 #define ACPI_DBG2_IMX6 0x000C 1035 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 1036 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 1037 #define ACPI_DBG2_ARM_DCC 0x000F 1038 #define ACPI_DBG2_BCM2835 0x0010 1039 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 1040 #define ACPI_DBG2_16550_WITH_GAS 0x0012 1041 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 1042 #define ACPI_DBG2_INTEL_LPSS 0x0014 1043 1044 #define ACPI_DBG2_1394_STANDARD 0x0000 1045 1046 #define ACPI_DBG2_USB_XHCI 0x0000 1047 #define ACPI_DBG2_USB_EHCI 0x0001 1048 1049 1050 /******************************************************************************* 1051 * 1052 * DBGP - Debug Port table 1053 * Version 1 1054 * 1055 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 1056 * 1057 ******************************************************************************/ 1058 1059 typedef struct acpi_table_dbgp 1060 { 1061 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1062 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */ 1063 UINT8 Reserved[3]; 1064 ACPI_GENERIC_ADDRESS DebugPort; 1065 1066 } ACPI_TABLE_DBGP; 1067 1068 1069 /******************************************************************************* 1070 * 1071 * DMAR - DMA Remapping table 1072 * Version 1 1073 * 1074 * Conforms to "Intel Virtualization Technology for Directed I/O", 1075 * Version 2.3, October 2014 1076 * 1077 ******************************************************************************/ 1078 1079 typedef struct acpi_table_dmar 1080 { 1081 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1082 UINT8 Width; /* Host Address Width */ 1083 UINT8 Flags; 1084 UINT8 Reserved[10]; 1085 1086 } ACPI_TABLE_DMAR; 1087 1088 /* Masks for Flags field above */ 1089 1090 #define ACPI_DMAR_INTR_REMAP (1) 1091 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 1092 #define ACPI_DMAR_X2APIC_MODE (1<<2) 1093 1094 1095 /* DMAR subtable header */ 1096 1097 typedef struct acpi_dmar_header 1098 { 1099 UINT16 Type; 1100 UINT16 Length; 1101 1102 } ACPI_DMAR_HEADER; 1103 1104 /* Values for subtable type in ACPI_DMAR_HEADER */ 1105 1106 enum AcpiDmarType 1107 { 1108 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 1109 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 1110 ACPI_DMAR_TYPE_ROOT_ATS = 2, 1111 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 1112 ACPI_DMAR_TYPE_NAMESPACE = 4, 1113 ACPI_DMAR_TYPE_SATC = 5, 1114 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1115 }; 1116 1117 1118 /* DMAR Device Scope structure */ 1119 1120 typedef struct acpi_dmar_device_scope 1121 { 1122 UINT8 EntryType; 1123 UINT8 Length; 1124 UINT16 Reserved; 1125 UINT8 EnumerationId; 1126 UINT8 Bus; 1127 1128 } ACPI_DMAR_DEVICE_SCOPE; 1129 1130 /* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */ 1131 1132 enum AcpiDmarScopeType 1133 { 1134 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 1135 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 1136 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 1137 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 1138 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 1139 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 1140 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1141 }; 1142 1143 typedef struct acpi_dmar_pci_path 1144 { 1145 UINT8 Device; 1146 UINT8 Function; 1147 1148 } ACPI_DMAR_PCI_PATH; 1149 1150 1151 /* 1152 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER 1153 */ 1154 1155 /* 0: Hardware Unit Definition */ 1156 1157 typedef struct acpi_dmar_hardware_unit 1158 { 1159 ACPI_DMAR_HEADER Header; 1160 UINT8 Flags; 1161 UINT8 Reserved; 1162 UINT16 Segment; 1163 UINT64 Address; /* Register Base Address */ 1164 1165 } ACPI_DMAR_HARDWARE_UNIT; 1166 1167 /* Masks for Flags field above */ 1168 1169 #define ACPI_DMAR_INCLUDE_ALL (1) 1170 1171 1172 /* 1: Reserved Memory Definition */ 1173 1174 typedef struct acpi_dmar_reserved_memory 1175 { 1176 ACPI_DMAR_HEADER Header; 1177 UINT16 Reserved; 1178 UINT16 Segment; 1179 UINT64 BaseAddress; /* 4K aligned base address */ 1180 UINT64 EndAddress; /* 4K aligned limit address */ 1181 1182 } ACPI_DMAR_RESERVED_MEMORY; 1183 1184 /* Masks for Flags field above */ 1185 1186 #define ACPI_DMAR_ALLOW_ALL (1) 1187 1188 1189 /* 2: Root Port ATS Capability Reporting Structure */ 1190 1191 typedef struct acpi_dmar_atsr 1192 { 1193 ACPI_DMAR_HEADER Header; 1194 UINT8 Flags; 1195 UINT8 Reserved; 1196 UINT16 Segment; 1197 1198 } ACPI_DMAR_ATSR; 1199 1200 /* Masks for Flags field above */ 1201 1202 #define ACPI_DMAR_ALL_PORTS (1) 1203 1204 1205 /* 3: Remapping Hardware Static Affinity Structure */ 1206 1207 typedef struct acpi_dmar_rhsa 1208 { 1209 ACPI_DMAR_HEADER Header; 1210 UINT32 Reserved; 1211 UINT64 BaseAddress; 1212 UINT32 ProximityDomain; 1213 1214 } ACPI_DMAR_RHSA; 1215 1216 1217 /* 4: ACPI Namespace Device Declaration Structure */ 1218 1219 typedef struct acpi_dmar_andd 1220 { 1221 ACPI_DMAR_HEADER Header; 1222 UINT8 Reserved[3]; 1223 UINT8 DeviceNumber; 1224 union { 1225 char __pad; 1226 ACPI_FLEX_ARRAY(char, DeviceName); 1227 }; 1228 1229 } ACPI_DMAR_ANDD; 1230 1231 1232 /* 5: SoC Integrated Address Translation Cache (SATC) */ 1233 1234 typedef struct acpi_dmar_satc 1235 { 1236 ACPI_DMAR_HEADER Header; 1237 UINT8 Flags; 1238 UINT8 Reserved; 1239 UINT16 Segment; 1240 1241 } ACPI_DMAR_SATC 1242 1243 ; 1244 /******************************************************************************* 1245 * 1246 * DRTM - Dynamic Root of Trust for Measurement table 1247 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 1248 * Table version 1 1249 * 1250 ******************************************************************************/ 1251 1252 typedef struct acpi_table_drtm 1253 { 1254 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1255 UINT64 EntryBaseAddress; 1256 UINT64 EntryLength; 1257 UINT32 EntryAddress32; 1258 UINT64 EntryAddress64; 1259 UINT64 ExitAddress; 1260 UINT64 LogAreaAddress; 1261 UINT32 LogAreaLength; 1262 UINT64 ArchDependentAddress; 1263 UINT32 Flags; 1264 1265 } ACPI_TABLE_DRTM; 1266 1267 /* Flag Definitions for above */ 1268 1269 #define ACPI_DRTM_ACCESS_ALLOWED (1) 1270 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 1271 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 1272 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 1273 1274 1275 /* 1) Validated Tables List (64-bit addresses) */ 1276 1277 typedef struct acpi_drtm_vtable_list 1278 { 1279 UINT32 ValidatedTableCount; 1280 UINT64 ValidatedTables[]; 1281 1282 } ACPI_DRTM_VTABLE_LIST; 1283 1284 /* 2) Resources List (of Resource Descriptors) */ 1285 1286 /* Resource Descriptor */ 1287 1288 typedef struct acpi_drtm_resource 1289 { 1290 UINT8 Size[7]; 1291 UINT8 Type; 1292 UINT64 Address; 1293 1294 } ACPI_DRTM_RESOURCE; 1295 1296 typedef struct acpi_drtm_resource_list 1297 { 1298 UINT32 ResourceCount; 1299 ACPI_DRTM_RESOURCE Resources[]; 1300 1301 } ACPI_DRTM_RESOURCE_LIST; 1302 1303 /* 3) Platform-specific Identifiers List */ 1304 1305 typedef struct acpi_drtm_dps_id 1306 { 1307 UINT32 DpsIdLength; 1308 UINT8 DpsId[16]; 1309 1310 } ACPI_DRTM_DPS_ID; 1311 1312 1313 /******************************************************************************* 1314 * 1315 * ECDT - Embedded Controller Boot Resources Table 1316 * Version 1 1317 * 1318 ******************************************************************************/ 1319 1320 typedef struct acpi_table_ecdt 1321 { 1322 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1323 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 1324 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 1325 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 1326 UINT8 Gpe; /* The GPE for the EC */ 1327 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */ 1328 1329 } ACPI_TABLE_ECDT; 1330 1331 1332 /******************************************************************************* 1333 * 1334 * EINJ - Error Injection Table (ACPI 4.0) 1335 * Version 1 1336 * 1337 ******************************************************************************/ 1338 1339 typedef struct acpi_table_einj 1340 { 1341 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1342 UINT32 HeaderLength; 1343 UINT8 Flags; 1344 UINT8 Reserved[3]; 1345 UINT32 Entries; 1346 1347 } ACPI_TABLE_EINJ; 1348 1349 1350 /* EINJ Injection Instruction Entries (actions) */ 1351 1352 typedef struct acpi_einj_entry 1353 { 1354 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1355 1356 } ACPI_EINJ_ENTRY; 1357 1358 /* Masks for Flags field above */ 1359 1360 #define ACPI_EINJ_PRESERVE (1) 1361 1362 /* Values for Action field above */ 1363 1364 enum AcpiEinjActions 1365 { 1366 ACPI_EINJ_BEGIN_OPERATION = 0, 1367 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 1368 ACPI_EINJ_SET_ERROR_TYPE = 2, 1369 ACPI_EINJ_GET_ERROR_TYPE = 3, 1370 ACPI_EINJ_END_OPERATION = 4, 1371 ACPI_EINJ_EXECUTE_OPERATION = 5, 1372 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 1373 ACPI_EINJ_GET_COMMAND_STATUS = 7, 1374 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 1375 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 1376 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 1377 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1378 }; 1379 1380 /* Values for Instruction field above */ 1381 1382 enum AcpiEinjInstructions 1383 { 1384 ACPI_EINJ_READ_REGISTER = 0, 1385 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1386 ACPI_EINJ_WRITE_REGISTER = 2, 1387 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1388 ACPI_EINJ_NOOP = 4, 1389 ACPI_EINJ_FLUSH_CACHELINE = 5, 1390 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1391 }; 1392 1393 typedef struct acpi_einj_error_type_with_addr 1394 { 1395 UINT32 ErrorType; 1396 UINT32 VendorStructOffset; 1397 UINT32 Flags; 1398 UINT32 ApicId; 1399 UINT64 Address; 1400 UINT64 Range; 1401 UINT32 PcieId; 1402 1403 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 1404 1405 typedef struct acpi_einj_vendor 1406 { 1407 UINT32 Length; 1408 UINT32 PcieId; 1409 UINT16 VendorId; 1410 UINT16 DeviceId; 1411 UINT8 RevisionId; 1412 UINT8 Reserved[3]; 1413 1414 } ACPI_EINJ_VENDOR; 1415 1416 1417 /* EINJ Trigger Error Action Table */ 1418 1419 typedef struct acpi_einj_trigger 1420 { 1421 UINT32 HeaderSize; 1422 UINT32 Revision; 1423 UINT32 TableSize; 1424 UINT32 EntryCount; 1425 1426 } ACPI_EINJ_TRIGGER; 1427 1428 /* Command status return values */ 1429 1430 enum AcpiEinjCommandStatus 1431 { 1432 ACPI_EINJ_SUCCESS = 0, 1433 ACPI_EINJ_FAILURE = 1, 1434 ACPI_EINJ_INVALID_ACCESS = 2, 1435 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1436 }; 1437 1438 1439 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1440 1441 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1442 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1443 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1444 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1445 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1446 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1447 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1448 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1449 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1450 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1451 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1452 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1453 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12) 1454 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13) 1455 #define ACPI_EINJ_CXL_CACHE_FATAL (1<<14) 1456 #define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15) 1457 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16) 1458 #define ACPI_EINJ_CXL_MEM_FATAL (1<<17) 1459 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1460 1461 1462 /******************************************************************************* 1463 * 1464 * ERST - Error Record Serialization Table (ACPI 4.0) 1465 * Version 1 1466 * 1467 ******************************************************************************/ 1468 1469 typedef struct acpi_table_erst 1470 { 1471 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1472 UINT32 HeaderLength; 1473 UINT32 Reserved; 1474 UINT32 Entries; 1475 1476 } ACPI_TABLE_ERST; 1477 1478 1479 /* ERST Serialization Entries (actions) */ 1480 1481 typedef struct acpi_erst_entry 1482 { 1483 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1484 1485 } ACPI_ERST_ENTRY; 1486 1487 /* Masks for Flags field above */ 1488 1489 #define ACPI_ERST_PRESERVE (1) 1490 1491 /* Values for Action field above */ 1492 1493 enum AcpiErstActions 1494 { 1495 ACPI_ERST_BEGIN_WRITE = 0, 1496 ACPI_ERST_BEGIN_READ = 1, 1497 ACPI_ERST_BEGIN_CLEAR = 2, 1498 ACPI_ERST_END = 3, 1499 ACPI_ERST_SET_RECORD_OFFSET = 4, 1500 ACPI_ERST_EXECUTE_OPERATION = 5, 1501 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1502 ACPI_ERST_GET_COMMAND_STATUS = 7, 1503 ACPI_ERST_GET_RECORD_ID = 8, 1504 ACPI_ERST_SET_RECORD_ID = 9, 1505 ACPI_ERST_GET_RECORD_COUNT = 10, 1506 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1507 ACPI_ERST_NOT_USED = 12, 1508 ACPI_ERST_GET_ERROR_RANGE = 13, 1509 ACPI_ERST_GET_ERROR_LENGTH = 14, 1510 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1511 ACPI_ERST_EXECUTE_TIMINGS = 16, 1512 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1513 }; 1514 1515 /* Values for Instruction field above */ 1516 1517 enum AcpiErstInstructions 1518 { 1519 ACPI_ERST_READ_REGISTER = 0, 1520 ACPI_ERST_READ_REGISTER_VALUE = 1, 1521 ACPI_ERST_WRITE_REGISTER = 2, 1522 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1523 ACPI_ERST_NOOP = 4, 1524 ACPI_ERST_LOAD_VAR1 = 5, 1525 ACPI_ERST_LOAD_VAR2 = 6, 1526 ACPI_ERST_STORE_VAR1 = 7, 1527 ACPI_ERST_ADD = 8, 1528 ACPI_ERST_SUBTRACT = 9, 1529 ACPI_ERST_ADD_VALUE = 10, 1530 ACPI_ERST_SUBTRACT_VALUE = 11, 1531 ACPI_ERST_STALL = 12, 1532 ACPI_ERST_STALL_WHILE_TRUE = 13, 1533 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1534 ACPI_ERST_GOTO = 15, 1535 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1536 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1537 ACPI_ERST_MOVE_DATA = 18, 1538 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1539 }; 1540 1541 /* Command status return values */ 1542 1543 enum AcpiErstCommandStatus 1544 { 1545 ACPI_ERST_SUCCESS = 0, 1546 ACPI_ERST_NO_SPACE = 1, 1547 ACPI_ERST_NOT_AVAILABLE = 2, 1548 ACPI_ERST_FAILURE = 3, 1549 ACPI_ERST_RECORD_EMPTY = 4, 1550 ACPI_ERST_NOT_FOUND = 5, 1551 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1552 }; 1553 1554 1555 /* Error Record Serialization Information */ 1556 1557 typedef struct acpi_erst_info 1558 { 1559 UINT16 Signature; /* Should be "ER" */ 1560 UINT8 Data[48]; 1561 1562 } ACPI_ERST_INFO; 1563 1564 1565 /******************************************************************************* 1566 * 1567 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1568 * Version 1 1569 * 1570 ******************************************************************************/ 1571 1572 typedef struct acpi_table_fpdt 1573 { 1574 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1575 1576 } ACPI_TABLE_FPDT; 1577 1578 1579 /* FPDT subtable header (Performance Record Structure) */ 1580 1581 typedef struct acpi_fpdt_header 1582 { 1583 UINT16 Type; 1584 UINT8 Length; 1585 UINT8 Revision; 1586 1587 } ACPI_FPDT_HEADER; 1588 1589 /* Values for Type field above */ 1590 1591 enum AcpiFpdtType 1592 { 1593 ACPI_FPDT_TYPE_BOOT = 0, 1594 ACPI_FPDT_TYPE_S3PERF = 1 1595 }; 1596 1597 1598 /* 1599 * FPDT subtables 1600 */ 1601 1602 /* 0: Firmware Basic Boot Performance Record */ 1603 1604 typedef struct acpi_fpdt_boot_pointer 1605 { 1606 ACPI_FPDT_HEADER Header; 1607 UINT8 Reserved[4]; 1608 UINT64 Address; 1609 1610 } ACPI_FPDT_BOOT_POINTER; 1611 1612 1613 /* 1: S3 Performance Table Pointer Record */ 1614 1615 typedef struct acpi_fpdt_s3pt_pointer 1616 { 1617 ACPI_FPDT_HEADER Header; 1618 UINT8 Reserved[4]; 1619 UINT64 Address; 1620 1621 } ACPI_FPDT_S3PT_POINTER; 1622 1623 1624 /* 1625 * S3PT - S3 Performance Table. This table is pointed to by the 1626 * S3 Pointer Record above. 1627 */ 1628 typedef struct acpi_table_s3pt 1629 { 1630 UINT8 Signature[4]; /* "S3PT" */ 1631 UINT32 Length; 1632 1633 } ACPI_TABLE_S3PT; 1634 1635 1636 /* 1637 * S3PT Subtables (Not part of the actual FPDT) 1638 */ 1639 1640 /* Values for Type field in S3PT header */ 1641 1642 enum AcpiS3ptType 1643 { 1644 ACPI_S3PT_TYPE_RESUME = 0, 1645 ACPI_S3PT_TYPE_SUSPEND = 1, 1646 ACPI_FPDT_BOOT_PERFORMANCE = 2 1647 }; 1648 1649 typedef struct acpi_s3pt_resume 1650 { 1651 ACPI_FPDT_HEADER Header; 1652 UINT32 ResumeCount; 1653 UINT64 FullResume; 1654 UINT64 AverageResume; 1655 1656 } ACPI_S3PT_RESUME; 1657 1658 typedef struct acpi_s3pt_suspend 1659 { 1660 ACPI_FPDT_HEADER Header; 1661 UINT64 SuspendStart; 1662 UINT64 SuspendEnd; 1663 1664 } ACPI_S3PT_SUSPEND; 1665 1666 1667 /* 1668 * FPDT Boot Performance Record (Not part of the actual FPDT) 1669 */ 1670 typedef struct acpi_fpdt_boot 1671 { 1672 ACPI_FPDT_HEADER Header; 1673 UINT8 Reserved[4]; 1674 UINT64 ResetEnd; 1675 UINT64 LoadStart; 1676 UINT64 StartupStart; 1677 UINT64 ExitServicesEntry; 1678 UINT64 ExitServicesExit; 1679 1680 } ACPI_FPDT_BOOT; 1681 1682 1683 /******************************************************************************* 1684 * 1685 * GTDT - Generic Timer Description Table (ACPI 5.1) 1686 * Version 2 1687 * 1688 ******************************************************************************/ 1689 1690 typedef struct acpi_table_gtdt 1691 { 1692 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1693 UINT64 CounterBlockAddresss; 1694 UINT32 Reserved; 1695 UINT32 SecureEl1Interrupt; 1696 UINT32 SecureEl1Flags; 1697 UINT32 NonSecureEl1Interrupt; 1698 UINT32 NonSecureEl1Flags; 1699 UINT32 VirtualTimerInterrupt; 1700 UINT32 VirtualTimerFlags; 1701 UINT32 NonSecureEl2Interrupt; 1702 UINT32 NonSecureEl2Flags; 1703 UINT64 CounterReadBlockAddress; 1704 UINT32 PlatformTimerCount; 1705 UINT32 PlatformTimerOffset; 1706 1707 } ACPI_TABLE_GTDT; 1708 1709 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1710 1711 #define ACPI_GTDT_INTERRUPT_MODE (1) 1712 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1713 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1714 1715 typedef struct acpi_gtdt_el2 1716 { 1717 UINT32 VirtualEL2TimerGsiv; 1718 UINT32 VirtualEL2TimerFlags; 1719 } ACPI_GTDT_EL2; 1720 1721 1722 /* Common GTDT subtable header */ 1723 1724 typedef struct acpi_gtdt_header 1725 { 1726 UINT8 Type; 1727 UINT16 Length; 1728 1729 } ACPI_GTDT_HEADER; 1730 1731 /* Values for GTDT subtable type above */ 1732 1733 enum AcpiGtdtType 1734 { 1735 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1736 ACPI_GTDT_TYPE_WATCHDOG = 1, 1737 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1738 }; 1739 1740 1741 /* GTDT Subtables, correspond to Type in acpi_gtdt_header */ 1742 1743 /* 0: Generic Timer Block */ 1744 1745 typedef struct acpi_gtdt_timer_block 1746 { 1747 ACPI_GTDT_HEADER Header; 1748 UINT8 Reserved; 1749 UINT64 BlockAddress; 1750 UINT32 TimerCount; 1751 UINT32 TimerOffset; 1752 1753 } ACPI_GTDT_TIMER_BLOCK; 1754 1755 /* Timer Sub-Structure, one per timer */ 1756 1757 typedef struct acpi_gtdt_timer_entry 1758 { 1759 UINT8 FrameNumber; 1760 UINT8 Reserved[3]; 1761 UINT64 BaseAddress; 1762 UINT64 El0BaseAddress; 1763 UINT32 TimerInterrupt; 1764 UINT32 TimerFlags; 1765 UINT32 VirtualTimerInterrupt; 1766 UINT32 VirtualTimerFlags; 1767 UINT32 CommonFlags; 1768 1769 } ACPI_GTDT_TIMER_ENTRY; 1770 1771 /* Flag Definitions: TimerFlags and VirtualTimerFlags above */ 1772 1773 #define ACPI_GTDT_GT_IRQ_MODE (1) 1774 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1775 1776 /* Flag Definitions: CommonFlags above */ 1777 1778 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1779 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1780 1781 1782 /* 1: SBSA Generic Watchdog Structure */ 1783 1784 typedef struct acpi_gtdt_watchdog 1785 { 1786 ACPI_GTDT_HEADER Header; 1787 UINT8 Reserved; 1788 UINT64 RefreshFrameAddress; 1789 UINT64 ControlFrameAddress; 1790 UINT32 TimerInterrupt; 1791 UINT32 TimerFlags; 1792 1793 } ACPI_GTDT_WATCHDOG; 1794 1795 /* Flag Definitions: TimerFlags above */ 1796 1797 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1798 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1799 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1800 1801 1802 /******************************************************************************* 1803 * 1804 * HEST - Hardware Error Source Table (ACPI 4.0) 1805 * Version 1 1806 * 1807 ******************************************************************************/ 1808 1809 typedef struct acpi_table_hest 1810 { 1811 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1812 UINT32 ErrorSourceCount; 1813 1814 } ACPI_TABLE_HEST; 1815 1816 1817 /* HEST subtable header */ 1818 1819 typedef struct acpi_hest_header 1820 { 1821 UINT16 Type; 1822 UINT16 SourceId; 1823 1824 } ACPI_HEST_HEADER; 1825 1826 1827 /* Values for Type field above for subtables */ 1828 1829 enum AcpiHestTypes 1830 { 1831 ACPI_HEST_TYPE_IA32_CHECK = 0, 1832 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1833 ACPI_HEST_TYPE_IA32_NMI = 2, 1834 ACPI_HEST_TYPE_NOT_USED3 = 3, 1835 ACPI_HEST_TYPE_NOT_USED4 = 4, 1836 ACPI_HEST_TYPE_NOT_USED5 = 5, 1837 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1838 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1839 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1840 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1841 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1842 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1843 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1844 }; 1845 1846 1847 /* 1848 * HEST substructures contained in subtables 1849 */ 1850 1851 /* 1852 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1853 * ACPI_HEST_IA_CORRECTED structures. 1854 */ 1855 typedef struct acpi_hest_ia_error_bank 1856 { 1857 UINT8 BankNumber; 1858 UINT8 ClearStatusOnInit; 1859 UINT8 StatusFormat; 1860 UINT8 Reserved; 1861 UINT32 ControlRegister; 1862 UINT64 ControlData; 1863 UINT32 StatusRegister; 1864 UINT32 AddressRegister; 1865 UINT32 MiscRegister; 1866 1867 } ACPI_HEST_IA_ERROR_BANK; 1868 1869 1870 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1871 1872 typedef struct acpi_hest_aer_common 1873 { 1874 UINT16 Reserved1; 1875 UINT8 Flags; 1876 UINT8 Enabled; 1877 UINT32 RecordsToPreallocate; 1878 UINT32 MaxSectionsPerRecord; 1879 UINT32 Bus; /* Bus and Segment numbers */ 1880 UINT16 Device; 1881 UINT16 Function; 1882 UINT16 DeviceControl; 1883 UINT16 Reserved2; 1884 UINT32 UncorrectableMask; 1885 UINT32 UncorrectableSeverity; 1886 UINT32 CorrectableMask; 1887 UINT32 AdvancedCapabilities; 1888 1889 } ACPI_HEST_AER_COMMON; 1890 1891 /* Masks for HEST Flags fields */ 1892 1893 #define ACPI_HEST_FIRMWARE_FIRST (1) 1894 #define ACPI_HEST_GLOBAL (1<<1) 1895 #define ACPI_HEST_GHES_ASSIST (1<<2) 1896 1897 /* 1898 * Macros to access the bus/segment numbers in Bus field above: 1899 * Bus number is encoded in bits 7:0 1900 * Segment number is encoded in bits 23:8 1901 */ 1902 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 1903 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 1904 1905 1906 /* Hardware Error Notification */ 1907 1908 typedef struct acpi_hest_notify 1909 { 1910 UINT8 Type; 1911 UINT8 Length; 1912 UINT16 ConfigWriteEnable; 1913 UINT32 PollInterval; 1914 UINT32 Vector; 1915 UINT32 PollingThresholdValue; 1916 UINT32 PollingThresholdWindow; 1917 UINT32 ErrorThresholdValue; 1918 UINT32 ErrorThresholdWindow; 1919 1920 } ACPI_HEST_NOTIFY; 1921 1922 /* Values for Notify Type field above */ 1923 1924 enum AcpiHestNotifyTypes 1925 { 1926 ACPI_HEST_NOTIFY_POLLED = 0, 1927 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1928 ACPI_HEST_NOTIFY_LOCAL = 2, 1929 ACPI_HEST_NOTIFY_SCI = 3, 1930 ACPI_HEST_NOTIFY_NMI = 4, 1931 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1932 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1933 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1934 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1935 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1936 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1937 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1938 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1939 }; 1940 1941 /* Values for ConfigWriteEnable bitfield above */ 1942 1943 #define ACPI_HEST_TYPE (1) 1944 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1945 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1946 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1947 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1948 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1949 1950 1951 /* 1952 * HEST subtables 1953 */ 1954 1955 /* 0: IA32 Machine Check Exception */ 1956 1957 typedef struct acpi_hest_ia_machine_check 1958 { 1959 ACPI_HEST_HEADER Header; 1960 UINT16 Reserved1; 1961 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1962 UINT8 Enabled; 1963 UINT32 RecordsToPreallocate; 1964 UINT32 MaxSectionsPerRecord; 1965 UINT64 GlobalCapabilityData; 1966 UINT64 GlobalControlData; 1967 UINT8 NumHardwareBanks; 1968 UINT8 Reserved3[7]; 1969 1970 } ACPI_HEST_IA_MACHINE_CHECK; 1971 1972 1973 /* 1: IA32 Corrected Machine Check */ 1974 1975 typedef struct acpi_hest_ia_corrected 1976 { 1977 ACPI_HEST_HEADER Header; 1978 UINT16 Reserved1; 1979 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1980 UINT8 Enabled; 1981 UINT32 RecordsToPreallocate; 1982 UINT32 MaxSectionsPerRecord; 1983 ACPI_HEST_NOTIFY Notify; 1984 UINT8 NumHardwareBanks; 1985 UINT8 Reserved2[3]; 1986 1987 } ACPI_HEST_IA_CORRECTED; 1988 1989 1990 /* 2: IA32 Non-Maskable Interrupt */ 1991 1992 typedef struct acpi_hest_ia_nmi 1993 { 1994 ACPI_HEST_HEADER Header; 1995 UINT32 Reserved; 1996 UINT32 RecordsToPreallocate; 1997 UINT32 MaxSectionsPerRecord; 1998 UINT32 MaxRawDataLength; 1999 2000 } ACPI_HEST_IA_NMI; 2001 2002 2003 /* 3,4,5: Not used */ 2004 2005 /* 6: PCI Express Root Port AER */ 2006 2007 typedef struct acpi_hest_aer_root 2008 { 2009 ACPI_HEST_HEADER Header; 2010 ACPI_HEST_AER_COMMON Aer; 2011 UINT32 RootErrorCommand; 2012 2013 } ACPI_HEST_AER_ROOT; 2014 2015 2016 /* 7: PCI Express AER (AER Endpoint) */ 2017 2018 typedef struct acpi_hest_aer 2019 { 2020 ACPI_HEST_HEADER Header; 2021 ACPI_HEST_AER_COMMON Aer; 2022 2023 } ACPI_HEST_AER; 2024 2025 2026 /* 8: PCI Express/PCI-X Bridge AER */ 2027 2028 typedef struct acpi_hest_aer_bridge 2029 { 2030 ACPI_HEST_HEADER Header; 2031 ACPI_HEST_AER_COMMON Aer; 2032 UINT32 UncorrectableMask2; 2033 UINT32 UncorrectableSeverity2; 2034 UINT32 AdvancedCapabilities2; 2035 2036 } ACPI_HEST_AER_BRIDGE; 2037 2038 2039 /* 9: Generic Hardware Error Source */ 2040 2041 typedef struct acpi_hest_generic 2042 { 2043 ACPI_HEST_HEADER Header; 2044 UINT16 RelatedSourceId; 2045 UINT8 Reserved; 2046 UINT8 Enabled; 2047 UINT32 RecordsToPreallocate; 2048 UINT32 MaxSectionsPerRecord; 2049 UINT32 MaxRawDataLength; 2050 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2051 ACPI_HEST_NOTIFY Notify; 2052 UINT32 ErrorBlockLength; 2053 2054 } ACPI_HEST_GENERIC; 2055 2056 2057 /* 10: Generic Hardware Error Source, version 2 */ 2058 2059 typedef struct acpi_hest_generic_v2 2060 { 2061 ACPI_HEST_HEADER Header; 2062 UINT16 RelatedSourceId; 2063 UINT8 Reserved; 2064 UINT8 Enabled; 2065 UINT32 RecordsToPreallocate; 2066 UINT32 MaxSectionsPerRecord; 2067 UINT32 MaxRawDataLength; 2068 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2069 ACPI_HEST_NOTIFY Notify; 2070 UINT32 ErrorBlockLength; 2071 ACPI_GENERIC_ADDRESS ReadAckRegister; 2072 UINT64 ReadAckPreserve; 2073 UINT64 ReadAckWrite; 2074 2075 } ACPI_HEST_GENERIC_V2; 2076 2077 2078 /* Generic Error Status block */ 2079 2080 typedef struct acpi_hest_generic_status 2081 { 2082 UINT32 BlockStatus; 2083 UINT32 RawDataOffset; 2084 UINT32 RawDataLength; 2085 UINT32 DataLength; 2086 UINT32 ErrorSeverity; 2087 2088 } ACPI_HEST_GENERIC_STATUS; 2089 2090 /* Values for BlockStatus flags above */ 2091 2092 #define ACPI_HEST_UNCORRECTABLE (1) 2093 #define ACPI_HEST_CORRECTABLE (1<<1) 2094 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 2095 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 2096 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 2097 2098 2099 /* Generic Error Data entry */ 2100 2101 typedef struct acpi_hest_generic_data 2102 { 2103 UINT8 SectionType[16]; 2104 UINT32 ErrorSeverity; 2105 UINT16 Revision; 2106 UINT8 ValidationBits; 2107 UINT8 Flags; 2108 UINT32 ErrorDataLength; 2109 UINT8 FruId[16]; 2110 UINT8 FruText[20]; 2111 2112 } ACPI_HEST_GENERIC_DATA; 2113 2114 /* Extension for revision 0x0300 */ 2115 2116 typedef struct acpi_hest_generic_data_v300 2117 { 2118 UINT8 SectionType[16]; 2119 UINT32 ErrorSeverity; 2120 UINT16 Revision; 2121 UINT8 ValidationBits; 2122 UINT8 Flags; 2123 UINT32 ErrorDataLength; 2124 UINT8 FruId[16]; 2125 UINT8 FruText[20]; 2126 UINT64 TimeStamp; 2127 2128 } ACPI_HEST_GENERIC_DATA_V300; 2129 2130 /* Values for ErrorSeverity above */ 2131 2132 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 2133 #define ACPI_HEST_GEN_ERROR_FATAL 1 2134 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 2135 #define ACPI_HEST_GEN_ERROR_NONE 3 2136 2137 /* Flags for ValidationBits above */ 2138 2139 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 2140 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 2141 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 2142 2143 2144 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 2145 2146 typedef struct acpi_hest_ia_deferred_check 2147 { 2148 ACPI_HEST_HEADER Header; 2149 UINT16 Reserved1; 2150 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2151 UINT8 Enabled; 2152 UINT32 RecordsToPreallocate; 2153 UINT32 MaxSectionsPerRecord; 2154 ACPI_HEST_NOTIFY Notify; 2155 UINT8 NumHardwareBanks; 2156 UINT8 Reserved2[3]; 2157 2158 } ACPI_HEST_IA_DEFERRED_CHECK; 2159 2160 2161 /******************************************************************************* 2162 * 2163 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3) 2164 * 2165 ******************************************************************************/ 2166 2167 typedef struct acpi_table_hmat 2168 { 2169 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2170 UINT32 Reserved; 2171 2172 } ACPI_TABLE_HMAT; 2173 2174 2175 /* Values for HMAT structure types */ 2176 2177 enum AcpiHmatType 2178 { 2179 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */ 2180 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 2181 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 2182 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 2183 }; 2184 2185 typedef struct acpi_hmat_structure 2186 { 2187 UINT16 Type; 2188 UINT16 Reserved; 2189 UINT32 Length; 2190 2191 } ACPI_HMAT_STRUCTURE; 2192 2193 2194 /* 2195 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 2196 */ 2197 2198 /* 0: Memory proximity domain attributes */ 2199 2200 typedef struct acpi_hmat_proximity_domain 2201 { 2202 ACPI_HMAT_STRUCTURE Header; 2203 UINT16 Flags; 2204 UINT16 Reserved1; 2205 UINT32 InitiatorPD; /* Attached Initiator proximity domain */ 2206 UINT32 MemoryPD; /* Memory proximity domain */ 2207 UINT32 Reserved2; 2208 UINT64 Reserved3; 2209 UINT64 Reserved4; 2210 2211 } ACPI_HMAT_PROXIMITY_DOMAIN; 2212 2213 /* Masks for Flags field above */ 2214 2215 #define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */ 2216 2217 2218 /* 1: System locality latency and bandwidth information */ 2219 2220 typedef struct acpi_hmat_locality 2221 { 2222 ACPI_HMAT_STRUCTURE Header; 2223 UINT8 Flags; 2224 UINT8 DataType; 2225 UINT8 MinTransferSize; 2226 UINT8 Reserved1; 2227 UINT32 NumberOfInitiatorPDs; 2228 UINT32 NumberOfTargetPDs; 2229 UINT32 Reserved2; 2230 UINT64 EntryBaseUnit; 2231 2232 } ACPI_HMAT_LOCALITY; 2233 2234 /* Masks for Flags field above */ 2235 2236 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 2237 2238 /* Values for Memory Hierarchy flags */ 2239 2240 #define ACPI_HMAT_MEMORY 0 2241 #define ACPI_HMAT_1ST_LEVEL_CACHE 1 2242 #define ACPI_HMAT_2ND_LEVEL_CACHE 2 2243 #define ACPI_HMAT_3RD_LEVEL_CACHE 3 2244 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 2245 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 2246 2247 2248 /* Values for DataType field above */ 2249 2250 #define ACPI_HMAT_ACCESS_LATENCY 0 2251 #define ACPI_HMAT_READ_LATENCY 1 2252 #define ACPI_HMAT_WRITE_LATENCY 2 2253 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 2254 #define ACPI_HMAT_READ_BANDWIDTH 4 2255 #define ACPI_HMAT_WRITE_BANDWIDTH 5 2256 2257 2258 /* 2: Memory side cache information */ 2259 2260 typedef struct acpi_hmat_cache 2261 { 2262 ACPI_HMAT_STRUCTURE Header; 2263 UINT32 MemoryPD; 2264 UINT32 Reserved1; 2265 UINT64 CacheSize; 2266 UINT32 CacheAttributes; 2267 UINT16 Reserved2; 2268 UINT16 NumberOfSMBIOSHandles; 2269 2270 } ACPI_HMAT_CACHE; 2271 2272 /* Masks for CacheAttributes field above */ 2273 2274 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 2275 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 2276 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 2277 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 2278 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 2279 2280 /* Values for cache associativity flag */ 2281 2282 #define ACPI_HMAT_CA_NONE (0) 2283 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 2284 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 2285 2286 /* Values for write policy flag */ 2287 2288 #define ACPI_HMAT_CP_NONE (0) 2289 #define ACPI_HMAT_CP_WB (1) 2290 #define ACPI_HMAT_CP_WT (2) 2291 2292 2293 /******************************************************************************* 2294 * 2295 * HPET - High Precision Event Timer table 2296 * Version 1 2297 * 2298 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 2299 * Version 1.0a, October 2004 2300 * 2301 ******************************************************************************/ 2302 2303 typedef struct acpi_table_hpet 2304 { 2305 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2306 UINT32 Id; /* Hardware ID of event timer block */ 2307 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */ 2308 UINT8 Sequence; /* HPET sequence number */ 2309 UINT16 MinimumTick; /* Main counter min tick, periodic mode */ 2310 UINT8 Flags; 2311 2312 } ACPI_TABLE_HPET; 2313 2314 /* Masks for Flags field above */ 2315 2316 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 2317 2318 /* Values for Page Protect flags */ 2319 2320 enum AcpiHpetPageProtect 2321 { 2322 ACPI_HPET_NO_PAGE_PROTECT = 0, 2323 ACPI_HPET_PAGE_PROTECT4 = 1, 2324 ACPI_HPET_PAGE_PROTECT64 = 2 2325 }; 2326 2327 2328 /******************************************************************************* 2329 * 2330 * IBFT - Boot Firmware Table 2331 * Version 1 2332 * 2333 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 2334 * Specification", Version 1.01, March 1, 2007 2335 * 2336 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 2337 * Therefore, it is not currently supported by the disassembler. 2338 * 2339 ******************************************************************************/ 2340 2341 typedef struct acpi_table_ibft 2342 { 2343 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2344 UINT8 Reserved[12]; 2345 2346 } ACPI_TABLE_IBFT; 2347 2348 2349 /* IBFT common subtable header */ 2350 2351 typedef struct acpi_ibft_header 2352 { 2353 UINT8 Type; 2354 UINT8 Version; 2355 UINT16 Length; 2356 UINT8 Index; 2357 UINT8 Flags; 2358 2359 } ACPI_IBFT_HEADER; 2360 2361 /* Values for Type field above */ 2362 2363 enum AcpiIbftType 2364 { 2365 ACPI_IBFT_TYPE_NOT_USED = 0, 2366 ACPI_IBFT_TYPE_CONTROL = 1, 2367 ACPI_IBFT_TYPE_INITIATOR = 2, 2368 ACPI_IBFT_TYPE_NIC = 3, 2369 ACPI_IBFT_TYPE_TARGET = 4, 2370 ACPI_IBFT_TYPE_EXTENSIONS = 5, 2371 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2372 }; 2373 2374 2375 /* IBFT subtables */ 2376 2377 typedef struct acpi_ibft_control 2378 { 2379 ACPI_IBFT_HEADER Header; 2380 UINT16 Extensions; 2381 UINT16 InitiatorOffset; 2382 UINT16 Nic0Offset; 2383 UINT16 Target0Offset; 2384 UINT16 Nic1Offset; 2385 UINT16 Target1Offset; 2386 2387 } ACPI_IBFT_CONTROL; 2388 2389 typedef struct acpi_ibft_initiator 2390 { 2391 ACPI_IBFT_HEADER Header; 2392 UINT8 SnsServer[16]; 2393 UINT8 SlpServer[16]; 2394 UINT8 PrimaryServer[16]; 2395 UINT8 SecondaryServer[16]; 2396 UINT16 NameLength; 2397 UINT16 NameOffset; 2398 2399 } ACPI_IBFT_INITIATOR; 2400 2401 typedef struct acpi_ibft_nic 2402 { 2403 ACPI_IBFT_HEADER Header; 2404 UINT8 IpAddress[16]; 2405 UINT8 SubnetMaskPrefix; 2406 UINT8 Origin; 2407 UINT8 Gateway[16]; 2408 UINT8 PrimaryDns[16]; 2409 UINT8 SecondaryDns[16]; 2410 UINT8 Dhcp[16]; 2411 UINT16 Vlan; 2412 UINT8 MacAddress[6]; 2413 UINT16 PciAddress; 2414 UINT16 NameLength; 2415 UINT16 NameOffset; 2416 2417 } ACPI_IBFT_NIC; 2418 2419 typedef struct acpi_ibft_target 2420 { 2421 ACPI_IBFT_HEADER Header; 2422 UINT8 TargetIpAddress[16]; 2423 UINT16 TargetIpSocket; 2424 UINT8 TargetBootLun[8]; 2425 UINT8 ChapType; 2426 UINT8 NicAssociation; 2427 UINT16 TargetNameLength; 2428 UINT16 TargetNameOffset; 2429 UINT16 ChapNameLength; 2430 UINT16 ChapNameOffset; 2431 UINT16 ChapSecretLength; 2432 UINT16 ChapSecretOffset; 2433 UINT16 ReverseChapNameLength; 2434 UINT16 ReverseChapNameOffset; 2435 UINT16 ReverseChapSecretLength; 2436 UINT16 ReverseChapSecretOffset; 2437 2438 } ACPI_IBFT_TARGET; 2439 2440 2441 /* Reset to default packing */ 2442 2443 #pragma pack() 2444 2445 #endif /* __ACTBL1_H__ */ 2446
