1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 172 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 173 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 174 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 175 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 176 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 177 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 178 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 179 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 180 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 181 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 182 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 183 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 184 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 185 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 186 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 187 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 188 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 189 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 190 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 191 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 192 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 193 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 194 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 195 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 196 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 197 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 198 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 199 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 200 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 201 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 202 203 204 /* 205 * All tables must be byte-packed to match the ACPI specification, since 206 * the tables are provided by the system BIOS. 207 */ 208 #pragma pack(1) 209 210 /* 211 * Note: C bitfields are not used for this reason: 212 * 213 * "Bitfields are great and easy to read, but unfortunately the C language 214 * does not specify the layout of bitfields in memory, which means they are 215 * essentially useless for dealing with packed data in on-disk formats or 216 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 217 * this decision was a design error in C. Ritchie could have picked an order 218 * and stuck with it." Norman Ramsey. 219 * See http://stackoverflow.com/a/1053662/41661 220 */ 221 222 223 /******************************************************************************* 224 * 225 * AEST - Arm Error Source Table 226 * 227 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 228 * September 2020. 229 * 230 ******************************************************************************/ 231 232 typedef struct acpi_table_aest 233 { 234 ACPI_TABLE_HEADER Header; 235 236 } ACPI_TABLE_AEST; 237 238 /* Common Subtable header - one per Node Structure (Subtable) */ 239 240 typedef struct acpi_aest_hdr 241 { 242 UINT8 Type; 243 UINT16 Length; 244 UINT8 Reserved; 245 UINT32 NodeSpecificOffset; 246 UINT32 NodeInterfaceOffset; 247 UINT32 NodeInterruptOffset; 248 UINT32 NodeInterruptCount; 249 UINT64 TimestampRate; 250 UINT64 Reserved1; 251 UINT64 ErrorInjectionRate; 252 253 } ACPI_AEST_HEADER; 254 255 /* Values for Type above */ 256 257 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 258 #define ACPI_AEST_MEMORY_ERROR_NODE 1 259 #define ACPI_AEST_SMMU_ERROR_NODE 2 260 #define ACPI_AEST_VENDOR_ERROR_NODE 3 261 #define ACPI_AEST_GIC_ERROR_NODE 4 262 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 263 264 265 /* 266 * AEST subtables (Error nodes) 267 */ 268 269 /* 0: Processor Error */ 270 271 typedef struct acpi_aest_processor 272 { 273 UINT32 ProcessorId; 274 UINT8 ResourceType; 275 UINT8 Reserved; 276 UINT8 Flags; 277 UINT8 Revision; 278 UINT64 ProcessorAffinity; 279 280 } ACPI_AEST_PROCESSOR; 281 282 /* Values for ResourceType above, related structs below */ 283 284 #define ACPI_AEST_CACHE_RESOURCE 0 285 #define ACPI_AEST_TLB_RESOURCE 1 286 #define ACPI_AEST_GENERIC_RESOURCE 2 287 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 288 289 /* 0R: Processor Cache Resource Substructure */ 290 291 typedef struct acpi_aest_processor_cache 292 { 293 UINT32 CacheReference; 294 UINT32 Reserved; 295 296 } ACPI_AEST_PROCESSOR_CACHE; 297 298 /* Values for CacheType above */ 299 300 #define ACPI_AEST_CACHE_DATA 0 301 #define ACPI_AEST_CACHE_INSTRUCTION 1 302 #define ACPI_AEST_CACHE_UNIFIED 2 303 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 304 305 /* 1R: Processor TLB Resource Substructure */ 306 307 typedef struct acpi_aest_processor_tlb 308 { 309 UINT32 TlbLevel; 310 UINT32 Reserved; 311 312 } ACPI_AEST_PROCESSOR_TLB; 313 314 /* 2R: Processor Generic Resource Substructure */ 315 316 typedef struct acpi_aest_processor_generic 317 { 318 UINT32 Resource; 319 320 } ACPI_AEST_PROCESSOR_GENERIC; 321 322 /* 1: Memory Error */ 323 324 typedef struct acpi_aest_memory 325 { 326 UINT32 SratProximityDomain; 327 328 } ACPI_AEST_MEMORY; 329 330 /* 2: Smmu Error */ 331 332 typedef struct acpi_aest_smmu 333 { 334 UINT32 IortNodeReference; 335 UINT32 SubcomponentReference; 336 337 } ACPI_AEST_SMMU; 338 339 /* 3: Vendor Defined */ 340 341 typedef struct acpi_aest_vendor 342 { 343 UINT32 AcpiHid; 344 UINT32 AcpiUid; 345 UINT8 VendorSpecificData[16]; 346 347 } ACPI_AEST_VENDOR; 348 349 /* 4: Gic Error */ 350 351 typedef struct acpi_aest_gic 352 { 353 UINT32 InterfaceType; 354 UINT32 InstanceId; 355 356 } ACPI_AEST_GIC; 357 358 /* Values for InterfaceType above */ 359 360 #define ACPI_AEST_GIC_CPU 0 361 #define ACPI_AEST_GIC_DISTRIBUTOR 1 362 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 363 #define ACPI_AEST_GIC_ITS 3 364 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 365 366 367 /* Node Interface Structure */ 368 369 typedef struct acpi_aest_node_interface 370 { 371 UINT8 Type; 372 UINT8 Reserved[3]; 373 UINT32 Flags; 374 UINT64 Address; 375 UINT32 ErrorRecordIndex; 376 UINT32 ErrorRecordCount; 377 UINT64 ErrorRecordImplemented; 378 UINT64 ErrorStatusReporting; 379 UINT64 AddressingMode; 380 381 } ACPI_AEST_NODE_INTERFACE; 382 383 /* Values for Type field above */ 384 385 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 386 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 387 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 388 389 /* Node Interrupt Structure */ 390 391 typedef struct acpi_aest_node_interrupt 392 { 393 UINT8 Type; 394 UINT8 Reserved[2]; 395 UINT8 Flags; 396 UINT32 Gsiv; 397 UINT8 IortId; 398 UINT8 Reserved1[3]; 399 400 } ACPI_AEST_NODE_INTERRUPT; 401 402 /* Values for Type field above */ 403 404 #define ACPI_AEST_NODE_FAULT_HANDLING 0 405 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 406 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 407 408 409 /******************************************************************************* 410 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 411 * 412 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 413 * ARM DEN0093 v1.1 414 * 415 ******************************************************************************/ 416 typedef struct acpi_table_agdi 417 { 418 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 419 UINT8 Flags; 420 UINT8 Reserved[3]; 421 UINT32 SdeiEvent; 422 UINT32 Gsiv; 423 424 } ACPI_TABLE_AGDI; 425 426 /* Mask for Flags field above */ 427 428 #define ACPI_AGDI_SIGNALING_MODE (1) 429 430 431 /******************************************************************************* 432 * 433 * APMT - ARM Performance Monitoring Unit Table 434 * 435 * Conforms to: 436 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 437 * ARM DEN0117 v1.0 November 25, 2021 438 * 439 ******************************************************************************/ 440 441 typedef struct acpi_table_apmt { 442 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 443 } ACPI_TABLE_APMT; 444 445 #define ACPI_APMT_NODE_ID_LENGTH 4 446 447 /* 448 * APMT subtables 449 */ 450 typedef struct acpi_apmt_node { 451 UINT16 Length; 452 UINT8 Flags; 453 UINT8 Type; 454 UINT32 Id; 455 UINT64 InstPrimary; 456 UINT32 InstSecondary; 457 UINT64 BaseAddress0; 458 UINT64 BaseAddress1; 459 UINT32 OvflwIrq; 460 UINT32 Reserved; 461 UINT32 OvflwIrqFlags; 462 UINT32 ProcAffinity; 463 UINT32 ImplId; 464 } ACPI_APMT_NODE; 465 466 /* Masks for Flags field above */ 467 468 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 469 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 470 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 471 472 /* Values for Flags dual page field above */ 473 474 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 475 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 476 477 /* Values for Flags processor affinity field above */ 478 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 479 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 480 481 /* Values for Flags 64-bit atomic field above */ 482 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 483 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 484 485 /* Values for Type field above */ 486 487 enum acpi_apmt_node_type { 488 ACPI_APMT_NODE_TYPE_MC = 0x00, 489 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 490 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 491 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 492 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 493 ACPI_APMT_NODE_TYPE_COUNT 494 }; 495 496 /* Masks for ovflw_irq_flags field above */ 497 498 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 499 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 500 501 /* Values for ovflw_irq_flags mode field above */ 502 503 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 504 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 505 506 /* Values for ovflw_irq_flags type field above */ 507 508 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 509 510 511 /******************************************************************************* 512 * 513 * BDAT - BIOS Data ACPI Table 514 * 515 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 516 * Nov 2020 517 * 518 ******************************************************************************/ 519 520 typedef struct acpi_table_bdat 521 { 522 ACPI_TABLE_HEADER Header; 523 ACPI_GENERIC_ADDRESS Gas; 524 525 } ACPI_TABLE_BDAT; 526 527 /******************************************************************************* 528 * 529 * CCEL - CC-Event Log 530 * From: "Guest-Host-Communication Interface (GHCI) for Intel 531 * Trust Domain Extensions (Intel TDX)". Feb 2022 532 * 533 ******************************************************************************/ 534 535 typedef struct acpi_table_ccel 536 { 537 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 538 UINT8 CCType; 539 UINT8 CCSubType; 540 UINT16 Reserved; 541 UINT64 LogAreaMinimumLength; 542 UINT64 LogAreaStartAddress; 543 544 } ACPI_TABLE_CCEL; 545 546 /******************************************************************************* 547 * 548 * IORT - IO Remapping Table 549 * 550 * Conforms to "IO Remapping Table System Software on ARM Platforms", 551 * Document number: ARM DEN 0049E.e, Sep 2022 552 * 553 ******************************************************************************/ 554 555 typedef struct acpi_table_iort 556 { 557 ACPI_TABLE_HEADER Header; 558 UINT32 NodeCount; 559 UINT32 NodeOffset; 560 UINT32 Reserved; 561 562 } ACPI_TABLE_IORT; 563 564 565 /* 566 * IORT subtables 567 */ 568 typedef struct acpi_iort_node 569 { 570 UINT8 Type; 571 UINT16 Length; 572 UINT8 Revision; 573 UINT32 Identifier; 574 UINT32 MappingCount; 575 UINT32 MappingOffset; 576 char NodeData[]; 577 578 } ACPI_IORT_NODE; 579 580 /* Values for subtable Type above */ 581 582 enum AcpiIortNodeType 583 { 584 ACPI_IORT_NODE_ITS_GROUP = 0x00, 585 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 586 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 587 ACPI_IORT_NODE_SMMU = 0x03, 588 ACPI_IORT_NODE_SMMU_V3 = 0x04, 589 ACPI_IORT_NODE_PMCG = 0x05, 590 ACPI_IORT_NODE_RMR = 0x06, 591 }; 592 593 594 typedef struct acpi_iort_id_mapping 595 { 596 UINT32 InputBase; /* Lowest value in input range */ 597 UINT32 IdCount; /* Number of IDs */ 598 UINT32 OutputBase; /* Lowest value in output range */ 599 UINT32 OutputReference; /* A reference to the output node */ 600 UINT32 Flags; 601 602 } ACPI_IORT_ID_MAPPING; 603 604 /* Masks for Flags field above for IORT subtable */ 605 606 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 607 608 609 typedef struct acpi_iort_memory_access 610 { 611 UINT32 CacheCoherency; 612 UINT8 Hints; 613 UINT16 Reserved; 614 UINT8 MemoryFlags; 615 616 } ACPI_IORT_MEMORY_ACCESS; 617 618 /* Values for CacheCoherency field above */ 619 620 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 621 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 622 623 /* Masks for Hints field above */ 624 625 #define ACPI_IORT_HT_TRANSIENT (1) 626 #define ACPI_IORT_HT_WRITE (1<<1) 627 #define ACPI_IORT_HT_READ (1<<2) 628 #define ACPI_IORT_HT_OVERRIDE (1<<3) 629 630 /* Masks for MemoryFlags field above */ 631 632 #define ACPI_IORT_MF_COHERENCY (1) 633 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 634 635 636 /* 637 * IORT node specific subtables 638 */ 639 typedef struct acpi_iort_its_group 640 { 641 UINT32 ItsCount; 642 UINT32 Identifiers[]; /* GIC ITS identifier array */ 643 644 } ACPI_IORT_ITS_GROUP; 645 646 647 typedef struct acpi_iort_named_component 648 { 649 UINT32 NodeFlags; 650 UINT64 MemoryProperties; /* Memory access properties */ 651 UINT8 MemoryAddressLimit; /* Memory address size limit */ 652 char DeviceName[]; /* Path of namespace object */ 653 654 } ACPI_IORT_NAMED_COMPONENT; 655 656 /* Masks for Flags field above */ 657 658 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 659 #define ACPI_IORT_NC_PASID_BITS (31<<1) 660 661 typedef struct acpi_iort_root_complex 662 { 663 UINT64 MemoryProperties; /* Memory access properties */ 664 UINT32 AtsAttribute; 665 UINT32 PciSegmentNumber; 666 UINT8 MemoryAddressLimit; /* Memory address size limit */ 667 UINT16 PasidCapabilities; /* PASID Capabilities */ 668 UINT8 Reserved[]; /* Reserved, must be zero */ 669 670 } ACPI_IORT_ROOT_COMPLEX; 671 672 /* Masks for AtsAttribute field above */ 673 674 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 675 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 676 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 677 678 /* Masks for PasidCapabilities field above */ 679 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 680 681 typedef struct acpi_iort_smmu 682 { 683 UINT64 BaseAddress; /* SMMU base address */ 684 UINT64 Span; /* Length of memory range */ 685 UINT32 Model; 686 UINT32 Flags; 687 UINT32 GlobalInterruptOffset; 688 UINT32 ContextInterruptCount; 689 UINT32 ContextInterruptOffset; 690 UINT32 PmuInterruptCount; 691 UINT32 PmuInterruptOffset; 692 UINT64 Interrupts[]; /* Interrupt array */ 693 694 } ACPI_IORT_SMMU; 695 696 /* Values for Model field above */ 697 698 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 699 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 700 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 701 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 702 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 703 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 704 705 /* Masks for Flags field above */ 706 707 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 708 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 709 710 /* Global interrupt format */ 711 712 typedef struct acpi_iort_smmu_gsi 713 { 714 UINT32 NSgIrpt; 715 UINT32 NSgIrptFlags; 716 UINT32 NSgCfgIrpt; 717 UINT32 NSgCfgIrptFlags; 718 719 } ACPI_IORT_SMMU_GSI; 720 721 722 typedef struct acpi_iort_smmu_v3 723 { 724 UINT64 BaseAddress; /* SMMUv3 base address */ 725 UINT32 Flags; 726 UINT32 Reserved; 727 UINT64 VatosAddress; 728 UINT32 Model; 729 UINT32 EventGsiv; 730 UINT32 PriGsiv; 731 UINT32 GerrGsiv; 732 UINT32 SyncGsiv; 733 UINT32 Pxm; 734 UINT32 IdMappingIndex; 735 736 } ACPI_IORT_SMMU_V3; 737 738 /* Values for Model field above */ 739 740 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 741 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 742 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 743 744 /* Masks for Flags field above */ 745 746 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 747 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 748 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 749 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 750 751 typedef struct acpi_iort_pmcg 752 { 753 UINT64 Page0BaseAddress; 754 UINT32 OverflowGsiv; 755 UINT32 NodeReference; 756 UINT64 Page1BaseAddress; 757 758 } ACPI_IORT_PMCG; 759 760 typedef struct acpi_iort_rmr { 761 UINT32 Flags; 762 UINT32 RmrCount; 763 UINT32 RmrOffset; 764 765 } ACPI_IORT_RMR; 766 767 /* Masks for Flags field above */ 768 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 769 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 770 771 /* 772 * Macro to access the Access Attributes in flags field above: 773 * Access Attributes is encoded in bits 9:2 774 */ 775 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 776 777 /* Values for above Access Attributes */ 778 779 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 780 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 781 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 782 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 783 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 784 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 785 786 typedef struct acpi_iort_rmr_desc { 787 UINT64 BaseAddress; 788 UINT64 Length; 789 UINT32 Reserved; 790 791 } ACPI_IORT_RMR_DESC; 792 793 /******************************************************************************* 794 * 795 * IVRS - I/O Virtualization Reporting Structure 796 * Version 1 797 * 798 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 799 * Revision 1.26, February 2009. 800 * 801 ******************************************************************************/ 802 803 typedef struct acpi_table_ivrs 804 { 805 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 806 UINT32 Info; /* Common virtualization info */ 807 UINT64 Reserved; 808 809 } ACPI_TABLE_IVRS; 810 811 /* Values for Info field above */ 812 813 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 814 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 815 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 816 817 818 /* IVRS subtable header */ 819 820 typedef struct acpi_ivrs_header 821 { 822 UINT8 Type; /* Subtable type */ 823 UINT8 Flags; 824 UINT16 Length; /* Subtable length */ 825 UINT16 DeviceId; /* ID of IOMMU */ 826 827 } ACPI_IVRS_HEADER; 828 829 /* Values for subtable Type above */ 830 831 enum AcpiIvrsType 832 { 833 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 834 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 835 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 836 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 837 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 838 ACPI_IVRS_TYPE_MEMORY3 = 0x22 839 }; 840 841 /* Masks for Flags field above for IVHD subtable */ 842 843 #define ACPI_IVHD_TT_ENABLE (1) 844 #define ACPI_IVHD_PASS_PW (1<<1) 845 #define ACPI_IVHD_RES_PASS_PW (1<<2) 846 #define ACPI_IVHD_ISOC (1<<3) 847 #define ACPI_IVHD_IOTLB (1<<4) 848 849 /* Masks for Flags field above for IVMD subtable */ 850 851 #define ACPI_IVMD_UNITY (1) 852 #define ACPI_IVMD_READ (1<<1) 853 #define ACPI_IVMD_WRITE (1<<2) 854 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 855 856 857 /* 858 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 859 */ 860 861 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 862 863 typedef struct acpi_ivrs_hardware_10 864 { 865 ACPI_IVRS_HEADER Header; 866 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 867 UINT64 BaseAddress; /* IOMMU control registers */ 868 UINT16 PciSegmentGroup; 869 UINT16 Info; /* MSI number and unit ID */ 870 UINT32 FeatureReporting; 871 872 } ACPI_IVRS_HARDWARE1; 873 874 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 875 876 typedef struct acpi_ivrs_hardware_11 877 { 878 ACPI_IVRS_HEADER Header; 879 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 880 UINT64 BaseAddress; /* IOMMU control registers */ 881 UINT16 PciSegmentGroup; 882 UINT16 Info; /* MSI number and unit ID */ 883 UINT32 Attributes; 884 UINT64 EfrRegisterImage; 885 UINT64 Reserved; 886 } ACPI_IVRS_HARDWARE2; 887 888 /* Masks for Info field above */ 889 890 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 891 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 892 893 894 /* 895 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 896 * Upper two bits of the Type field are the (encoded) length of the structure. 897 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 898 * are reserved for future use but not defined. 899 */ 900 typedef struct acpi_ivrs_de_header 901 { 902 UINT8 Type; 903 UINT16 Id; 904 UINT8 DataSetting; 905 906 } ACPI_IVRS_DE_HEADER; 907 908 /* Length of device entry is in the top two bits of Type field above */ 909 910 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 911 912 /* Values for device entry Type field above */ 913 914 enum AcpiIvrsDeviceEntryType 915 { 916 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 917 918 ACPI_IVRS_TYPE_PAD4 = 0, 919 ACPI_IVRS_TYPE_ALL = 1, 920 ACPI_IVRS_TYPE_SELECT = 2, 921 ACPI_IVRS_TYPE_START = 3, 922 ACPI_IVRS_TYPE_END = 4, 923 924 /* 8-byte device entries */ 925 926 ACPI_IVRS_TYPE_PAD8 = 64, 927 ACPI_IVRS_TYPE_NOT_USED = 65, 928 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 929 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 930 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 931 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 932 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 933 934 /* Variable-length device entries */ 935 936 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 937 }; 938 939 /* Values for Data field above */ 940 941 #define ACPI_IVHD_INIT_PASS (1) 942 #define ACPI_IVHD_EINT_PASS (1<<1) 943 #define ACPI_IVHD_NMI_PASS (1<<2) 944 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 945 #define ACPI_IVHD_LINT0_PASS (1<<6) 946 #define ACPI_IVHD_LINT1_PASS (1<<7) 947 948 949 /* Types 0-4: 4-byte device entry */ 950 951 typedef struct acpi_ivrs_device4 952 { 953 ACPI_IVRS_DE_HEADER Header; 954 955 } ACPI_IVRS_DEVICE4; 956 957 /* Types 66-67: 8-byte device entry */ 958 959 typedef struct acpi_ivrs_device8a 960 { 961 ACPI_IVRS_DE_HEADER Header; 962 UINT8 Reserved1; 963 UINT16 UsedId; 964 UINT8 Reserved2; 965 966 } ACPI_IVRS_DEVICE8A; 967 968 /* Types 70-71: 8-byte device entry */ 969 970 typedef struct acpi_ivrs_device8b 971 { 972 ACPI_IVRS_DE_HEADER Header; 973 UINT32 ExtendedData; 974 975 } ACPI_IVRS_DEVICE8B; 976 977 /* Values for ExtendedData above */ 978 979 #define ACPI_IVHD_ATS_DISABLED (1<<31) 980 981 /* Type 72: 8-byte device entry */ 982 983 typedef struct acpi_ivrs_device8c 984 { 985 ACPI_IVRS_DE_HEADER Header; 986 UINT8 Handle; 987 UINT16 UsedId; 988 UINT8 Variety; 989 990 } ACPI_IVRS_DEVICE8C; 991 992 /* Values for Variety field above */ 993 994 #define ACPI_IVHD_IOAPIC 1 995 #define ACPI_IVHD_HPET 2 996 997 /* Type 240: variable-length device entry */ 998 999 typedef struct acpi_ivrs_device_hid 1000 { 1001 ACPI_IVRS_DE_HEADER Header; 1002 UINT64 AcpiHid; 1003 UINT64 AcpiCid; 1004 UINT8 UidType; 1005 UINT8 UidLength; 1006 1007 } ACPI_IVRS_DEVICE_HID; 1008 1009 /* Values for UidType above */ 1010 1011 #define ACPI_IVRS_UID_NOT_PRESENT 0 1012 #define ACPI_IVRS_UID_IS_INTEGER 1 1013 #define ACPI_IVRS_UID_IS_STRING 2 1014 1015 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 1016 1017 typedef struct acpi_ivrs_memory 1018 { 1019 ACPI_IVRS_HEADER Header; 1020 UINT16 AuxData; 1021 UINT64 Reserved; 1022 UINT64 StartAddress; 1023 UINT64 MemoryLength; 1024 1025 } ACPI_IVRS_MEMORY; 1026 1027 1028 /******************************************************************************* 1029 * 1030 * LPIT - Low Power Idle Table 1031 * 1032 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 1033 * 1034 ******************************************************************************/ 1035 1036 typedef struct acpi_table_lpit 1037 { 1038 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1039 1040 } ACPI_TABLE_LPIT; 1041 1042 1043 /* LPIT subtable header */ 1044 1045 typedef struct acpi_lpit_header 1046 { 1047 UINT32 Type; /* Subtable type */ 1048 UINT32 Length; /* Subtable length */ 1049 UINT16 UniqueId; 1050 UINT16 Reserved; 1051 UINT32 Flags; 1052 1053 } ACPI_LPIT_HEADER; 1054 1055 /* Values for subtable Type above */ 1056 1057 enum AcpiLpitType 1058 { 1059 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 1060 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 1061 }; 1062 1063 /* Masks for Flags field above */ 1064 1065 #define ACPI_LPIT_STATE_DISABLED (1) 1066 #define ACPI_LPIT_NO_COUNTER (1<<1) 1067 1068 /* 1069 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 1070 */ 1071 1072 /* 0x00: Native C-state instruction based LPI structure */ 1073 1074 typedef struct acpi_lpit_native 1075 { 1076 ACPI_LPIT_HEADER Header; 1077 ACPI_GENERIC_ADDRESS EntryTrigger; 1078 UINT32 Residency; 1079 UINT32 Latency; 1080 ACPI_GENERIC_ADDRESS ResidencyCounter; 1081 UINT64 CounterFrequency; 1082 1083 } ACPI_LPIT_NATIVE; 1084 1085 1086 /******************************************************************************* 1087 * 1088 * MADT - Multiple APIC Description Table 1089 * Version 3 1090 * 1091 ******************************************************************************/ 1092 1093 typedef struct acpi_table_madt 1094 { 1095 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1096 UINT32 Address; /* Physical address of local APIC */ 1097 UINT32 Flags; 1098 1099 } ACPI_TABLE_MADT; 1100 1101 /* Masks for Flags field above */ 1102 1103 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1104 1105 /* Values for PCATCompat flag */ 1106 1107 #define ACPI_MADT_DUAL_PIC 1 1108 #define ACPI_MADT_MULTIPLE_APIC 0 1109 1110 1111 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1112 1113 enum AcpiMadtType 1114 { 1115 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1116 ACPI_MADT_TYPE_IO_APIC = 1, 1117 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1118 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1119 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1120 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1121 ACPI_MADT_TYPE_IO_SAPIC = 6, 1122 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1123 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1124 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1125 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1126 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1127 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1128 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1129 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1130 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1131 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 1132 ACPI_MADT_TYPE_CORE_PIC = 17, 1133 ACPI_MADT_TYPE_LIO_PIC = 18, 1134 ACPI_MADT_TYPE_HT_PIC = 19, 1135 ACPI_MADT_TYPE_EIO_PIC = 20, 1136 ACPI_MADT_TYPE_MSI_PIC = 21, 1137 ACPI_MADT_TYPE_BIO_PIC = 22, 1138 ACPI_MADT_TYPE_LPC_PIC = 23, 1139 ACPI_MADT_TYPE_RINTC = 24, 1140 ACPI_MADT_TYPE_IMSIC = 25, 1141 ACPI_MADT_TYPE_APLIC = 26, 1142 ACPI_MADT_TYPE_PLIC = 27, 1143 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 1144 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 1145 }; 1146 1147 1148 /* 1149 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1150 */ 1151 1152 /* 0: Processor Local APIC */ 1153 1154 typedef struct acpi_madt_local_apic 1155 { 1156 ACPI_SUBTABLE_HEADER Header; 1157 UINT8 ProcessorId; /* ACPI processor id */ 1158 UINT8 Id; /* Processor's local APIC id */ 1159 UINT32 LapicFlags; 1160 1161 } ACPI_MADT_LOCAL_APIC; 1162 1163 1164 /* 1: IO APIC */ 1165 1166 typedef struct acpi_madt_io_apic 1167 { 1168 ACPI_SUBTABLE_HEADER Header; 1169 UINT8 Id; /* I/O APIC ID */ 1170 UINT8 Reserved; /* Reserved - must be zero */ 1171 UINT32 Address; /* APIC physical address */ 1172 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1173 1174 } ACPI_MADT_IO_APIC; 1175 1176 1177 /* 2: Interrupt Override */ 1178 1179 typedef struct acpi_madt_interrupt_override 1180 { 1181 ACPI_SUBTABLE_HEADER Header; 1182 UINT8 Bus; /* 0 - ISA */ 1183 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1184 UINT32 GlobalIrq; /* Global system interrupt */ 1185 UINT16 IntiFlags; 1186 1187 } ACPI_MADT_INTERRUPT_OVERRIDE; 1188 1189 1190 /* 3: NMI Source */ 1191 1192 typedef struct acpi_madt_nmi_source 1193 { 1194 ACPI_SUBTABLE_HEADER Header; 1195 UINT16 IntiFlags; 1196 UINT32 GlobalIrq; /* Global system interrupt */ 1197 1198 } ACPI_MADT_NMI_SOURCE; 1199 1200 1201 /* 4: Local APIC NMI */ 1202 1203 typedef struct acpi_madt_local_apic_nmi 1204 { 1205 ACPI_SUBTABLE_HEADER Header; 1206 UINT8 ProcessorId; /* ACPI processor id */ 1207 UINT16 IntiFlags; 1208 UINT8 Lint; /* LINTn to which NMI is connected */ 1209 1210 } ACPI_MADT_LOCAL_APIC_NMI; 1211 1212 1213 /* 5: Address Override */ 1214 1215 typedef struct acpi_madt_local_apic_override 1216 { 1217 ACPI_SUBTABLE_HEADER Header; 1218 UINT16 Reserved; /* Reserved, must be zero */ 1219 UINT64 Address; /* APIC physical address */ 1220 1221 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1222 1223 1224 /* 6: I/O Sapic */ 1225 1226 typedef struct acpi_madt_io_sapic 1227 { 1228 ACPI_SUBTABLE_HEADER Header; 1229 UINT8 Id; /* I/O SAPIC ID */ 1230 UINT8 Reserved; /* Reserved, must be zero */ 1231 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1232 UINT64 Address; /* SAPIC physical address */ 1233 1234 } ACPI_MADT_IO_SAPIC; 1235 1236 1237 /* 7: Local Sapic */ 1238 1239 typedef struct acpi_madt_local_sapic 1240 { 1241 ACPI_SUBTABLE_HEADER Header; 1242 UINT8 ProcessorId; /* ACPI processor id */ 1243 UINT8 Id; /* SAPIC ID */ 1244 UINT8 Eid; /* SAPIC EID */ 1245 UINT8 Reserved[3]; /* Reserved, must be zero */ 1246 UINT32 LapicFlags; 1247 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1248 char UidString[]; /* String UID - ACPI 3.0 */ 1249 1250 } ACPI_MADT_LOCAL_SAPIC; 1251 1252 1253 /* 8: Platform Interrupt Source */ 1254 1255 typedef struct acpi_madt_interrupt_source 1256 { 1257 ACPI_SUBTABLE_HEADER Header; 1258 UINT16 IntiFlags; 1259 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1260 UINT8 Id; /* Processor ID */ 1261 UINT8 Eid; /* Processor EID */ 1262 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1263 UINT32 GlobalIrq; /* Global system interrupt */ 1264 UINT32 Flags; /* Interrupt Source Flags */ 1265 1266 } ACPI_MADT_INTERRUPT_SOURCE; 1267 1268 /* Masks for Flags field above */ 1269 1270 #define ACPI_MADT_CPEI_OVERRIDE (1) 1271 1272 1273 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1274 1275 typedef struct acpi_madt_local_x2apic 1276 { 1277 ACPI_SUBTABLE_HEADER Header; 1278 UINT16 Reserved; /* Reserved - must be zero */ 1279 UINT32 LocalApicId; /* Processor x2APIC ID */ 1280 UINT32 LapicFlags; 1281 UINT32 Uid; /* ACPI processor UID */ 1282 1283 } ACPI_MADT_LOCAL_X2APIC; 1284 1285 1286 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1287 1288 typedef struct acpi_madt_local_x2apic_nmi 1289 { 1290 ACPI_SUBTABLE_HEADER Header; 1291 UINT16 IntiFlags; 1292 UINT32 Uid; /* ACPI processor UID */ 1293 UINT8 Lint; /* LINTn to which NMI is connected */ 1294 UINT8 Reserved[3]; /* Reserved - must be zero */ 1295 1296 } ACPI_MADT_LOCAL_X2APIC_NMI; 1297 1298 1299 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1300 1301 typedef struct acpi_madt_generic_interrupt 1302 { 1303 ACPI_SUBTABLE_HEADER Header; 1304 UINT16 Reserved; /* Reserved - must be zero */ 1305 UINT32 CpuInterfaceNumber; 1306 UINT32 Uid; 1307 UINT32 Flags; 1308 UINT32 ParkingVersion; 1309 UINT32 PerformanceInterrupt; 1310 UINT64 ParkedAddress; 1311 UINT64 BaseAddress; 1312 UINT64 GicvBaseAddress; 1313 UINT64 GichBaseAddress; 1314 UINT32 VgicInterrupt; 1315 UINT64 GicrBaseAddress; 1316 UINT64 ArmMpidr; 1317 UINT8 EfficiencyClass; 1318 UINT8 Reserved2[1]; 1319 UINT16 SpeInterrupt; /* ACPI 6.3 */ 1320 UINT16 TrbeInterrupt; /* ACPI 6.5 */ 1321 1322 } ACPI_MADT_GENERIC_INTERRUPT; 1323 1324 /* Masks for Flags field above */ 1325 1326 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1327 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1328 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1329 1330 1331 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1332 1333 typedef struct acpi_madt_generic_distributor 1334 { 1335 ACPI_SUBTABLE_HEADER Header; 1336 UINT16 Reserved; /* Reserved - must be zero */ 1337 UINT32 GicId; 1338 UINT64 BaseAddress; 1339 UINT32 GlobalIrqBase; 1340 UINT8 Version; 1341 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1342 1343 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1344 1345 /* Values for Version field above */ 1346 1347 enum AcpiMadtGicVersion 1348 { 1349 ACPI_MADT_GIC_VERSION_NONE = 0, 1350 ACPI_MADT_GIC_VERSION_V1 = 1, 1351 ACPI_MADT_GIC_VERSION_V2 = 2, 1352 ACPI_MADT_GIC_VERSION_V3 = 3, 1353 ACPI_MADT_GIC_VERSION_V4 = 4, 1354 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1355 }; 1356 1357 1358 /* 13: Generic MSI Frame (ACPI 5.1) */ 1359 1360 typedef struct acpi_madt_generic_msi_frame 1361 { 1362 ACPI_SUBTABLE_HEADER Header; 1363 UINT16 Reserved; /* Reserved - must be zero */ 1364 UINT32 MsiFrameId; 1365 UINT64 BaseAddress; 1366 UINT32 Flags; 1367 UINT16 SpiCount; 1368 UINT16 SpiBase; 1369 1370 } ACPI_MADT_GENERIC_MSI_FRAME; 1371 1372 /* Masks for Flags field above */ 1373 1374 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1375 1376 1377 /* 14: Generic Redistributor (ACPI 5.1) */ 1378 1379 typedef struct acpi_madt_generic_redistributor 1380 { 1381 ACPI_SUBTABLE_HEADER Header; 1382 UINT16 Reserved; /* reserved - must be zero */ 1383 UINT64 BaseAddress; 1384 UINT32 Length; 1385 1386 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1387 1388 1389 /* 15: Generic Translator (ACPI 6.0) */ 1390 1391 typedef struct acpi_madt_generic_translator 1392 { 1393 ACPI_SUBTABLE_HEADER Header; 1394 UINT16 Reserved; /* reserved - must be zero */ 1395 UINT32 TranslationId; 1396 UINT64 BaseAddress; 1397 UINT32 Reserved2; 1398 1399 } ACPI_MADT_GENERIC_TRANSLATOR; 1400 1401 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1402 1403 typedef struct acpi_madt_multiproc_wakeup 1404 { 1405 ACPI_SUBTABLE_HEADER Header; 1406 UINT16 MailboxVersion; 1407 UINT32 Reserved; /* reserved - must be zero */ 1408 UINT64 BaseAddress; 1409 1410 } ACPI_MADT_MULTIPROC_WAKEUP; 1411 1412 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1413 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1414 1415 typedef struct acpi_madt_multiproc_wakeup_mailbox 1416 { 1417 UINT16 Command; 1418 UINT16 Reserved; /* reserved - must be zero */ 1419 UINT32 ApicId; 1420 UINT64 WakeupVector; 1421 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1422 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1423 1424 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1425 1426 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1427 1428 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1429 1430 typedef struct acpi_madt_core_pic { 1431 ACPI_SUBTABLE_HEADER Header; 1432 UINT8 Version; 1433 UINT32 ProcessorId; 1434 UINT32 CoreId; 1435 UINT32 Flags; 1436 } ACPI_MADT_CORE_PIC; 1437 1438 /* Values for Version field above */ 1439 1440 enum AcpiMadtCorePicVersion { 1441 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1442 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1443 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1444 }; 1445 1446 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1447 1448 typedef struct acpi_madt_lio_pic { 1449 ACPI_SUBTABLE_HEADER Header; 1450 UINT8 Version; 1451 UINT64 Address; 1452 UINT16 Size; 1453 UINT8 Cascade[2]; 1454 UINT32 CascadeMap[2]; 1455 } ACPI_MADT_LIO_PIC; 1456 1457 /* Values for Version field above */ 1458 1459 enum AcpiMadtLioPicVersion { 1460 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1461 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1462 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1463 }; 1464 1465 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1466 1467 typedef struct acpi_madt_ht_pic { 1468 ACPI_SUBTABLE_HEADER Header; 1469 UINT8 Version; 1470 UINT64 Address; 1471 UINT16 Size; 1472 UINT8 Cascade[8]; 1473 } ACPI_MADT_HT_PIC; 1474 1475 /* Values for Version field above */ 1476 1477 enum AcpiMadtHtPicVersion { 1478 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1479 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1480 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1481 }; 1482 1483 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1484 1485 typedef struct acpi_madt_eio_pic { 1486 ACPI_SUBTABLE_HEADER Header; 1487 UINT8 Version; 1488 UINT8 Cascade; 1489 UINT8 Node; 1490 UINT64 NodeMap; 1491 } ACPI_MADT_EIO_PIC; 1492 1493 /* Values for Version field above */ 1494 1495 enum AcpiMadtEioPicVersion { 1496 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1497 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1498 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1499 }; 1500 1501 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1502 1503 typedef struct acpi_madt_msi_pic { 1504 ACPI_SUBTABLE_HEADER Header; 1505 UINT8 Version; 1506 UINT64 MsgAddress; 1507 UINT32 Start; 1508 UINT32 Count; 1509 } ACPI_MADT_MSI_PIC; 1510 1511 /* Values for Version field above */ 1512 1513 enum AcpiMadtMsiPicVersion { 1514 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1515 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1516 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1517 }; 1518 1519 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1520 1521 typedef struct acpi_madt_bio_pic { 1522 ACPI_SUBTABLE_HEADER Header; 1523 UINT8 Version; 1524 UINT64 Address; 1525 UINT16 Size; 1526 UINT16 Id; 1527 UINT16 GsiBase; 1528 } ACPI_MADT_BIO_PIC; 1529 1530 /* Values for Version field above */ 1531 1532 enum AcpiMadtBioPicVersion { 1533 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1534 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1535 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1536 }; 1537 1538 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1539 1540 typedef struct acpi_madt_lpc_pic { 1541 ACPI_SUBTABLE_HEADER Header; 1542 UINT8 Version; 1543 UINT64 Address; 1544 UINT16 Size; 1545 UINT8 Cascade; 1546 } ACPI_MADT_LPC_PIC; 1547 1548 /* Values for Version field above */ 1549 1550 enum AcpiMadtLpcPicVersion { 1551 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1552 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1553 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1554 }; 1555 1556 /* 24: RISC-V INTC */ 1557 typedef struct acpi_madt_rintc { 1558 ACPI_SUBTABLE_HEADER Header; 1559 UINT8 Version; 1560 UINT8 Reserved; 1561 UINT32 Flags; 1562 UINT64 HartId; 1563 UINT32 Uid; /* ACPI processor UID */ 1564 UINT32 ExtIntcId; /* External INTC Id */ 1565 UINT64 ImsicAddr; /* IMSIC base address */ 1566 UINT32 ImsicSize; /* IMSIC size */ 1567 } ACPI_MADT_RINTC; 1568 1569 /* Values for RISC-V INTC Version field above */ 1570 1571 enum AcpiMadtRintcVersion { 1572 ACPI_MADT_RINTC_VERSION_NONE = 0, 1573 ACPI_MADT_RINTC_VERSION_V1 = 1, 1574 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1575 }; 1576 1577 /* 25: RISC-V IMSIC */ 1578 typedef struct acpi_madt_imsic { 1579 ACPI_SUBTABLE_HEADER Header; 1580 UINT8 Version; 1581 UINT8 Reserved; 1582 UINT32 Flags; 1583 UINT16 NumIds; 1584 UINT16 NumGuestIds; 1585 UINT8 GuestIndexBits; 1586 UINT8 HartIndexBits; 1587 UINT8 GroupIndexBits; 1588 UINT8 GroupIndexShift; 1589 } ACPI_MADT_IMSIC; 1590 1591 /* 26: RISC-V APLIC */ 1592 typedef struct acpi_madt_aplic { 1593 ACPI_SUBTABLE_HEADER Header; 1594 UINT8 Version; 1595 UINT8 Id; 1596 UINT32 Flags; 1597 UINT8 HwId[8]; 1598 UINT16 NumIdcs; 1599 UINT16 NumSources; 1600 UINT32 GsiBase; 1601 UINT64 BaseAddr; 1602 UINT32 Size; 1603 } ACPI_MADT_APLIC; 1604 1605 /* 27: RISC-V PLIC */ 1606 typedef struct acpi_madt_plic { 1607 ACPI_SUBTABLE_HEADER Header; 1608 UINT8 Version; 1609 UINT8 Id; 1610 UINT8 HwId[8]; 1611 UINT16 NumIrqs; 1612 UINT16 MaxPrio; 1613 UINT32 Flags; 1614 UINT32 Size; 1615 UINT64 BaseAddr; 1616 UINT32 GsiBase; 1617 } ACPI_MADT_PLIC; 1618 1619 1620 /* 80: OEM data */ 1621 1622 typedef struct acpi_madt_oem_data 1623 { 1624 ACPI_FLEX_ARRAY(UINT8, OemData); 1625 } ACPI_MADT_OEM_DATA; 1626 1627 1628 /* 1629 * Common flags fields for MADT subtables 1630 */ 1631 1632 /* MADT Local APIC flags */ 1633 1634 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1635 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1636 1637 /* MADT MPS INTI flags (IntiFlags) */ 1638 1639 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1640 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1641 1642 /* Values for MPS INTI flags */ 1643 1644 #define ACPI_MADT_POLARITY_CONFORMS 0 1645 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1646 #define ACPI_MADT_POLARITY_RESERVED 2 1647 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1648 1649 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1650 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1651 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1652 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1653 1654 1655 /******************************************************************************* 1656 * 1657 * MCFG - PCI Memory Mapped Configuration table and subtable 1658 * Version 1 1659 * 1660 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1661 * 1662 ******************************************************************************/ 1663 1664 typedef struct acpi_table_mcfg 1665 { 1666 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1667 UINT8 Reserved[8]; 1668 1669 } ACPI_TABLE_MCFG; 1670 1671 1672 /* Subtable */ 1673 1674 typedef struct acpi_mcfg_allocation 1675 { 1676 UINT64 Address; /* Base address, processor-relative */ 1677 UINT16 PciSegment; /* PCI segment group number */ 1678 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1679 UINT8 EndBusNumber; /* Final PCI Bus number */ 1680 UINT32 Reserved; 1681 1682 } ACPI_MCFG_ALLOCATION; 1683 1684 1685 /******************************************************************************* 1686 * 1687 * MCHI - Management Controller Host Interface Table 1688 * Version 1 1689 * 1690 * Conforms to "Management Component Transport Protocol (MCTP) Host 1691 * Interface Specification", Revision 1.0.0a, October 13, 2009 1692 * 1693 ******************************************************************************/ 1694 1695 typedef struct acpi_table_mchi 1696 { 1697 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1698 UINT8 InterfaceType; 1699 UINT8 Protocol; 1700 UINT64 ProtocolData; 1701 UINT8 InterruptType; 1702 UINT8 Gpe; 1703 UINT8 PciDeviceFlag; 1704 UINT32 GlobalInterrupt; 1705 ACPI_GENERIC_ADDRESS ControlRegister; 1706 UINT8 PciSegment; 1707 UINT8 PciBus; 1708 UINT8 PciDevice; 1709 UINT8 PciFunction; 1710 1711 } ACPI_TABLE_MCHI; 1712 1713 /******************************************************************************* 1714 * 1715 * MPAM - Memory System Resource Partitioning and Monitoring 1716 * 1717 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1718 * Document number: ARM DEN 0065, December, 2022. 1719 * 1720 ******************************************************************************/ 1721 1722 /* MPAM RIS locator types. Table 11, Location types */ 1723 enum AcpiMpamLocatorType { 1724 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1725 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1726 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1727 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1728 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1729 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1730 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1731 }; 1732 1733 /* MPAM Functional dependency descriptor. Table 10 */ 1734 typedef struct acpi_mpam_func_deps 1735 { 1736 UINT32 Producer; 1737 UINT32 Reserved; 1738 } ACPI_MPAM_FUNC_DEPS; 1739 1740 /* MPAM Processor cache locator descriptor. Table 13 */ 1741 typedef struct acpi_mpam_resource_cache_locator 1742 { 1743 UINT64 CacheReference; 1744 UINT32 Reserved; 1745 } ACPI_MPAM_RESOURCE_CACHE_LOCATOR; 1746 1747 /* MPAM Memory locator descriptor. Table 14 */ 1748 typedef struct acpi_mpam_resource_memory_locator 1749 { 1750 UINT64 ProximityDomain; 1751 UINT32 Reserved; 1752 } ACPI_MPAM_RESOURCE_MEMORY_LOCATOR; 1753 1754 /* MPAM SMMU locator descriptor. Table 15 */ 1755 typedef struct acpi_mpam_resource_smmu_locator 1756 { 1757 UINT64 SmmuInterface; 1758 UINT32 Reserved; 1759 } ACPI_MPAM_RESOURCE_SMMU_INTERFACE; 1760 1761 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1762 typedef struct acpi_mpam_resource_memcache_locator 1763 { 1764 UINT8 Reserved[7]; 1765 UINT8 Level; 1766 UINT32 Reference; 1767 } ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE; 1768 1769 /* MPAM ACPI device locator descriptor. Table 17 */ 1770 typedef struct acpi_mpam_resource_acpi_locator 1771 { 1772 UINT64 AcpiHwId; 1773 UINT32 AcpiUniqueId; 1774 } ACPI_MPAM_RESOURCE_ACPI_INTERFACE; 1775 1776 /* MPAM Interconnect locator descriptor. Table 18 */ 1777 typedef struct acpi_mpam_resource_interconnect_locator 1778 { 1779 UINT64 InterConnectDescTblOff; 1780 UINT32 Reserved; 1781 } ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE; 1782 1783 /* MPAM Locator structure. Table 12 */ 1784 typedef struct acpi_mpam_resource_generic_locator 1785 { 1786 UINT64 Descriptor1; 1787 UINT32 Descriptor2; 1788 } ACPI_MPAM_RESOURCE_GENERIC_LOCATOR; 1789 1790 typedef union acpi_mpam_resource_locator 1791 { 1792 ACPI_MPAM_RESOURCE_CACHE_LOCATOR CacheLocator; 1793 ACPI_MPAM_RESOURCE_MEMORY_LOCATOR MemoryLocator; 1794 ACPI_MPAM_RESOURCE_SMMU_INTERFACE SmmuLocator; 1795 ACPI_MPAM_RESOURCE_MEMCACHE_INTERFACE MemCacheLocator; 1796 ACPI_MPAM_RESOURCE_ACPI_INTERFACE AcpiLocator; 1797 ACPI_MPAM_RESOURCE_INTERCONNECT_INTERFACE InterconnectIfcLocator; 1798 ACPI_MPAM_RESOURCE_GENERIC_LOCATOR GenericLocator; 1799 } ACPI_MPAM_RESOURCE_LOCATOR; 1800 1801 /* Memory System Component Resource Node Structure Table 9 */ 1802 typedef struct acpi_mpam_resource_node 1803 { 1804 UINT32 Identifier; 1805 UINT8 RISIndex; 1806 UINT16 Reserved1; 1807 UINT8 LocatorType; 1808 ACPI_MPAM_RESOURCE_LOCATOR Locator; 1809 UINT32 NumFunctionalDeps; 1810 } ACPI_MPAM_RESOURCE_NODE; 1811 1812 /* Memory System Component (MSC) Node Structure. Table 4 */ 1813 typedef struct acpi_mpam_msc_node 1814 { 1815 UINT16 Length; 1816 UINT8 InterfaceType; 1817 UINT8 Reserved; 1818 UINT32 Identifier; 1819 UINT64 BaseAddress; 1820 UINT32 MMIOSize; 1821 UINT32 OverflowInterrupt; 1822 UINT32 OverflowInterruptFlags; 1823 UINT32 Reserved1; 1824 UINT32 OverflowInterruptAffinity; 1825 UINT32 ErrorInterrupt; 1826 UINT32 ErrorInterruptFlags; 1827 UINT32 Reserved2; 1828 UINT32 ErrorInterruptAffinity; 1829 UINT32 MaxNrdyUsec; 1830 UINT64 HardwareIdLinkedDevice; 1831 UINT32 InstanceIdLinkedDevice; 1832 UINT32 NumResouceNodes; 1833 } ACPI_MPAM_MSC_NODE; 1834 1835 typedef struct acpi_table_mpam 1836 { 1837 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1838 } ACPI_TABLE_MPAM; 1839 1840 /******************************************************************************* 1841 * 1842 * MPST - Memory Power State Table (ACPI 5.0) 1843 * Version 1 1844 * 1845 ******************************************************************************/ 1846 1847 #define ACPI_MPST_CHANNEL_INFO \ 1848 UINT8 ChannelId; \ 1849 UINT8 Reserved1[3]; \ 1850 UINT16 PowerNodeCount; \ 1851 UINT16 Reserved2; 1852 1853 /* Main table */ 1854 1855 typedef struct acpi_table_mpst 1856 { 1857 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1858 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1859 1860 } ACPI_TABLE_MPST; 1861 1862 1863 /* Memory Platform Communication Channel Info */ 1864 1865 typedef struct acpi_mpst_channel 1866 { 1867 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1868 1869 } ACPI_MPST_CHANNEL; 1870 1871 1872 /* Memory Power Node Structure */ 1873 1874 typedef struct acpi_mpst_power_node 1875 { 1876 UINT8 Flags; 1877 UINT8 Reserved1; 1878 UINT16 NodeId; 1879 UINT32 Length; 1880 UINT64 RangeAddress; 1881 UINT64 RangeLength; 1882 UINT32 NumPowerStates; 1883 UINT32 NumPhysicalComponents; 1884 1885 } ACPI_MPST_POWER_NODE; 1886 1887 /* Values for Flags field above */ 1888 1889 #define ACPI_MPST_ENABLED 1 1890 #define ACPI_MPST_POWER_MANAGED 2 1891 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1892 1893 1894 /* Memory Power State Structure (follows POWER_NODE above) */ 1895 1896 typedef struct acpi_mpst_power_state 1897 { 1898 UINT8 PowerState; 1899 UINT8 InfoIndex; 1900 1901 } ACPI_MPST_POWER_STATE; 1902 1903 1904 /* Physical Component ID Structure (follows POWER_STATE above) */ 1905 1906 typedef struct acpi_mpst_component 1907 { 1908 UINT16 ComponentId; 1909 1910 } ACPI_MPST_COMPONENT; 1911 1912 1913 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1914 1915 typedef struct acpi_mpst_data_hdr 1916 { 1917 UINT16 CharacteristicsCount; 1918 UINT16 Reserved; 1919 1920 } ACPI_MPST_DATA_HDR; 1921 1922 typedef struct acpi_mpst_power_data 1923 { 1924 UINT8 StructureId; 1925 UINT8 Flags; 1926 UINT16 Reserved1; 1927 UINT32 AveragePower; 1928 UINT32 PowerSaving; 1929 UINT64 ExitLatency; 1930 UINT64 Reserved2; 1931 1932 } ACPI_MPST_POWER_DATA; 1933 1934 /* Values for Flags field above */ 1935 1936 #define ACPI_MPST_PRESERVE 1 1937 #define ACPI_MPST_AUTOENTRY 2 1938 #define ACPI_MPST_AUTOEXIT 4 1939 1940 1941 /* Shared Memory Region (not part of an ACPI table) */ 1942 1943 typedef struct acpi_mpst_shared 1944 { 1945 UINT32 Signature; 1946 UINT16 PccCommand; 1947 UINT16 PccStatus; 1948 UINT32 CommandRegister; 1949 UINT32 StatusRegister; 1950 UINT32 PowerStateId; 1951 UINT32 PowerNodeId; 1952 UINT64 EnergyConsumed; 1953 UINT64 AveragePower; 1954 1955 } ACPI_MPST_SHARED; 1956 1957 1958 /******************************************************************************* 1959 * 1960 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1961 * Version 1 1962 * 1963 ******************************************************************************/ 1964 1965 typedef struct acpi_table_msct 1966 { 1967 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1968 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1969 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1970 UINT32 MaxClockDomains; /* Max number of clock domains */ 1971 UINT64 MaxAddress; /* Max physical address in system */ 1972 1973 } ACPI_TABLE_MSCT; 1974 1975 1976 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1977 1978 typedef struct acpi_msct_proximity 1979 { 1980 UINT8 Revision; 1981 UINT8 Length; 1982 UINT32 RangeStart; /* Start of domain range */ 1983 UINT32 RangeEnd; /* End of domain range */ 1984 UINT32 ProcessorCapacity; 1985 UINT64 MemoryCapacity; /* In bytes */ 1986 1987 } ACPI_MSCT_PROXIMITY; 1988 1989 1990 /******************************************************************************* 1991 * 1992 * MSDM - Microsoft Data Management table 1993 * 1994 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1995 * November 29, 2011. Copyright 2011 Microsoft 1996 * 1997 ******************************************************************************/ 1998 1999 /* Basic MSDM table is only the common ACPI header */ 2000 2001 typedef struct acpi_table_msdm 2002 { 2003 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2004 2005 } ACPI_TABLE_MSDM; 2006 2007 2008 /******************************************************************************* 2009 * 2010 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 2011 * Version 1 2012 * 2013 ******************************************************************************/ 2014 2015 typedef struct acpi_table_nfit 2016 { 2017 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2018 UINT32 Reserved; /* Reserved, must be zero */ 2019 2020 } ACPI_TABLE_NFIT; 2021 2022 /* Subtable header for NFIT */ 2023 2024 typedef struct acpi_nfit_header 2025 { 2026 UINT16 Type; 2027 UINT16 Length; 2028 2029 } ACPI_NFIT_HEADER; 2030 2031 2032 /* Values for subtable type in ACPI_NFIT_HEADER */ 2033 2034 enum AcpiNfitType 2035 { 2036 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 2037 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 2038 ACPI_NFIT_TYPE_INTERLEAVE = 2, 2039 ACPI_NFIT_TYPE_SMBIOS = 3, 2040 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 2041 ACPI_NFIT_TYPE_DATA_REGION = 5, 2042 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 2043 ACPI_NFIT_TYPE_CAPABILITIES = 7, 2044 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 2045 }; 2046 2047 /* 2048 * NFIT Subtables 2049 */ 2050 2051 /* 0: System Physical Address Range Structure */ 2052 2053 typedef struct acpi_nfit_system_address 2054 { 2055 ACPI_NFIT_HEADER Header; 2056 UINT16 RangeIndex; 2057 UINT16 Flags; 2058 UINT32 Reserved; /* Reserved, must be zero */ 2059 UINT32 ProximityDomain; 2060 UINT8 RangeGuid[16]; 2061 UINT64 Address; 2062 UINT64 Length; 2063 UINT64 MemoryMapping; 2064 UINT64 LocationCookie; /* ACPI 6.4 */ 2065 2066 } ACPI_NFIT_SYSTEM_ADDRESS; 2067 2068 /* Flags */ 2069 2070 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 2071 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 2072 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 2073 2074 /* Range Type GUIDs appear in the include/acuuid.h file */ 2075 2076 2077 /* 1: Memory Device to System Address Range Map Structure */ 2078 2079 typedef struct acpi_nfit_memory_map 2080 { 2081 ACPI_NFIT_HEADER Header; 2082 UINT32 DeviceHandle; 2083 UINT16 PhysicalId; 2084 UINT16 RegionId; 2085 UINT16 RangeIndex; 2086 UINT16 RegionIndex; 2087 UINT64 RegionSize; 2088 UINT64 RegionOffset; 2089 UINT64 Address; 2090 UINT16 InterleaveIndex; 2091 UINT16 InterleaveWays; 2092 UINT16 Flags; 2093 UINT16 Reserved; /* Reserved, must be zero */ 2094 2095 } ACPI_NFIT_MEMORY_MAP; 2096 2097 /* Flags */ 2098 2099 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 2100 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 2101 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 2102 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 2103 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 2104 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 2105 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 2106 2107 2108 /* 2: Interleave Structure */ 2109 2110 typedef struct acpi_nfit_interleave 2111 { 2112 ACPI_NFIT_HEADER Header; 2113 UINT16 InterleaveIndex; 2114 UINT16 Reserved; /* Reserved, must be zero */ 2115 UINT32 LineCount; 2116 UINT32 LineSize; 2117 UINT32 LineOffset[]; /* Variable length */ 2118 2119 } ACPI_NFIT_INTERLEAVE; 2120 2121 2122 /* 3: SMBIOS Management Information Structure */ 2123 2124 typedef struct acpi_nfit_smbios 2125 { 2126 ACPI_NFIT_HEADER Header; 2127 UINT32 Reserved; /* Reserved, must be zero */ 2128 UINT8 Data[]; /* Variable length */ 2129 2130 } ACPI_NFIT_SMBIOS; 2131 2132 2133 /* 4: NVDIMM Control Region Structure */ 2134 2135 typedef struct acpi_nfit_control_region 2136 { 2137 ACPI_NFIT_HEADER Header; 2138 UINT16 RegionIndex; 2139 UINT16 VendorId; 2140 UINT16 DeviceId; 2141 UINT16 RevisionId; 2142 UINT16 SubsystemVendorId; 2143 UINT16 SubsystemDeviceId; 2144 UINT16 SubsystemRevisionId; 2145 UINT8 ValidFields; 2146 UINT8 ManufacturingLocation; 2147 UINT16 ManufacturingDate; 2148 UINT8 Reserved[2]; /* Reserved, must be zero */ 2149 UINT32 SerialNumber; 2150 UINT16 Code; 2151 UINT16 Windows; 2152 UINT64 WindowSize; 2153 UINT64 CommandOffset; 2154 UINT64 CommandSize; 2155 UINT64 StatusOffset; 2156 UINT64 StatusSize; 2157 UINT16 Flags; 2158 UINT8 Reserved1[6]; /* Reserved, must be zero */ 2159 2160 } ACPI_NFIT_CONTROL_REGION; 2161 2162 /* Flags */ 2163 2164 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 2165 2166 /* ValidFields bits */ 2167 2168 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 2169 2170 2171 /* 5: NVDIMM Block Data Window Region Structure */ 2172 2173 typedef struct acpi_nfit_data_region 2174 { 2175 ACPI_NFIT_HEADER Header; 2176 UINT16 RegionIndex; 2177 UINT16 Windows; 2178 UINT64 Offset; 2179 UINT64 Size; 2180 UINT64 Capacity; 2181 UINT64 StartAddress; 2182 2183 } ACPI_NFIT_DATA_REGION; 2184 2185 2186 /* 6: Flush Hint Address Structure */ 2187 2188 typedef struct acpi_nfit_flush_address 2189 { 2190 ACPI_NFIT_HEADER Header; 2191 UINT32 DeviceHandle; 2192 UINT16 HintCount; 2193 UINT8 Reserved[6]; /* Reserved, must be zero */ 2194 UINT64 HintAddress[]; /* Variable length */ 2195 2196 } ACPI_NFIT_FLUSH_ADDRESS; 2197 2198 2199 /* 7: Platform Capabilities Structure */ 2200 2201 typedef struct acpi_nfit_capabilities 2202 { 2203 ACPI_NFIT_HEADER Header; 2204 UINT8 HighestCapability; 2205 UINT8 Reserved[3]; /* Reserved, must be zero */ 2206 UINT32 Capabilities; 2207 UINT32 Reserved2; 2208 2209 } ACPI_NFIT_CAPABILITIES; 2210 2211 /* Capabilities Flags */ 2212 2213 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 2214 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 2215 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 2216 2217 2218 /* 2219 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 2220 */ 2221 typedef struct nfit_device_handle 2222 { 2223 UINT32 Handle; 2224 2225 } NFIT_DEVICE_HANDLE; 2226 2227 /* Device handle construction and extraction macros */ 2228 2229 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 2230 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 2231 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 2232 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 2233 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 2234 2235 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 2236 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 2237 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 2238 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 2239 #define ACPI_NFIT_NODE_ID_OFFSET 16 2240 2241 /* Macro to construct a NFIT/NVDIMM device handle */ 2242 2243 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 2244 ((dimm) | \ 2245 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 2246 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 2247 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 2248 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 2249 2250 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 2251 2252 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 2253 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 2254 2255 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 2256 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 2257 2258 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 2259 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 2260 2261 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 2262 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 2263 2264 #define ACPI_NFIT_GET_NODE_ID(handle) \ 2265 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 2266 2267 2268 /******************************************************************************* 2269 * 2270 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2271 * Version 2 (ACPI 6.2) 2272 * 2273 ******************************************************************************/ 2274 2275 typedef struct acpi_table_pcct 2276 { 2277 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2278 UINT32 Flags; 2279 UINT64 Reserved; 2280 2281 } ACPI_TABLE_PCCT; 2282 2283 /* Values for Flags field above */ 2284 2285 #define ACPI_PCCT_DOORBELL 1 2286 2287 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 2288 2289 enum AcpiPcctType 2290 { 2291 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2292 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2293 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2294 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2295 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2296 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2297 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2298 }; 2299 2300 /* 2301 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 2302 */ 2303 2304 /* 0: Generic Communications Subspace */ 2305 2306 typedef struct acpi_pcct_subspace 2307 { 2308 ACPI_SUBTABLE_HEADER Header; 2309 UINT8 Reserved[6]; 2310 UINT64 BaseAddress; 2311 UINT64 Length; 2312 ACPI_GENERIC_ADDRESS DoorbellRegister; 2313 UINT64 PreserveMask; 2314 UINT64 WriteMask; 2315 UINT32 Latency; 2316 UINT32 MaxAccessRate; 2317 UINT16 MinTurnaroundTime; 2318 2319 } ACPI_PCCT_SUBSPACE; 2320 2321 2322 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2323 2324 typedef struct acpi_pcct_hw_reduced 2325 { 2326 ACPI_SUBTABLE_HEADER Header; 2327 UINT32 PlatformInterrupt; 2328 UINT8 Flags; 2329 UINT8 Reserved; 2330 UINT64 BaseAddress; 2331 UINT64 Length; 2332 ACPI_GENERIC_ADDRESS DoorbellRegister; 2333 UINT64 PreserveMask; 2334 UINT64 WriteMask; 2335 UINT32 Latency; 2336 UINT32 MaxAccessRate; 2337 UINT16 MinTurnaroundTime; 2338 2339 } ACPI_PCCT_HW_REDUCED; 2340 2341 2342 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2343 2344 typedef struct acpi_pcct_hw_reduced_type2 2345 { 2346 ACPI_SUBTABLE_HEADER Header; 2347 UINT32 PlatformInterrupt; 2348 UINT8 Flags; 2349 UINT8 Reserved; 2350 UINT64 BaseAddress; 2351 UINT64 Length; 2352 ACPI_GENERIC_ADDRESS DoorbellRegister; 2353 UINT64 PreserveMask; 2354 UINT64 WriteMask; 2355 UINT32 Latency; 2356 UINT32 MaxAccessRate; 2357 UINT16 MinTurnaroundTime; 2358 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2359 UINT64 AckPreserveMask; 2360 UINT64 AckWriteMask; 2361 2362 } ACPI_PCCT_HW_REDUCED_TYPE2; 2363 2364 2365 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2366 2367 typedef struct acpi_pcct_ext_pcc_master 2368 { 2369 ACPI_SUBTABLE_HEADER Header; 2370 UINT32 PlatformInterrupt; 2371 UINT8 Flags; 2372 UINT8 Reserved1; 2373 UINT64 BaseAddress; 2374 UINT32 Length; 2375 ACPI_GENERIC_ADDRESS DoorbellRegister; 2376 UINT64 PreserveMask; 2377 UINT64 WriteMask; 2378 UINT32 Latency; 2379 UINT32 MaxAccessRate; 2380 UINT32 MinTurnaroundTime; 2381 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2382 UINT64 AckPreserveMask; 2383 UINT64 AckSetMask; 2384 UINT64 Reserved2; 2385 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2386 UINT64 CmdCompleteMask; 2387 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2388 UINT64 CmdUpdatePreserveMask; 2389 UINT64 CmdUpdateSetMask; 2390 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2391 UINT64 ErrorStatusMask; 2392 2393 } ACPI_PCCT_EXT_PCC_MASTER; 2394 2395 2396 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2397 2398 typedef struct acpi_pcct_ext_pcc_slave 2399 { 2400 ACPI_SUBTABLE_HEADER Header; 2401 UINT32 PlatformInterrupt; 2402 UINT8 Flags; 2403 UINT8 Reserved1; 2404 UINT64 BaseAddress; 2405 UINT32 Length; 2406 ACPI_GENERIC_ADDRESS DoorbellRegister; 2407 UINT64 PreserveMask; 2408 UINT64 WriteMask; 2409 UINT32 Latency; 2410 UINT32 MaxAccessRate; 2411 UINT32 MinTurnaroundTime; 2412 ACPI_GENERIC_ADDRESS PlatformAckRegister; 2413 UINT64 AckPreserveMask; 2414 UINT64 AckSetMask; 2415 UINT64 Reserved2; 2416 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2417 UINT64 CmdCompleteMask; 2418 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 2419 UINT64 CmdUpdatePreserveMask; 2420 UINT64 CmdUpdateSetMask; 2421 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2422 UINT64 ErrorStatusMask; 2423 2424 } ACPI_PCCT_EXT_PCC_SLAVE; 2425 2426 /* 5: HW Registers based Communications Subspace */ 2427 2428 typedef struct acpi_pcct_hw_reg 2429 { 2430 ACPI_SUBTABLE_HEADER Header; 2431 UINT16 Version; 2432 UINT64 BaseAddress; 2433 UINT64 Length; 2434 ACPI_GENERIC_ADDRESS DoorbellRegister; 2435 UINT64 DoorbellPreserve; 2436 UINT64 DoorbellWrite; 2437 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 2438 UINT64 CmdCompleteMask; 2439 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 2440 UINT64 ErrorStatusMask; 2441 UINT32 NominalLatency; 2442 UINT32 MinTurnaroundTime; 2443 2444 } ACPI_PCCT_HW_REG; 2445 2446 2447 /* Values for doorbell flags above */ 2448 2449 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2450 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2451 2452 2453 /* 2454 * PCC memory structures (not part of the ACPI table) 2455 */ 2456 2457 /* Shared Memory Region */ 2458 2459 typedef struct acpi_pcct_shared_memory 2460 { 2461 UINT32 Signature; 2462 UINT16 Command; 2463 UINT16 Status; 2464 2465 } ACPI_PCCT_SHARED_MEMORY; 2466 2467 2468 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2469 2470 typedef struct acpi_pcct_ext_pcc_shared_memory 2471 { 2472 UINT32 Signature; 2473 UINT32 Flags; 2474 UINT32 Length; 2475 UINT32 Command; 2476 2477 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 2478 2479 2480 /******************************************************************************* 2481 * 2482 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2483 * Version 0 2484 * 2485 ******************************************************************************/ 2486 2487 typedef struct acpi_table_pdtt 2488 { 2489 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2490 UINT8 TriggerCount; 2491 UINT8 Reserved[3]; 2492 UINT32 ArrayOffset; 2493 2494 } ACPI_TABLE_PDTT; 2495 2496 2497 /* 2498 * PDTT Communication Channel Identifier Structure. 2499 * The number of these structures is defined by TriggerCount above, 2500 * starting at ArrayOffset. 2501 */ 2502 typedef struct acpi_pdtt_channel 2503 { 2504 UINT8 SubchannelId; 2505 UINT8 Flags; 2506 2507 } ACPI_PDTT_CHANNEL; 2508 2509 /* Flags for above */ 2510 2511 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2512 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2513 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2514 2515 2516 /******************************************************************************* 2517 * 2518 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2519 * Version 1 2520 * 2521 ******************************************************************************/ 2522 2523 typedef struct acpi_table_phat 2524 { 2525 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2526 2527 } ACPI_TABLE_PHAT; 2528 2529 /* Common header for PHAT subtables that follow main table */ 2530 2531 typedef struct acpi_phat_header 2532 { 2533 UINT16 Type; 2534 UINT16 Length; 2535 UINT8 Revision; 2536 2537 } ACPI_PHAT_HEADER; 2538 2539 2540 /* Values for Type field above */ 2541 2542 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2543 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2544 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2545 2546 /* 2547 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 2548 */ 2549 2550 /* 0: Firmware Version Data Record */ 2551 2552 typedef struct acpi_phat_version_data 2553 { 2554 ACPI_PHAT_HEADER Header; 2555 UINT8 Reserved[3]; 2556 UINT32 ElementCount; 2557 2558 } ACPI_PHAT_VERSION_DATA; 2559 2560 typedef struct acpi_phat_version_element 2561 { 2562 UINT8 Guid[16]; 2563 UINT64 VersionValue; 2564 UINT32 ProducerId; 2565 2566 } ACPI_PHAT_VERSION_ELEMENT; 2567 2568 2569 /* 1: Firmware Health Data Record */ 2570 2571 typedef struct acpi_phat_health_data 2572 { 2573 ACPI_PHAT_HEADER Header; 2574 UINT8 Reserved[2]; 2575 UINT8 Health; 2576 UINT8 DeviceGuid[16]; 2577 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 2578 2579 } ACPI_PHAT_HEALTH_DATA; 2580 2581 /* Values for Health field above */ 2582 2583 #define ACPI_PHAT_ERRORS_FOUND 0 2584 #define ACPI_PHAT_NO_ERRORS 1 2585 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2586 #define ACPI_PHAT_ADVISORY 3 2587 2588 2589 /******************************************************************************* 2590 * 2591 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2592 * Version 1 2593 * 2594 ******************************************************************************/ 2595 2596 typedef struct acpi_table_pmtt 2597 { 2598 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2599 UINT32 MemoryDeviceCount; 2600 /* 2601 * Immediately followed by: 2602 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2603 */ 2604 2605 } ACPI_TABLE_PMTT; 2606 2607 2608 /* Common header for PMTT subtables that follow main table */ 2609 2610 typedef struct acpi_pmtt_header 2611 { 2612 UINT8 Type; 2613 UINT8 Reserved1; 2614 UINT16 Length; 2615 UINT16 Flags; 2616 UINT16 Reserved2; 2617 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 2618 /* 2619 * Immediately followed by: 2620 * UINT8 TypeSpecificData[] 2621 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2622 */ 2623 2624 } ACPI_PMTT_HEADER; 2625 2626 /* Values for Type field above */ 2627 2628 #define ACPI_PMTT_TYPE_SOCKET 0 2629 #define ACPI_PMTT_TYPE_CONTROLLER 1 2630 #define ACPI_PMTT_TYPE_DIMM 2 2631 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2632 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2633 2634 /* Values for Flags field above */ 2635 2636 #define ACPI_PMTT_TOP_LEVEL 0x0001 2637 #define ACPI_PMTT_PHYSICAL 0x0002 2638 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2639 2640 2641 /* 2642 * PMTT subtables, correspond to Type in acpi_pmtt_header 2643 */ 2644 2645 2646 /* 0: Socket Structure */ 2647 2648 typedef struct acpi_pmtt_socket 2649 { 2650 ACPI_PMTT_HEADER Header; 2651 UINT16 SocketId; 2652 UINT16 Reserved; 2653 2654 } ACPI_PMTT_SOCKET; 2655 /* 2656 * Immediately followed by: 2657 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2658 */ 2659 2660 2661 /* 1: Memory Controller subtable */ 2662 2663 typedef struct acpi_pmtt_controller 2664 { 2665 ACPI_PMTT_HEADER Header; 2666 UINT16 ControllerId; 2667 UINT16 Reserved; 2668 2669 } ACPI_PMTT_CONTROLLER; 2670 /* 2671 * Immediately followed by: 2672 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2673 */ 2674 2675 2676 /* 2: Physical Component Identifier (DIMM) */ 2677 2678 typedef struct acpi_pmtt_physical_component 2679 { 2680 ACPI_PMTT_HEADER Header; 2681 UINT32 BiosHandle; 2682 2683 } ACPI_PMTT_PHYSICAL_COMPONENT; 2684 2685 2686 /* 0xFF: Vendor Specific Data */ 2687 2688 typedef struct acpi_pmtt_vendor_specific 2689 { 2690 ACPI_PMTT_HEADER Header; 2691 UINT8 TypeUuid[16]; 2692 UINT8 Specific[]; 2693 /* 2694 * Immediately followed by: 2695 * UINT8 VendorSpecificData[]; 2696 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2697 */ 2698 2699 } ACPI_PMTT_VENDOR_SPECIFIC; 2700 2701 2702 /******************************************************************************* 2703 * 2704 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2705 * Version 1 2706 * 2707 ******************************************************************************/ 2708 2709 typedef struct acpi_table_pptt 2710 { 2711 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2712 2713 } ACPI_TABLE_PPTT; 2714 2715 /* Values for Type field above */ 2716 2717 enum AcpiPpttType 2718 { 2719 ACPI_PPTT_TYPE_PROCESSOR = 0, 2720 ACPI_PPTT_TYPE_CACHE = 1, 2721 ACPI_PPTT_TYPE_ID = 2, 2722 ACPI_PPTT_TYPE_RESERVED = 3 2723 }; 2724 2725 2726 /* 0: Processor Hierarchy Node Structure */ 2727 2728 typedef struct acpi_pptt_processor 2729 { 2730 ACPI_SUBTABLE_HEADER Header; 2731 UINT16 Reserved; 2732 UINT32 Flags; 2733 UINT32 Parent; 2734 UINT32 AcpiProcessorId; 2735 UINT32 NumberOfPrivResources; 2736 2737 } ACPI_PPTT_PROCESSOR; 2738 2739 /* Flags */ 2740 2741 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2742 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2743 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2744 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2745 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2746 2747 2748 /* 1: Cache Type Structure */ 2749 2750 typedef struct acpi_pptt_cache 2751 { 2752 ACPI_SUBTABLE_HEADER Header; 2753 UINT16 Reserved; 2754 UINT32 Flags; 2755 UINT32 NextLevelOfCache; 2756 UINT32 Size; 2757 UINT32 NumberOfSets; 2758 UINT8 Associativity; 2759 UINT8 Attributes; 2760 UINT16 LineSize; 2761 2762 } ACPI_PPTT_CACHE; 2763 2764 /* 1: Cache Type Structure for PPTT version 3 */ 2765 2766 typedef struct acpi_pptt_cache_v1 2767 { 2768 UINT32 CacheId; 2769 2770 } ACPI_PPTT_CACHE_V1; 2771 2772 2773 /* Flags */ 2774 2775 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2776 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2777 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2778 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2779 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2780 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2781 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2782 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2783 2784 /* Masks for Attributes */ 2785 2786 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2787 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2788 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2789 2790 /* Attributes describing cache */ 2791 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2792 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2793 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2794 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2795 2796 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2797 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2798 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2799 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2800 2801 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2802 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2803 2804 /* 2: ID Structure */ 2805 2806 typedef struct acpi_pptt_id 2807 { 2808 ACPI_SUBTABLE_HEADER Header; 2809 UINT16 Reserved; 2810 UINT32 VendorId; 2811 UINT64 Level1Id; 2812 UINT64 Level2Id; 2813 UINT16 MajorRev; 2814 UINT16 MinorRev; 2815 UINT16 SpinRev; 2816 2817 } ACPI_PPTT_ID; 2818 2819 2820 /******************************************************************************* 2821 * 2822 * PRMT - Platform Runtime Mechanism Table 2823 * Version 1 2824 * 2825 ******************************************************************************/ 2826 2827 typedef struct acpi_table_prmt 2828 { 2829 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2830 2831 } ACPI_TABLE_PRMT; 2832 2833 typedef struct acpi_table_prmt_header 2834 { 2835 UINT8 PlatformGuid[16]; 2836 UINT32 ModuleInfoOffset; 2837 UINT32 ModuleInfoCount; 2838 2839 } ACPI_TABLE_PRMT_HEADER; 2840 2841 typedef struct acpi_prmt_module_header 2842 { 2843 UINT16 Revision; 2844 UINT16 Length; 2845 2846 } ACPI_PRMT_MODULE_HEADER; 2847 2848 typedef struct acpi_prmt_module_info 2849 { 2850 UINT16 Revision; 2851 UINT16 Length; 2852 UINT8 ModuleGuid[16]; 2853 UINT16 MajorRev; 2854 UINT16 MinorRev; 2855 UINT16 HandlerInfoCount; 2856 UINT32 HandlerInfoOffset; 2857 UINT64 MmioListPointer; 2858 2859 } ACPI_PRMT_MODULE_INFO; 2860 2861 typedef struct acpi_prmt_handler_info 2862 { 2863 UINT16 Revision; 2864 UINT16 Length; 2865 UINT8 HandlerGuid[16]; 2866 UINT64 HandlerAddress; 2867 UINT64 StaticDataBufferAddress; 2868 UINT64 AcpiParamBufferAddress; 2869 2870 } ACPI_PRMT_HANDLER_INFO; 2871 2872 2873 /******************************************************************************* 2874 * 2875 * RASF - RAS Feature Table (ACPI 5.0) 2876 * Version 1 2877 * 2878 ******************************************************************************/ 2879 2880 typedef struct acpi_table_rasf 2881 { 2882 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2883 UINT8 ChannelId[12]; 2884 2885 } ACPI_TABLE_RASF; 2886 2887 /* RASF Platform Communication Channel Shared Memory Region */ 2888 2889 typedef struct acpi_rasf_shared_memory 2890 { 2891 UINT32 Signature; 2892 UINT16 Command; 2893 UINT16 Status; 2894 UINT16 Version; 2895 UINT8 Capabilities[16]; 2896 UINT8 SetCapabilities[16]; 2897 UINT16 NumParameterBlocks; 2898 UINT32 SetCapabilitiesStatus; 2899 2900 } ACPI_RASF_SHARED_MEMORY; 2901 2902 /* RASF Parameter Block Structure Header */ 2903 2904 typedef struct acpi_rasf_parameter_block 2905 { 2906 UINT16 Type; 2907 UINT16 Version; 2908 UINT16 Length; 2909 2910 } ACPI_RASF_PARAMETER_BLOCK; 2911 2912 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2913 2914 typedef struct acpi_rasf_patrol_scrub_parameter 2915 { 2916 ACPI_RASF_PARAMETER_BLOCK Header; 2917 UINT16 PatrolScrubCommand; 2918 UINT64 RequestedAddressRange[2]; 2919 UINT64 ActualAddressRange[2]; 2920 UINT16 Flags; 2921 UINT8 RequestedSpeed; 2922 2923 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2924 2925 /* Masks for Flags and Speed fields above */ 2926 2927 #define ACPI_RASF_SCRUBBER_RUNNING 1 2928 #define ACPI_RASF_SPEED (7<<1) 2929 #define ACPI_RASF_SPEED_SLOW (0<<1) 2930 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2931 #define ACPI_RASF_SPEED_FAST (7<<1) 2932 2933 /* Channel Commands */ 2934 2935 enum AcpiRasfCommands 2936 { 2937 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2938 }; 2939 2940 /* Platform RAS Capabilities */ 2941 2942 enum AcpiRasfCapabiliities 2943 { 2944 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2945 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2946 }; 2947 2948 /* Patrol Scrub Commands */ 2949 2950 enum AcpiRasfPatrolScrubCommands 2951 { 2952 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2953 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2954 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2955 }; 2956 2957 /* Channel Command flags */ 2958 2959 #define ACPI_RASF_GENERATE_SCI (1<<15) 2960 2961 /* Status values */ 2962 2963 enum AcpiRasfStatus 2964 { 2965 ACPI_RASF_SUCCESS = 0, 2966 ACPI_RASF_NOT_VALID = 1, 2967 ACPI_RASF_NOT_SUPPORTED = 2, 2968 ACPI_RASF_BUSY = 3, 2969 ACPI_RASF_FAILED = 4, 2970 ACPI_RASF_ABORTED = 5, 2971 ACPI_RASF_INVALID_DATA = 6 2972 }; 2973 2974 /* Status flags */ 2975 2976 #define ACPI_RASF_COMMAND_COMPLETE (1) 2977 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2978 #define ACPI_RASF_ERROR (1<<2) 2979 #define ACPI_RASF_STATUS (0x1F<<3) 2980 2981 2982 /******************************************************************************* 2983 * 2984 * RAS2 - RAS2 Feature Table (ACPI 6.5) 2985 * Version 1 2986 * 2987 * 2988 ******************************************************************************/ 2989 2990 typedef struct acpi_table_ras2 { 2991 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2992 UINT16 Reserved; 2993 UINT16 NumPccDescs; 2994 2995 } ACPI_TABLE_RAS2; 2996 2997 /* RAS2 Platform Communication Channel Descriptor */ 2998 2999 typedef struct acpi_ras2_pcc_desc { 3000 UINT8 ChannelId; 3001 UINT16 Reserved; 3002 UINT8 FeatureType; 3003 UINT32 Instance; 3004 3005 } ACPI_RAS2_PCC_DESC; 3006 3007 /* RAS2 Platform Communication Channel Shared Memory Region */ 3008 3009 typedef struct acpi_ras2_shared_memory { 3010 UINT32 Signature; 3011 UINT16 Command; 3012 UINT16 Status; 3013 UINT16 Version; 3014 UINT8 Features[16]; 3015 UINT8 SetCapabilities[16]; 3016 UINT16 NumParameterBlocks; 3017 UINT32 SetCapabilitiesStatus; 3018 3019 } ACPI_RAS2_SHARED_MEMORY; 3020 3021 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3022 3023 typedef struct acpi_ras2_parameter_block 3024 { 3025 UINT16 Type; 3026 UINT16 Version; 3027 UINT16 Length; 3028 3029 } ACPI_RAS2_PARAMETER_BLOCK; 3030 3031 /* RAS2 Parameter Block Structure for PATROL_SCRUB */ 3032 3033 typedef struct acpi_ras2_patrol_scrub_parameter { 3034 ACPI_RAS2_PARAMETER_BLOCK Header; 3035 UINT16 PatrolScrubCommand; 3036 UINT64 RequestedAddressRange[2]; 3037 UINT64 ActualAddressRange[2]; 3038 UINT32 Flags; 3039 UINT32 ScrubParamsOut; 3040 UINT32 ScrubParamsIn; 3041 3042 } ACPI_RAS2_PATROL_SCRUB_PARAMETER; 3043 3044 /* Masks for Flags field above */ 3045 3046 #define ACPI_RAS2_SCRUBBER_RUNNING 1 3047 3048 /* RAS2 Parameter Block Structure for LA2PA_TRANSLATION */ 3049 3050 typedef struct acpi_ras2_la2pa_translation_parameter { 3051 ACPI_RAS2_PARAMETER_BLOCK Header; 3052 UINT16 AddrTranslationCommand; 3053 UINT64 SubInstId; 3054 UINT64 LogicalAddress; 3055 UINT64 PhysicalAddress; 3056 UINT32 Status; 3057 3058 } ACPI_RAS2_LA2PA_TRANSLATION_PARAM; 3059 3060 /* Channel Commands */ 3061 3062 enum AcpiRas2Commands 3063 { 3064 ACPI_RAS2_EXECUTE_RAS2_COMMAND = 1 3065 }; 3066 3067 /* Platform RAS2 Features */ 3068 3069 enum AcpiRas2Features 3070 { 3071 ACPI_RAS2_PATROL_SCRUB_SUPPORTED = 0, 3072 ACPI_RAS2_LA2PA_TRANSLATION = 1 3073 }; 3074 3075 /* RAS2 Patrol Scrub Commands */ 3076 3077 enum AcpiRas2PatrolScrubCommands 3078 { 3079 ACPI_RAS2_GET_PATROL_PARAMETERS = 1, 3080 ACPI_RAS2_START_PATROL_SCRUBBER = 2, 3081 ACPI_RAS2_STOP_PATROL_SCRUBBER = 3 3082 }; 3083 3084 /* RAS2 LA2PA Translation Commands */ 3085 3086 enum AcpiRas2La2PaTranslationCommands 3087 { 3088 ACPI_RAS2_GET_LA2PA_TRANSLATION = 1, 3089 }; 3090 3091 /* RAS2 LA2PA Translation Status values */ 3092 3093 enum AcpiRas2La2PaTranslationStatus 3094 { 3095 ACPI_RAS2_LA2PA_TRANSLATION_SUCCESS = 0, 3096 ACPI_RAS2_LA2PA_TRANSLATION_FAIL = 1, 3097 }; 3098 3099 /* Channel Command flags */ 3100 3101 #define ACPI_RAS2_GENERATE_SCI (1<<15) 3102 3103 /* Status values */ 3104 3105 enum AcpiRas2Status 3106 { 3107 ACPI_RAS2_SUCCESS = 0, 3108 ACPI_RAS2_NOT_VALID = 1, 3109 ACPI_RAS2_NOT_SUPPORTED = 2, 3110 ACPI_RAS2_BUSY = 3, 3111 ACPI_RAS2_FAILED = 4, 3112 ACPI_RAS2_ABORTED = 5, 3113 ACPI_RAS2_INVALID_DATA = 6 3114 }; 3115 3116 /* Status flags */ 3117 3118 #define ACPI_RAS2_COMMAND_COMPLETE (1) 3119 #define ACPI_RAS2_SCI_DOORBELL (1<<1) 3120 #define ACPI_RAS2_ERROR (1<<2) 3121 #define ACPI_RAS2_STATUS (0x1F<<3) 3122 3123 3124 /******************************************************************************* 3125 * 3126 * RGRT - Regulatory Graphics Resource Table 3127 * Version 1 3128 * 3129 * Conforms to "ACPI RGRT" available at: 3130 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 3131 * 3132 ******************************************************************************/ 3133 3134 typedef struct acpi_table_rgrt 3135 { 3136 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3137 UINT16 Version; 3138 UINT8 ImageType; 3139 UINT8 Reserved; 3140 UINT8 Image[]; 3141 3142 } ACPI_TABLE_RGRT; 3143 3144 /* ImageType values */ 3145 3146 enum AcpiRgrtImageType 3147 { 3148 ACPI_RGRT_TYPE_RESERVED0 = 0, 3149 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 3150 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3151 }; 3152 3153 3154 /******************************************************************************* 3155 * 3156 * RHCT - RISC-V Hart Capabilities Table 3157 * Version 1 3158 * 3159 ******************************************************************************/ 3160 3161 typedef struct acpi_table_rhct { 3162 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3163 UINT32 Flags; /* RHCT flags */ 3164 UINT64 TimeBaseFreq; 3165 UINT32 NodeCount; 3166 UINT32 NodeOffset; 3167 } ACPI_TABLE_RHCT; 3168 3169 /* RHCT Flags */ 3170 3171 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 3172 /* 3173 * RHCT subtables 3174 */ 3175 typedef struct acpi_rhct_node_header { 3176 UINT16 Type; 3177 UINT16 Length; 3178 UINT16 Revision; 3179 } ACPI_RHCT_NODE_HEADER; 3180 3181 /* Values for RHCT subtable Type above */ 3182 3183 enum acpi_rhct_node_type { 3184 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 3185 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 3186 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 3187 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 3188 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 3189 }; 3190 3191 /* 3192 * RHCT node specific subtables 3193 */ 3194 3195 /* ISA string node structure */ 3196 typedef struct acpi_rhct_isa_string { 3197 UINT16 IsaLength; 3198 char Isa[]; 3199 } ACPI_RHCT_ISA_STRING; 3200 3201 typedef struct acpi_rhct_cmo_node { 3202 UINT8 Reserved; /* Must be zero */ 3203 UINT8 CbomSize; /* CBOM size in powerof 2 */ 3204 UINT8 CbopSize; /* CBOP size in powerof 2 */ 3205 UINT8 CbozSize; /* CBOZ size in powerof 2 */ 3206 } ACPI_RHCT_CMO_NODE; 3207 3208 typedef struct acpi_rhct_mmu_node { 3209 UINT8 Reserved; /* Must be zero */ 3210 UINT8 MmuType; /* Virtual Address Scheme */ 3211 } ACPI_RHCT_MMU_NODE; 3212 3213 enum acpi_rhct_mmu_type { 3214 ACPI_RHCT_MMU_TYPE_SV39 = 0, 3215 ACPI_RHCT_MMU_TYPE_SV48 = 1, 3216 ACPI_RHCT_MMU_TYPE_SV57 = 2 3217 }; 3218 3219 /* Hart Info node structure */ 3220 typedef struct acpi_rhct_hart_info { 3221 UINT16 NumOffsets; 3222 UINT32 Uid; /* ACPI processor UID */ 3223 } ACPI_RHCT_HART_INFO; 3224 3225 /******************************************************************************* 3226 * 3227 * SBST - Smart Battery Specification Table 3228 * Version 1 3229 * 3230 ******************************************************************************/ 3231 3232 typedef struct acpi_table_sbst 3233 { 3234 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3235 UINT32 WarningLevel; 3236 UINT32 LowLevel; 3237 UINT32 CriticalLevel; 3238 3239 } ACPI_TABLE_SBST; 3240 3241 3242 /******************************************************************************* 3243 * 3244 * SDEI - Software Delegated Exception Interface Descriptor Table 3245 * 3246 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 3247 * May 8th, 2017. Copyright 2017 ARM Ltd. 3248 * 3249 ******************************************************************************/ 3250 3251 typedef struct acpi_table_sdei 3252 { 3253 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3254 3255 } ACPI_TABLE_SDEI; 3256 3257 3258 /******************************************************************************* 3259 * 3260 * SDEV - Secure Devices Table (ACPI 6.2) 3261 * Version 1 3262 * 3263 ******************************************************************************/ 3264 3265 typedef struct acpi_table_sdev 3266 { 3267 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3268 3269 } ACPI_TABLE_SDEV; 3270 3271 3272 typedef struct acpi_sdev_header 3273 { 3274 UINT8 Type; 3275 UINT8 Flags; 3276 UINT16 Length; 3277 3278 } ACPI_SDEV_HEADER; 3279 3280 3281 /* Values for subtable type above */ 3282 3283 enum AcpiSdevType 3284 { 3285 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 3286 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 3287 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 3288 }; 3289 3290 /* Values for flags above */ 3291 3292 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 3293 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 3294 3295 /* 3296 * SDEV subtables 3297 */ 3298 3299 /* 0: Namespace Device Based Secure Device Structure */ 3300 3301 typedef struct acpi_sdev_namespace 3302 { 3303 ACPI_SDEV_HEADER Header; 3304 UINT16 DeviceIdOffset; 3305 UINT16 DeviceIdLength; 3306 UINT16 VendorDataOffset; 3307 UINT16 VendorDataLength; 3308 3309 } ACPI_SDEV_NAMESPACE; 3310 3311 typedef struct acpi_sdev_secure_component 3312 { 3313 UINT16 SecureComponentOffset; 3314 UINT16 SecureComponentLength; 3315 3316 } ACPI_SDEV_SECURE_COMPONENT; 3317 3318 3319 /* 3320 * SDEV sub-subtables ("Components") for above 3321 */ 3322 typedef struct acpi_sdev_component 3323 { 3324 ACPI_SDEV_HEADER Header; 3325 3326 } ACPI_SDEV_COMPONENT; 3327 3328 3329 /* Values for sub-subtable type above */ 3330 3331 enum AcpiSacType 3332 { 3333 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 3334 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 3335 }; 3336 3337 typedef struct acpi_sdev_id_component 3338 { 3339 ACPI_SDEV_HEADER Header; 3340 UINT16 HardwareIdOffset; 3341 UINT16 HardwareIdLength; 3342 UINT16 SubsystemIdOffset; 3343 UINT16 SubsystemIdLength; 3344 UINT16 HardwareRevision; 3345 UINT8 HardwareRevPresent; 3346 UINT8 ClassCodePresent; 3347 UINT8 PciBaseClass; 3348 UINT8 PciSubClass; 3349 UINT8 PciProgrammingXface; 3350 3351 } ACPI_SDEV_ID_COMPONENT; 3352 3353 typedef struct acpi_sdev_mem_component 3354 { 3355 ACPI_SDEV_HEADER Header; 3356 UINT32 Reserved; 3357 UINT64 MemoryBaseAddress; 3358 UINT64 MemoryLength; 3359 3360 } ACPI_SDEV_MEM_COMPONENT; 3361 3362 3363 /* 1: PCIe Endpoint Device Based Device Structure */ 3364 3365 typedef struct acpi_sdev_pcie 3366 { 3367 ACPI_SDEV_HEADER Header; 3368 UINT16 Segment; 3369 UINT16 StartBus; 3370 UINT16 PathOffset; 3371 UINT16 PathLength; 3372 UINT16 VendorDataOffset; 3373 UINT16 VendorDataLength; 3374 3375 } ACPI_SDEV_PCIE; 3376 3377 /* 1a: PCIe Endpoint path entry */ 3378 3379 typedef struct acpi_sdev_pcie_path 3380 { 3381 UINT8 Device; 3382 UINT8 Function; 3383 3384 } ACPI_SDEV_PCIE_PATH; 3385 3386 3387 /******************************************************************************* 3388 * 3389 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 3390 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3391 * Trust Domain Extensions (Intel TDX)". 3392 * Version 1 3393 * 3394 ******************************************************************************/ 3395 3396 typedef struct acpi_table_svkl 3397 { 3398 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3399 UINT32 Count; 3400 3401 } ACPI_TABLE_SVKL; 3402 3403 typedef struct acpi_svkl_key 3404 { 3405 UINT16 Type; 3406 UINT16 Format; 3407 UINT32 Size; 3408 UINT64 Address; 3409 3410 } ACPI_SVKL_KEY; 3411 3412 enum acpi_svkl_type 3413 { 3414 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 3415 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 3416 }; 3417 3418 enum acpi_svkl_format 3419 { 3420 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3421 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3422 }; 3423 3424 3425 /******************************************************************************* 3426 * 3427 * TDEL - TD-Event Log 3428 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3429 * Trust Domain Extensions (Intel TDX)". 3430 * September 2020 3431 * 3432 ******************************************************************************/ 3433 3434 typedef struct acpi_table_tdel 3435 { 3436 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 3437 UINT32 Reserved; 3438 UINT64 LogAreaMinimumLength; 3439 UINT64 LogAreaStartAddress; 3440 3441 } ACPI_TABLE_TDEL; 3442 3443 /* Reset to default packing */ 3444 3445 #pragma pack() 3446 3447 #endif /* __ACTBL2_H__ */ 3448
