1 /* 2 * Copyright (c) 2022 Intel Corporation 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef __COUNTER_ACE_V1X_ART_REGS__ 8 #define __COUNTER_ACE_V1X_ART_REGS__ 9 10 #if CONFIG_ACE_V1X_ART_COUNTER 11 12 #define ACE_ART_COUNTER_ID DT_NODELABEL(ace_art_counter) 13 #define ACE_TIMESTAMP_ID DT_NODELABEL(ace_timestamp) 14 15 #define ACE_TSCTRL (DT_REG_ADDR(ACE_TIMESTAMP_ID)) 16 17 #define ACE_ARTCS (DT_REG_ADDR(ACE_ART_COUNTER_ID)) 18 #define ACE_ARTCS_LO ACE_ARTCS 19 #define ACE_ARTCS_HI (ACE_ARTCS_LO + 0x04) 20 21 #define ACE_TSCTRL_CDMAS_MASK GENMASK(4, 0) 22 #define ACE_TSCTRL_ODTS_MASK BIT(5) 23 #define ACE_TSCTRL_LWCS_MASK BIT(6) 24 #define ACE_TSCTRL_HHTSE_MASK BIT(7) 25 #define ACE_TSCTRL_CLNKS_MASK GENMASK(11, 10) 26 #define ACE_TSCTRL_DMATS_MASK GENMASK(13, 12) 27 #define ACE_TSCTRL_IONTE_MASK BIT(30) 28 #define ACE_TSCTRL_NTK_MASK BIT(31) 29 30 #endif 31 32 #endif /*__COUNTER_ACE_V1X_ART_REGS__*/ 33
