/*
 * Copyright (c) 2018-2022 ARM Limited
 * Copyright (c) 2021 Cypress Semiconductor Corp. All rights reserved.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include "region_defs.h"

LR_CODE NS_CODE_START {
    ER_CODE NS_CODE_START NS_CODE_SIZE {
        *.o (RESET +First)
        .ANY (+RO)
    }

#ifdef RAM_VECTORS_SUPPORT
    ER_RAM_VECTORS NS_DATA_START ALIGN 256 UNINIT {
        * (RESET_RAM, +FIRST)
    }
#endif

    /* Executable code allocated in RAM */
    TFM_RAM_CODE +0 ALIGN 32 {
        * (.ramfunc)
    }

    /* Use up the rest space of the NS_DATA area */
    ER_DATA +0 {
        .ANY (+ZI +RW)
    }

    /* STACK */
    ARM_LIB_STACK +0 ALIGN 32 EMPTY NS_STACK_SIZE {
    }

    ARM_LIB_HEAP +0 ALIGN 8 EMPTY NS_HEAP_SIZE {
    }

#if defined(PSA_API_TEST_ENABLED)
    PSA_API_TEST_NVMEM PSA_API_TEST_NVMEM_START EMPTY PSA_API_TEST_NVMEM_SIZE {
    }
#endif

#if defined (NS_DATA_SHARED_START)
    /* Shared memory data */
    TFM_SHARED_MEM NS_DATA_SHARED_START EMPTY NS_DATA_SHARED_SIZE {
    }
#endif

    /* This empty, zero long execution region is here to mark the limit address
     * of the last execution region that is allocated in SRAM.
     */
    SRAM_WATERMARK +0 EMPTY 0x0 {
    }

    /* Make sure that the sections allocated in the SRAM does not exceed the
     * size of the SRAM available.
     */
    ScatterAssert(ImageLimit(SRAM_WATERMARK) <= NS_DATA_START + NS_DATA_SIZE)
}