/*
 * Copyright (c) 2022 Arm Limited. All rights reserved.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include "region_defs.h"

LR_CODE BL2_CODE_START {
    ER_CODE BL2_CODE_START BL2_CODE_SIZE {
        *.o (RESET +First)
        * (+RO)
    }

#ifdef CODE_SHARING
    /* The code sharing between bootloader and runtime firmware requires to
     * share the global variables.
     */
    TFM_SHARED_SYMBOLS S_DATA_START ALIGN 32 SHARED_SYMBOL_AREA_SIZE {
       *platform.* (+RW)
       *(.rodata.memset_func)
    }
#endif

    TFM_SHARED_DATA BOOT_TFM_SHARED_DATA_BASE ALIGN 32 EMPTY BOOT_TFM_SHARED_DATA_SIZE {
    }

/* If the layout is designed so that the shared data is at the start of the bl2
 * data section, place the data directly afterwards. Else, place it where the
 * macro is designed to go
 */
#if BL2_DATA_START == BOOT_TFM_SHARED_DATA_BASE
    ER_DATA +0 {
#else
    ER_DATA BL2_DATA_START {
#endif
        * (+ZI +RW)
    }

#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
    /* MSP */
    ARM_LIB_STACK +0 ALIGN 32 EMPTY BL2_MSP_STACK_SIZE - 0x8 {
    }

    STACKSEAL +0 EMPTY 0x8 {
    }
#else
    /* MSP */
    ARM_LIB_STACK +0 ALIGN 32 EMPTY BL2_MSP_STACK_SIZE {
    }

#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */

    ARM_LIB_HEAP +0 ALIGN 8 EMPTY BL2_HEAP_SIZE {
    }

    /* This empty, zero long execution region is here to mark the limit address
     * of the last execution region that is allocated in SRAM.
     */
    SRAM_WATERMARK +0 EMPTY 0x0 {
    }

    /* Make sure that the sections allocated in the SRAM does not exceed the
     * size of the SRAM available.
     */
    ScatterAssert(ImageLimit(SRAM_WATERMARK) <= BL2_DATA_START + BL2_DATA_SIZE)
}