/* Auto-generated config file hpl_sercom_config.h */ #ifndef HPL_SERCOM_CONFIG_H #define HPL_SERCOM_CONFIG_H // <<< Use Configuration Wizard in Context Menu >>> #include #ifndef CONF_SERCOM_0_USART_ENABLE #define CONF_SERCOM_0_USART_ENABLE 1 #endif // Basic Configuration // Receive buffer enable // Enable input buffer in SERCOM module // usart_rx_enable #ifndef CONF_SERCOM_0_USART_RXEN #define CONF_SERCOM_0_USART_RXEN 1 #endif // Transmitt buffer enable // Enable output buffer in SERCOM module // usart_tx_enable #ifndef CONF_SERCOM_0_USART_TXEN #define CONF_SERCOM_0_USART_TXEN 1 #endif // Frame parity // <0x0=>No parity // <0x1=>Even parity // <0x2=>Odd parity // Parity bit mode for USART frame // usart_parity #ifndef CONF_SERCOM_0_USART_PARITY #define CONF_SERCOM_0_USART_PARITY 0x0 #endif // Character Size // <0x0=>8 bits // <0x1=>9 bits // <0x5=>5 bits // <0x6=>6 bits // <0x7=>7 bits // Data character size in USART frame // usart_character_size #ifndef CONF_SERCOM_0_USART_CHSIZE #define CONF_SERCOM_0_USART_CHSIZE 0x0 #endif // Stop Bit // <0=>One stop bit // <1=>Two stop bits // Number of stop bits in USART frame // usart_stop_bit #ifndef CONF_SERCOM_0_USART_SBMODE #define CONF_SERCOM_0_USART_SBMODE 0 #endif // Baud rate <1-3000000> // USART baud rate setting // usart_baud_rate #ifndef CONF_SERCOM_0_USART_BAUD #define CONF_SERCOM_0_USART_BAUD 921600 #endif // // Advanced configuration // usart_advanced #ifndef CONF_SERCOM_0_USART_ADVANCED_CONFIG #define CONF_SERCOM_0_USART_ADVANCED_CONFIG 0 #endif // Run in stand-by // Keep the module running in standby sleep mode // usart_arch_runstdby #ifndef CONF_SERCOM_0_USART_RUNSTDBY #define CONF_SERCOM_0_USART_RUNSTDBY 0 #endif // Immediate Buffer Overflow Notification // Controls when the BUFOVF status bit is asserted // usart_arch_ibon #ifndef CONF_SERCOM_0_USART_IBON #define CONF_SERCOM_0_USART_IBON 0 #endif // Start of Frame Detection Enable // Will wake the device from any sleep mode if usart_init and usart_enable was run priort to going to sleep. (receive buffer must be enabled) // usart_arch_sfde #ifndef CONF_SERCOM_0_USART_SFDE #define CONF_SERCOM_0_USART_SFDE 0 #endif // Collision Detection Enable // Collision detection enable // usart_arch_cloden #ifndef CONF_SERCOM_0_USART_CLODEN #define CONF_SERCOM_0_USART_CLODEN 0 #endif // Operating Mode // <0x0=>USART with external clock // <0x1=>USART with internal clock // Drive the shift register by an internal clock generated by the baud rate generator or an external clock supplied on the XCK pin. // usart_arch_clock_mode #ifndef CONF_SERCOM_0_USART_MODE #define CONF_SERCOM_0_USART_MODE 0x1 #endif // Sample Rate // <0x0=>16x arithmetic // <0x1=>16x fractional // <0x2=>8x arithmetic // <0x3=>8x fractional // <0x3=>3x // How many over-sampling bits used when samling data state // usart_arch_sampr #ifndef CONF_SERCOM_0_USART_SAMPR #define CONF_SERCOM_0_USART_SAMPR 0x0 #endif // Sample Adjustment // <0x0=>7-8-9 (3-4-5 8-bit over-sampling) // <0x1=>9-10-11 (4-5-6 8-bit over-sampling) // <0x2=>11-12-13 (5-6-7 8-bit over-sampling) // <0x3=>13-14-15 (6-7-8 8-bit over-sampling) // Adjust which samples to use for data sampling in asynchronous mode // usart_arch_sampa #ifndef CONF_SERCOM_0_USART_SAMPA #define CONF_SERCOM_0_USART_SAMPA 0x0 #endif // Fractional Part <0-7> // Fractional part of the baud rate if baud rate generator is in fractional mode // usart_arch_fractional #ifndef CONF_SERCOM_0_USART_FRACTIONAL #define CONF_SERCOM_0_USART_FRACTIONAL 0x0 #endif // Data Order // <0=>MSB is transmitted first // <1=>LSB is transmitted first // Data order of the data bits in the frame // usart_arch_dord #ifndef CONF_SERCOM_0_USART_DORD #define CONF_SERCOM_0_USART_DORD 1 #endif // Does not do anything in UART mode #define CONF_SERCOM_0_USART_CPOL 0 // Encoding Format // <0=>No encoding // <1=>IrDA encoded // usart_arch_enc #ifndef CONF_SERCOM_0_USART_ENC #define CONF_SERCOM_0_USART_ENC 0 #endif // Debug Stop Mode // Behavior of the baud-rate generator when CPU is halted by external debugger. // <0=>Keep running // <1=>Halt // usart_arch_dbgstop #ifndef CONF_SERCOM_0_USART_DEBUG_STOP_MODE #define CONF_SERCOM_0_USART_DEBUG_STOP_MODE 0 #endif // #ifndef CONF_SERCOM_0_USART_CMODE #define CONF_SERCOM_0_USART_CMODE 0 #endif #ifndef CONF_SERCOM_0_USART_RXPO #define CONF_SERCOM_0_USART_RXPO 1 /* RX is on PIN_PA23 */ #endif #ifndef CONF_SERCOM_0_USART_TXPO #define CONF_SERCOM_0_USART_TXPO 0 /* TX is on PIN_PA22 */ #endif /* Set correct parity settings in register interface based on PARITY setting */ #if CONF_SERCOM_0_USART_PARITY == 0 #define CONF_SERCOM_0_USART_PMODE 0 #define CONF_SERCOM_0_USART_FORM 0 #else #define CONF_SERCOM_0_USART_PMODE CONF_SERCOM_0_USART_PARITY - 1 #define CONF_SERCOM_0_USART_FORM 1 #endif // Calculate BAUD register value in UART mode #if CONF_SERCOM_0_USART_SAMPR == 0 #ifndef CONF_SERCOM_0_USART_BAUD_RATE #define CONF_SERCOM_0_USART_BAUD_RATE \ 65536 - ((65536 * 16.0f * CONF_SERCOM_0_USART_BAUD) / CONF_GCLK_SERCOM0_CORE_FREQUENCY) #endif #ifndef CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH #define CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH 0 #endif #elif CONF_SERCOM_0_USART_SAMPR == 1 #ifndef CONF_SERCOM_0_USART_BAUD_RATE #define CONF_SERCOM_0_USART_BAUD_RATE \ ((CONF_GCLK_SERCOM0_CORE_FREQUENCY) / (CONF_SERCOM_0_USART_BAUD * 16)) - (CONF_SERCOM_0_USART_FRACTIONAL / 8) #endif #ifndef CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH #define CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH 0 #endif #elif CONF_SERCOM_0_USART_SAMPR == 2 #ifndef CONF_SERCOM_0_USART_BAUD_RATE #define CONF_SERCOM_0_USART_BAUD_RATE \ 65536 - ((65536 * 8.0f * CONF_SERCOM_0_USART_BAUD) / CONF_GCLK_SERCOM0_CORE_FREQUENCY) #endif #ifndef CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH #define CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH 0 #endif #elif CONF_SERCOM_0_USART_SAMPR == 3 #ifndef CONF_SERCOM_0_USART_BAUD_RATE #define CONF_SERCOM_0_USART_BAUD_RATE \ ((CONF_GCLK_SERCOM0_CORE_FREQUENCY) / (CONF_SERCOM_0_USART_BAUD * 8)) - (CONF_SERCOM_0_USART_FRACTIONAL / 8) #endif #ifndef CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH #define CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH 0 #endif #elif CONF_SERCOM_0_USART_SAMPR == 4 #ifndef CONF_SERCOM_0_USART_BAUD_RATE #define CONF_SERCOM_0_USART_BAUD_RATE \ 65536 - ((65536 * 3.0f * CONF_SERCOM_0_USART_BAUD) / CONF_GCLK_SERCOM0_CORE_FREQUENCY) #endif #ifndef CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH #define CONF_SERCOM_0_USART_RECEIVE_PULSE_LENGTH 0 #endif #endif #include // Enable configuration of module #ifndef CONF_SERCOM_4_SPI_ENABLE #define CONF_SERCOM_4_SPI_ENABLE 1 #endif // Set module in SPI Master mode #ifndef CONF_SERCOM_4_SPI_MODE #define CONF_SERCOM_4_SPI_MODE 0x03 #endif // Basic Configuration // Receive buffer enable // Enable receive buffer to receive data from slave (RXEN) // spi_master_rx_enable #ifndef CONF_SERCOM_4_SPI_RXEN #define CONF_SERCOM_4_SPI_RXEN 0x1 #endif // Character Size // Bit size for all characters sent over the SPI bus (CHSIZE) // <0x0=>8 bits // <0x1=>9 bits // spi_master_character_size #ifndef CONF_SERCOM_4_SPI_CHSIZE #define CONF_SERCOM_4_SPI_CHSIZE 0x0 #endif // Baud rate <1-12000000> // The SPI data transfer rate // spi_master_baud_rate #ifndef CONF_SERCOM_4_SPI_BAUD #define CONF_SERCOM_4_SPI_BAUD 2000000 #endif // // Advanced Configuration // spi_master_advanced #ifndef CONF_SERCOM_4_SPI_ADVANCED #define CONF_SERCOM_4_SPI_ADVANCED 1 #endif // Dummy byte <0x00-0x1ff> // spi_master_dummybyte // Dummy byte used when reading data from the slave without sending any data #ifndef CONF_SERCOM_4_SPI_DUMMYBYTE #define CONF_SERCOM_4_SPI_DUMMYBYTE 0x1ff #endif // Data Order // <0=>MSB first // <1=>LSB first // I least significant or most significant bit is shifted out first (DORD) // spi_master_arch_dord #ifndef CONF_SERCOM_4_SPI_DORD #define CONF_SERCOM_4_SPI_DORD 0x0 #endif // Clock Polarity // <0=>SCK is low when idle // <1=>SCK is high when idle // Determines if the leading edge is rising or falling with a corresponding opposite edge at the trailing edge. (CPOL) // spi_master_arch_cpol #ifndef CONF_SERCOM_4_SPI_CPOL #define CONF_SERCOM_4_SPI_CPOL 0x0 #endif // Clock Phase // <0x0=>Sample input on leading edge // <0x1=>Sample input on trailing edge // Determines if input data is sampled on leading or trailing SCK edge. (CPHA) // spi_master_arch_cpha #ifndef CONF_SERCOM_4_SPI_CPHA #define CONF_SERCOM_4_SPI_CPHA 0x0 #endif // Immediate Buffer Overflow Notification // Controls when OVF is asserted (IBON) // <0x0=>In data stream // <0x1=>On buffer overflow // spi_master_arch_ibon #ifndef CONF_SERCOM_4_SPI_IBON #define CONF_SERCOM_4_SPI_IBON 0x0 #endif // Run in stand-by // Module stays active in stand-by sleep mode. (RUNSTDBY) // spi_master_arch_runstdby #ifndef CONF_SERCOM_4_SPI_RUNSTDBY #define CONF_SERCOM_4_SPI_RUNSTDBY 0x0 #endif // Debug Stop Mode // Behavior of the baud-rate generator when CPU is halted by external debugger. (DBGSTOP) // <0=>Keep running // <1=>Halt // spi_master_arch_dbgstop #ifndef CONF_SERCOM_4_SPI_DBGSTOP #define CONF_SERCOM_4_SPI_DBGSTOP 0 #endif // // Address mode disabled in master mode #ifndef CONF_SERCOM_4_SPI_AMODE_EN #define CONF_SERCOM_4_SPI_AMODE_EN 0 #endif #ifndef CONF_SERCOM_4_SPI_AMODE #define CONF_SERCOM_4_SPI_AMODE 0 #endif #ifndef CONF_SERCOM_4_SPI_ADDR #define CONF_SERCOM_4_SPI_ADDR 0 #endif #ifndef CONF_SERCOM_4_SPI_ADDRMASK #define CONF_SERCOM_4_SPI_ADDRMASK 0 #endif #ifndef CONF_SERCOM_4_SPI_SSDE #define CONF_SERCOM_4_SPI_SSDE 0 #endif #ifndef CONF_SERCOM_4_SPI_MSSEN #define CONF_SERCOM_4_SPI_MSSEN 0x0 #endif #ifndef CONF_SERCOM_4_SPI_PLOADEN #define CONF_SERCOM_4_SPI_PLOADEN 0 #endif // Receive Data Pinout // <0x0=>PAD[0] // <0x1=>PAD[1] // <0x2=>PAD[2] // <0x3=>PAD[3] // spi_master_rxpo #ifndef CONF_SERCOM_4_SPI_RXPO #define CONF_SERCOM_4_SPI_RXPO 0 #endif // Transmit Data Pinout // <0x0=>PAD[0,1]_DO_SCK // <0x1=>PAD[2,3]_DO_SCK // <0x2=>PAD[3,1]_DO_SCK // <0x3=>PAD[0,3]_DO_SCK // spi_master_txpo #ifndef CONF_SERCOM_4_SPI_TXPO #define CONF_SERCOM_4_SPI_TXPO 1 #endif // Calculate baud register value from requested baudrate value #ifndef CONF_SERCOM_4_SPI_BAUD_RATE #define CONF_SERCOM_4_SPI_BAUD_RATE ((float)CONF_GCLK_SERCOM4_CORE_FREQUENCY / (float)(2 * CONF_SERCOM_4_SPI_BAUD)) - 1 #endif #include #ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER #define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2) #endif #ifndef CONF_SERCOM_1_I2CM_ENABLE #define CONF_SERCOM_1_I2CM_ENABLE 1 #endif // Basic // I2C Bus clock speed (Hz) <1-400000> // I2C Bus clock (SCL) speed measured in Hz // i2c_master_baud_rate #ifndef CONF_SERCOM_1_I2CM_BAUD #define CONF_SERCOM_1_I2CM_BAUD 100000 #endif // // Advanced // i2c_master_advanced #ifndef CONF_SERCOM_1_I2CM_ADVANCED_CONFIG #define CONF_SERCOM_1_I2CM_ADVANCED_CONFIG 0 #endif // TRise (ns) <0-300> // Determined by the bus impedance, check electric characteristics in the datasheet // Standard Fast Mode: typical 215ns, max 300ns // Fast Mode +: typical 60ns, max 100ns // High Speed Mode: typical 20ns, max 40ns // i2c_master_arch_trise #ifndef CONF_SERCOM_1_I2CM_TRISE #define CONF_SERCOM_1_I2CM_TRISE 215 #endif // Master SCL Low Extended Time-Out (MEXTTOEN) // This enables the master SCL low extend time-out // i2c_master_arch_mexttoen #ifndef CONF_SERCOM_1_I2CM_MEXTTOEN #define CONF_SERCOM_1_I2CM_MEXTTOEN 0 #endif // Slave SCL Low Extend Time-Out (SEXTTOEN) // Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine // i2c_master_arch_sexttoen #ifndef CONF_SERCOM_1_I2CM_SEXTTOEN #define CONF_SERCOM_1_I2CM_SEXTTOEN 0 #endif // SCL Low Time-Out (LOWTOUT) // Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold // i2c_master_arch_lowtout #ifndef CONF_SERCOM_1_I2CM_LOWTOUT #define CONF_SERCOM_1_I2CM_LOWTOUT 0 #endif // Inactive Time-Out (INACTOUT) // <0x0=>Disabled // <0x1=>5-6 SCL cycle time-out(50-60us) // <0x2=>10-11 SCL cycle time-out(100-110us) // <0x3=>20-21 SCL cycle time-out(200-210us) // Defines if inactivity time-out should be enabled, and how long the time-out should be // i2c_master_arch_inactout #ifndef CONF_SERCOM_1_I2CM_INACTOUT #define CONF_SERCOM_1_I2CM_INACTOUT 0x0 #endif // SDA Hold Time (SDAHOLD) // <0=>Disabled // <1=>50-100ns hold time // <2=>300-600ns hold time // <3=>400-800ns hold time // Defines the SDA hold time with respect to the negative edge of SCL // i2c_master_arch_sdahold #ifndef CONF_SERCOM_1_I2CM_SDAHOLD #define CONF_SERCOM_1_I2CM_SDAHOLD 0x2 #endif // Run in stand-by // Determine if the module shall run in standby sleep mode // i2c_master_arch_runstdby #ifndef CONF_SERCOM_1_I2CM_RUNSTDBY #define CONF_SERCOM_1_I2CM_RUNSTDBY 0 #endif // Debug Stop Mode // Behavior of the baud-rate generator when CPU is halted by external debugger. // <0=>Keep running // <1=>Halt // i2c_master_arch_dbgstop #ifndef CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE #define CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE 0 #endif // #ifndef CONF_SERCOM_1_I2CM_SPEED #define CONF_SERCOM_1_I2CM_SPEED 0x00 // Speed: Standard/Fast mode #endif #if CONF_SERCOM_1_I2CM_TRISE < 215 || CONF_SERCOM_1_I2CM_TRISE > 300 #warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns #undef CONF_SERCOM_1_I2CM_TRISE #define CONF_SERCOM_1_I2CM_TRISE 215U #endif // gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise) // BAUD + BAUDLOW = -------------------------------------------------------------------- // i2c_scl_freq // BAUD: register value low [7:0] // BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW #define CONF_SERCOM_1_I2CM_BAUD_BAUDLOW \ (((CONF_GCLK_SERCOM1_CORE_FREQUENCY - (CONF_SERCOM_1_I2CM_BAUD * 10U) \ - (CONF_SERCOM_1_I2CM_TRISE * (CONF_SERCOM_1_I2CM_BAUD / 100U) * (CONF_GCLK_SERCOM1_CORE_FREQUENCY / 10000U) \ / 1000U)) \ * 10U \ + 5U) \ / (CONF_SERCOM_1_I2CM_BAUD * 10U)) #ifndef CONF_SERCOM_1_I2CM_BAUD_RATE #if CONF_SERCOM_1_I2CM_BAUD_BAUDLOW > (0xFF * 2) #warning Requested I2C baudrate too low, please check #define CONF_SERCOM_1_I2CM_BAUD_RATE 0xFF #elif CONF_SERCOM_1_I2CM_BAUD_BAUDLOW <= 1 #warning Requested I2C baudrate too high, please check #define CONF_SERCOM_1_I2CM_BAUD_RATE 1 #else #define CONF_SERCOM_1_I2CM_BAUD_RATE \ ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW & 0x1) \ ? (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \ : (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2)) #endif #endif // <<< end of configuration section >>> #endif // HPL_SERCOM_CONFIG_H