/*
 * Copyright 1997-2016 Freescale Semiconductor, Inc.
 * Copyright 2016-2024 NXP
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/*!
 * @file S32Z2.h
 * @version 2.3
 * @date 2024-05-03
 * @brief Peripheral Access Layer for S32Z2
 *
 * This file contains register definitions and macros for easy access to their
 * bit fields.
 *
 * This file assumes LITTLE endian system.
 */

/* Prevention from multiple including the same memory map */
#if !defined(S32Z2_H_)  /* Check if memory map has not been already included */
#define S32Z2_H_

/* ----------------------------------------------------------------------------
   -- IP Header Files
   ---------------------------------------------------------------------------- */

/* IP Header Files List */
#include "S32Z2_ACCESS_PROTECTION.h"
#include "S32Z2_ACE.h"
#include "S32Z2_ADC.h"
#include "S32Z2_AES_ACCEL.h"
#include "S32Z2_ATP.h"
#include "S32Z2_AXBS.h"
#include "S32Z2_BOOT.h"
#include "S32Z2_CANXL_DSC_CONTROL.h"
#include "S32Z2_CANXL_FILTER_BANK.h"
#include "S32Z2_CANXL_GRP_CONTROL.h"
#include "S32Z2_CANXL_MRU.h"
#include "S32Z2_CANXL_MSG_DESCRIPTORS.h"
#include "S32Z2_CANXL_RAMECC.h"
#include "S32Z2_CANXL_RXFIFO.h"
#include "S32Z2_CANXL_RXFIFO_CONTROL.h"
#include "S32Z2_CANXL_SIC.h"
#include "S32Z2_CAN_HUB.h"
#include "S32Z2_CAN_TBS.h"
#include "S32Z2_CE_L_VFCCU.h"
#include "S32Z2_CE_MRU.h"
#include "S32Z2_CE_SEMA42.h"
#include "S32Z2_CE_SRG_S.h"
#include "S32Z2_CLASS_0X9_CORESIGHT_COMPONENT.h"
#include "S32Z2_CMU_FC.h"
#include "S32Z2_CORESIGHT_OCEM.h"
#include "S32Z2_CORESIGHT_PROGRAMMING_MODEL.h"
#include "S32Z2_CORE_DEBUGGER_INTERFACE.h"
#include "S32Z2_CORE_SAFETY.h"
#include "S32Z2_CRC.h"
#include "S32Z2_CSTCU.h"
#include "S32Z2_CTU.h"
#include "S32Z2_C_VFCCU.h"
#include "S32Z2_DATA_MEMORY_SUBSYSTEM.h"
#include "S32Z2_DBG.h"
#include "S32Z2_DCU.h"
#include "S32Z2_DDRC.h"
#include "S32Z2_DFS.h"
#include "S32Z2_DIPORTSD.h"
#include "S32Z2_DMAMUX.h"
#include "S32Z2_DMA_CRC.h"
#include "S32Z2_DMSS_SAFETY.h"
#include "S32Z2_DSPI.h"
#include "S32Z2_EDMA3_MP.h"
#include "S32Z2_EDMA3_TCD.h"
#include "S32Z2_EDMA4_MP.h"
#include "S32Z2_EDMA4_TCD.h"
#include "S32Z2_EIM.h"
#include "S32Z2_EIM_GTM.h"
#include "S32Z2_EMIOS.h"
#include "S32Z2_ENETC_PORT.h"
#include "S32Z2_ENETC_PSEUDO_MAC_PORT2.h"
#include "S32Z2_ERM.h"
#include "S32Z2_ERM_GTM.h"
#include "S32Z2_ERROR_CORRECTION_CODES.h"
#include "S32Z2_FEED_DMACRC.h"
#include "S32Z2_FEED_DMA_MP.h"
#include "S32Z2_FEED_DMA_TCD.h"
#include "S32Z2_FLEXCAN.h"
#include "S32Z2_FLEXRAY.h"
#include "S32Z2_FXOSC.h"
#include "S32Z2_GIC.h"
#include "S32Z2_GPR0.h"
#include "S32Z2_GPR0_PCTL.h"
#include "S32Z2_GPR1.h"
#include "S32Z2_GPR1_PCTL.h"
#include "S32Z2_GPR2.h"
#include "S32Z2_GPR3.h"
#include "S32Z2_GPR3_PCTL.h"
#include "S32Z2_GPR4.h"
#include "S32Z2_GPR4_PCTL.h"
#include "S32Z2_GPR5.h"
#include "S32Z2_GPR5_PCTL.h"
#include "S32Z2_GPR6.h"
#include "S32Z2_GPR6_PCTL.h"
#include "S32Z2_GTMDI.h"
#include "S32Z2_GTMSS.h"
#include "S32Z2_GTM_GTM_CLS0.h"
#include "S32Z2_GTM_GTM_CLS1.h"
#include "S32Z2_GTM_GTM_CLS2.h"
#include "S32Z2_GTM_GTM_CLS3.h"
#include "S32Z2_I3C.h"
#include "S32Z2_IERC_IERB.h"
#include "S32Z2_IERC_PCI.h"
#include "S32Z2_INTERFACE_CONFIGURATION.h"
#include "S32Z2_INTERRUPT_CONTROL.h"
#include "S32Z2_LCU.h"
#include "S32Z2_LFAST.h"
#include "S32Z2_LINFLEXD.h"
#include "S32Z2_LLC_CSR.h"
#include "S32Z2_LLC_FSC.h"
#include "S32Z2_LMEM64.h"
#include "S32Z2_LPI2C.h"
#include "S32Z2_LSTCU.h"
#include "S32Z2_LSTCU_14_15_17_18.h"
#include "S32Z2_L_VFCCU.h"
#include "S32Z2_MCM.h"
#include "S32Z2_MC_CGM.h"
#include "S32Z2_MC_ME.h"
#include "S32Z2_MC_RGM.h"
#include "S32Z2_MDM_AP.h"
#include "S32Z2_MEW.h"
#include "S32Z2_MSCM.h"
#include "S32Z2_MU.h"
#include "S32Z2_MULTICORE_CONFIGURATION.h"
#include "S32Z2_NETC_F0_GLOBAL.h"
#include "S32Z2_NETC_F0_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_F1.h"
#include "S32Z2_NETC_F1_GLOBAL.h"
#include "S32Z2_NETC_F1_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_F2.h"
#include "S32Z2_NETC_F2_COMMON.h"
#include "S32Z2_NETC_F2_GLOBAL.h"
#include "S32Z2_NETC_F2_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_F3.h"
#include "S32Z2_NETC_F3_COMMON.h"
#include "S32Z2_NETC_F3_GLOBAL.h"
#include "S32Z2_NETC_F3_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_F3_SI0.h"
#include "S32Z2_NETC_F3_SI1.h"
#include "S32Z2_NETC_F3_SI2.h"
#include "S32Z2_NETC_F3_SI3.h"
#include "S32Z2_NETC_F3_SI4.h"
#include "S32Z2_NETC_F3_SI5.h"
#include "S32Z2_NETC_F3_SI6.h"
#include "S32Z2_NETC_F3_SI7.h"
#include "S32Z2_NETC_IERB.h"
#include "S32Z2_NETC_PRIV.h"
#include "S32Z2_NETC_VF1_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_VF2_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_VF3_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_VF4_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_VF5_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_VF6_PCI_HDR_TYPE0.h"
#include "S32Z2_NETC_VF7_PCI_HDR_TYPE0.h"
#include "S32Z2_OCOTP.h"
#include "S32Z2_NVIC.h"
#include "S32Z2_SCB.h"
#include "S32Z2_OMU.h"
#include "S32Z2_PIT.h"
#include "S32Z2_PLLDIG.h"
#include "S32Z2_PMC.h"
#include "S32Z2_PMSS_SAFETY.h"
#include "S32Z2_POWER_SCALING_UNIT.h"
#include "S32Z2_PROFILER.h"
#include "S32Z2_PROGRAM_MEMORY_SUBSYSTEM.h"
#include "S32Z2_PSI5.h"
#include "S32Z2_PSI5_S.h"
#include "S32Z2_QMAN_CNTRL.h"
#include "S32Z2_QUADSPI.h"
#include "S32Z2_QUADSPI_ARDB.h"
#include "S32Z2_QUEUE_DESCRIPTOR.h"
#include "S32Z2_QUEUE_MANAGER.h"
#include "S32Z2_QUEUE_MANAGER1.h"
#include "S32Z2_QUEUE_MANAGER2.h"
#include "S32Z2_QUEUE_MANAGER3.h"
#include "S32Z2_RDC.h"
#include "S32Z2_RESULT_DMACRC.h"
#include "S32Z2_RESULT_DMA_MP.h"
#include "S32Z2_RESULT_DMA_TCD.h"
#include "S32Z2_ROUND_ROBIN_ARBITER.h"
#include "S32Z2_RTT.h"
#include "S32Z2_RTUE_NIC_D.h"
#include "S32Z2_RTUF_NIC_D.h"
#include "S32Z2_RTUM_NIC_D.h"
#include "S32Z2_RTUP_NIC_B.h"
#include "S32Z2_RTU_GPR.h"
#include "S32Z2_RTU_L_VFCCU.h"
#include "S32Z2_RTU_MC_CGM.h"
#include "S32Z2_RTU_MRU.h"
#include "S32Z2_RTU_PMC.h"
#include "S32Z2_RTU_SEMA42.h"
#include "S32Z2_RTU_XRDC.h"
#include "S32Z2_RXLUT.h"
#include "S32Z2_SBSW.h"
#include "S32Z2_SDA_AP.h"
#include "S32Z2_SEC_S250.h"
#include "S32Z2_SEMA42.h"
#include "S32Z2_SINC.h"
#include "S32Z2_SIPI.h"
#include "S32Z2_SMU_L_VFCCU.h"
#include "S32Z2_SMU_MRU.h"
#include "S32Z2_SMU_SEMA42.h"
#include "S32Z2_SMU_SRG_S.h"
#include "S32Z2_SMU_XRDC.h"
#include "S32Z2_SPFU.h"
#include "S32Z2_SRAMCTL.h"
#include "S32Z2_SRX.h"
#include "S32Z2_SW_ETH_MAC_PORT0.h"
#include "S32Z2_SW_ETH_MAC_PORT1.h"
#include "S32Z2_SW_PORT0.h"
#include "S32Z2_SW_PORT1.h"
#include "S32Z2_SW_PORT2.h"
#include "S32Z2_SW_PSEUDO_MAC_PORT2.h"
#include "S32Z2_TIMERS.h"
#include "S32Z2_TMR0_BASE.h"
#include "S32Z2_TMU.h"
#include "S32Z2_TRGMUX_0.h"
#include "S32Z2_TRGMUX_1.h"
#include "S32Z2_TRGMUX_2.h"
#include "S32Z2_TRGMUX_3.h"
#include "S32Z2_USDHC.h"
#include "S32Z2_VIRT_WRAP.h"
#include "S32Z2_WATCHDOG.h"
#include "S32Z2_XBIC.h"
#include "S32Z2_XRDC.h"
#include "S32Z2_SYSTICK.h"
#include "S32Z2_MPU.h"

#endif  /* #if !defined(S32Z2_H_) */