//  Memory map file to generate linker scripts for programs to run on
//  most targets (that have the OCD option); allows I/O through the host
//  debugger when being debugged using GDB (via the Xtensa OCD daemon).

// Customer ID=7187; Build=0xac168; Copyright (c) 2006-2015 Cadence Design Systems, Inc.
//
// Permission is hereby granted, free of charge, to any person obtaining
// a copy of this software and associated documentation files (the
// "Software"), to deal in the Software without restriction, including
// without limitation the rights to use, copy, modify, merge, publish,
// distribute, sublicense, and/or sell copies of the Software, and to
// permit persons to whom the Software is furnished to do so, subject to
// the following conditions:
//
// The above copyright notice and this permission notice shall be included
// in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

//  Show extra XTBOARD memory map details.
INCLUDE_XTBOARD_MEMORIES = try


// A memory map is a sequence of memory descriptions and
// optional parameter assignments.
//
// Each memory description has the following format:
//   BEGIN <name>
//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
//                       : [writable] [,executable] [,device] ;
//     <segment>*
//   END <name>
//
// where each <segment> description has the following format:
//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
//                : <section-name>* ;
//
// Each parameter assignment is a keyword/value pair in the following format:
//   <keyword> = <value>                (no spaces in <value>)
// or
//   <keyword> = "<value>"              (spaces allowed in <value>)
//
// The following primitives are also defined:
//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
//                                       | IN_SEGMENT(<seg-name>) }
//
//   NOLOAD <section-name1> [ <section-name2> ... ]
//
// Please refer to the Xtensa LSP Reference Manual for more details.
//
BEGIN iram0
0x500000: instRam : iram0 : 0x100000 : executable, writable ;
 iram0_0 : C : 0x500000 - 0x57ffff : .iram0.literal .iram0.text;
 iram0_1 : F : 0x580000 - 0x5802df : .ResetVector.text .ResetHandler.literal .ResetHandler.text;
 iram0_2 : C : 0x5802e0 - 0x5803ff : ;
 iram0_3 : F : 0x580400 - 0x580577 : .WindowVectors.text;
 iram0_4 : C : 0x580578 - 0x58057b : .Level2InterruptVector.literal;
 iram0_5 : F : 0x58057c - 0x580597 : .Level2InterruptVector.text;
 iram0_6 : C : 0x580598 - 0x58059b : .Level3InterruptVector.literal;
 iram0_7 : F : 0x58059c - 0x5805b7 : .Level3InterruptVector.text;
 iram0_8 : C : 0x5805b8 - 0x5805bb : .DebugExceptionVector.literal;
 iram0_9 : F : 0x5805bc - 0x5805d7 : .DebugExceptionVector.text;
 iram0_10 : C : 0x5805d8 - 0x5805db : .NMIExceptionVector.literal;
 iram0_11 : F : 0x5805dc - 0x5805f7 : .NMIExceptionVector.text;
 iram0_12 : C : 0x5805f8 - 0x5805fb : .KernelExceptionVector.literal;
 iram0_13 : F : 0x5805fc - 0x580617 : .KernelExceptionVector.text;
 iram0_14 : C : 0x580618 - 0x58061b : .UserExceptionVector.literal;
 iram0_15 : F : 0x58061c - 0x580637 : .UserExceptionVector.text;
 iram0_16 : C : 0x580638 - 0x58063b : .DoubleExceptionVector.literal;
 iram0_17 : F : 0x58063c - 0x580657 : .DoubleExceptionVector.text;
 iram0_18 : C : 0x580658 - 0x5fffff : ;
END iram0

BEGIN iram1
0x600000: instRam : iram1 : 0x200000 : executable, writable ;
 iram1_0 : C : 0x600000 - 0x7fffff : .iram1.literal .iram1.text;
END iram1

BEGIN sram
0x20000000: sysram : sram : 0x500000 : executable, writable ;
 sram0 : C : 0x20000000 - 0x204fffff :  STACK :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names __llvm_covmap .note.gnu.build-id .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss;
END sram

BEGIN dram0
0x20500000: dataRam : dram0 : 0x100000 : writable ;
 dram0_0 : C : 0x20500000 - 0x205fffff : .dram0.rodata .dram0.data .dram0.bss;
END dram0

BEGIN dram1
0x20600000: dataRam : dram1 : 0x200000 : writable ;
 dram1_0 : C : 0x20600000 - 0x207fffff : .dram1.rodata .dram1.data .dram1.bss;
END dram1

BEGIN iocached
0x70000000: io : iocached : 0xda00000 : executable, writable ;
END iocached

BEGIN rambypass
0x80000000: sysram : rambypass : 0x10000000 : device, executable, writable ;
END rambypass

BEGIN iobypass
0x90000000: io : iobypass : 0xda00000 : device, executable, writable ;
END iobypass