/* * Copyright 2023-2024 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #ifndef _FSL_INPUTMUX_CONNECTIONS_ #define _FSL_INPUTMUX_CONNECTIONS_ #include "fsl_device_registers.h" /******************************************************************************* * Definitions ******************************************************************************/ /* Component ID definition, used by tools. */ #ifndef FSL_COMPONENT_ID #define FSL_COMPONENT_ID "platform.drivers.inputmux_connections" #endif /*! * @addtogroup inputmux_driver * @{ */ /*! @brief Periphinmux IDs */ #define PINTSEL_PMUX_ID 0x100U #define DSP_INT_PMUX_ID 0x140U #if defined(INPUTMUX0) #define SCT0_PMUX_ID 0x00U #define FLEXCOMM0_ITRIG_PMUX_ID 0x200U #define FLEXCOMM1_ITRIG_PMUX_ID 0x220U #define FLEXCOMM2_ITRIG_PMUX_ID 0x240U #define FLEXCOMM3_ITRIG_PMUX_ID 0x260U #define FLEXCOMM4_ITRIG_PMUX_ID 0x280U #define FLEXCOMM5_ITRIG_PMUX_ID 0x2A0U #define FLEXCOMM6_ITRIG_PMUX_ID 0x2C0U #define FLEXCOMM7_ITRIG_PMUX_ID 0x2E0U #define FLEXCOMM8_ITRIG_PMUX_ID 0x300U #define FLEXCOMM9_ITRIG_PMUX_ID 0x320U #define FLEXCOMM10_ITRIG_PMUX_ID 0x340U #define FLEXCOMM11_ITRIG_PMUX_ID 0x360U #define FLEXCOMM12_ITRIG_PMUX_ID 0x380U #define FLEXCOMM13_ITRIG_PMUX_ID 0x3A0U #define CT32BIT0_CAP_PMUX_ID 0x600U #define CT32BIT1_CAP_PMUX_ID 0x620U #define CT32BIT2_CAP_PMUX_ID 0x640U #define CT32BIT3_CAP_PMUX_ID 0x660U #define CT32BIT4_CAP_PMUX_ID 0x680U #define CT32BIT0_TRIG_PMUX_ID 0x610U #define CT32BIT1_TRIG_PMUX_ID 0x630U #define CT32BIT2_TRIG_PMUX_ID 0x650U #define CT32BIT3_TRIG_PMUX_ID 0x670U #define CT32BIT4_TRIG_PMUX_ID 0x690U #define FREQME_REF_PMUX_ID 0x700U #define FREQME_TAR_PMUX_ID 0x704U #define EZHV_PMUX_ID 0x720U #define FLEXIO_PMUX_ID 0x760U #elif defined(INPUTMUX1) #define FLEXCOMM17_ITRIG_PMUX_ID 0x200U #define FLEXCOMM18_ITRIG_PMUX_ID 0x220U #define FLEXCOMM19_ITRIG_PMUX_ID 0x240U #define FLEXCOMM20_ITRIG_PMUX_ID 0x260U #define ADC0_TRIG_PMUX_ID 0x400U #define CT32BIT5_CAP_PMUX_ID 0x600U #define CT32BIT6_CAP_PMUX_ID 0x620U #define CT32BIT7_CAP_PMUX_ID 0x640U #define CT32BIT5_TRIG_PMUX_ID 0x610U #define CT32BIT6_TRIG_PMUX_ID 0x630U #define CT32BIT7_TRIG_PMUX_ID 0x650U #else #error "Unsupported core!" #endif #define PMUX_SHIFT 20U /*! @brief INPUTMUX connections type */ typedef enum _inputmux_connection_t { #if defined(INPUTMUX0) /*!< SCT INMUX. */ kINPUTMUX_Sct0PinInp0ToSct0 = 0U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0PinInp1ToSct0 = 1U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0PinInp2ToSct0 = 2U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0PinInp3ToSct0 = 3U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0PinInp4ToSct0 = 4U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0PinInp5ToSct0 = 5U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0PinInp6ToSct0 = 6U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0PinInp7ToSct0 = 7U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer0Mat0ToSct0 = 8U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer1Mat0ToSct0 = 9U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer2Mat0ToSct0 = 10U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer3Mat0ToSct0 = 11U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer4Mat0ToSct0 = 12U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToSct0 = 13U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioIntBmatchToSct0 = 14U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToSct0 = 15U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToSct0 = 16U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxBclkToSct0 = 17U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxBclkToSct0 = 18U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxBclkToSct0 = 19U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxBclkToSct0 = 20U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxBclkToSct0 = 21U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxBclkToSct0 = 22U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_MclkToSct0 = 23U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cpu0TxevToSct0 = 24U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_DebugHaltedToSct0 = 25U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToSct0 = 26U + (SCT0_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToSct0 = 27U + (SCT0_PMUX_ID << PMUX_SHIFT), /*!< Pin Interrupt. */ kINPUTMUX_GpioPort0Pin0ToPintsel = 0U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin1ToPintsel = 1U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin2ToPintsel = 2U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin3ToPintsel = 3U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin4ToPintsel = 4U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin5ToPintsel = 5U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin6ToPintsel = 6U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin7ToPintsel = 7U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin8ToPintsel = 8U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin9ToPintsel = 9U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin10ToPintsel = 10U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin11ToPintsel = 11U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin12ToPintsel = 12U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin13ToPintsel = 13U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin14ToPintsel = 14U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin15ToPintsel = 15U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin16ToPintsel = 16U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin17ToPintsel = 17U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin18ToPintsel = 18U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin19ToPintsel = 19U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin20ToPintsel = 20U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin21ToPintsel = 21U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin22ToPintsel = 22U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin23ToPintsel = 23U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin24ToPintsel = 24U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin25ToPintsel = 25U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin26ToPintsel = 26U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin27ToPintsel = 27U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin28ToPintsel = 28U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin29ToPintsel = 29U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin30ToPintsel = 30U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort0Pin31ToPintsel = 31U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin0ToPintsel = 32U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin1ToPintsel = 33U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin2ToPintsel = 34U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin3ToPintsel = 35U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin4ToPintsel = 36U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin5ToPintsel = 37U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin6ToPintsel = 38U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin7ToPintsel = 39U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin8ToPintsel = 40U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin9ToPintsel = 41U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin10ToPintsel = 42U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin11ToPintsel = 43U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin12ToPintsel = 44U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin13ToPintsel = 45U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin14ToPintsel = 46U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin15ToPintsel = 47U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin16ToPintsel = 48U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin17ToPintsel = 49U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin18ToPintsel = 50U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort1Pin19ToPintsel = 51U + (PINTSEL_PMUX_ID << PMUX_SHIFT), /*!< DSP Interrupt. */ kINPUTMUX_Flexcomm0ToDspInterrupt = 0U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm1ToDspInterrupt = 1U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm2ToDspInterrupt = 2U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm3ToDspInterrupt = 3U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm4ToDspInterrupt = 4U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm5ToDspInterrupt = 5U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm6ToDspInterrupt = 6U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm7ToDspInterrupt = 7U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm8ToDspInterrupt = 8U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm9ToDspInterrupt = 9U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm10ToDspInterrupt = 10U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm11ToDspInterrupt = 11U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm12ToDspInterrupt = 12U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm13ToDspInterrupt = 13U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Mu2AToDspInterrupt = 14U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Mu4BToDspInterrupt = 15U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Wdt0ToDspInterrupt = 16U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Wdt1ToDspInterrupt = 17U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Utick0ToDspInterrupt = 18U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Spi14ToDspInterrupt = 19U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Mrt0ToDspInterrupt = 20U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_OsEventTimerToDspInterrupt = 21U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer0ToDspInterrupt = 22U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer1ToDspInterrupt = 23U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer2ToDspInterrupt = 24U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer3ToDspInterrupt = 25U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer4ToDspInterrupt = 26U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0AlarmToDspInterrupt = 27U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0WakeupToDspInterrupt = 28U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c0ToDspInterrupt = 29U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c1ToDspInterrupt = 30U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_MicfilToDspInterrupt = 31U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_HwvadToDspInterrupt = 32U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_LcdifToDspInterrupt = 33U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpuToDspInterrupt = 34U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_EzhvToDspInterrupt = 35U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_FlexioToDspInterrupt = 36U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Spi16ToDspInterrupt = 37U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq0ToDspInterrupt = 38U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq1ToDspInterrupt = 39U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq2ToDspInterrupt = 40U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq3ToDspInterrupt = 41U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq4ToDspInterrupt = 42U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq5ToDspInterrupt = 43U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq6ToDspInterrupt = 44U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq7ToDspInterrupt = 45U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq8ToDspInterrupt = 46U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq9ToDspInterrupt = 47U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq10ToDspInterrupt = 48U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq11ToDspInterrupt = 49U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq12ToDspInterrupt = 50U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq13ToDspInterrupt = 51U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq14ToDspInterrupt = 52U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Irq15ToDspInterrupt = 53U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq0ToDspInterrupt = 54U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq1ToDspInterrupt = 55U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq2ToDspInterrupt = 56U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq3ToDspInterrupt = 57U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq4ToDspInterrupt = 58U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq5ToDspInterrupt = 59U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq6ToDspInterrupt = 60U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq7ToDspInterrupt = 61U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq8ToDspInterrupt = 62U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq9ToDspInterrupt = 63U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq10ToDspInterrupt = 64U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq11ToDspInterrupt = 65U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq12ToDspInterrupt = 66U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq13ToDspInterrupt = 67U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq14ToDspInterrupt = 68U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Irq15ToDspInterrupt = 69U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio0Irq0ToDspInterrupt = 70U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio0Irq1ToDspInterrupt = 71U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio1Irq0ToDspInterrupt = 72U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio1Irq1ToDspInterrupt = 73U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio2Irq0ToDspInterrupt = 74U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio2Irq1ToDspInterrupt = 75U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio3Irq0ToDspInterrupt = 76U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio3Irq1ToDspInterrupt = 77U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio4Irq0ToDspInterrupt = 78U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio4Irq1ToDspInterrupt = 79U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio5Irq0ToDspInterrupt = 80U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio5Irq1ToDspInterrupt = 81U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio6Irq0ToDspInterrupt = 82U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio6Irq1ToDspInterrupt = 83U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio7Irq0ToDspInterrupt = 84U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio7Irq1ToDspInterrupt = 85U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0ToDspInterrupt = 86U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1ToDspInterrupt = 87U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt2ToDspInterrupt = 88U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt3ToDspInterrupt = 89U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt4ToDspInterrupt = 90U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt5ToDspInterrupt = 91U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt6ToDspInterrupt = 92U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt7ToDspInterrupt = 93U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0ToDspInterrupt = 94U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1ToDspInterrupt = 95U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2ToDspInterrupt = 96U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3ToDspInterrupt = 97U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Xspi0ToDspInterrupt = 98U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Xspi1ToDspInterrupt = 99U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Xspi2ToDspInterrupt = 100U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_JpegIrqToDspInterrupt = 101U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_PngIrqToDspInterrupt = 102U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Neutron64IrqToDspInterrupt = 103U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_PmcIrqToDspInterrupt = 104U + (DSP_INT_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM0 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm0 = 0U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm0 = 1U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm0 = 2U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm0 = 3U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm0 = 4U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm0 = 5U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm0 = 6U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm0 = 7U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm0 = 8U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm0 = 9U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm0 = 10U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm0 = 11U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm0 = 12U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm0 = 13U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm0 = 14U + (FLEXCOMM0_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM1 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm1 = 0U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm1 = 1U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm1 = 2U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm1 = 3U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm1 = 4U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm1 = 5U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm1 = 6U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm1 = 7U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm1 = 8U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm1 = 9U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm1 = 10U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm1 = 11U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm1 = 12U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm1 = 13U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm1 = 14U + (FLEXCOMM1_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM2 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm2 = 0U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm2 = 1U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm2 = 2U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm2 = 3U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm2 = 4U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm2 = 5U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm2 = 6U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm2 = 7U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm2 = 8U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm2 = 9U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm2 = 10U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm2 = 11U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm2 = 12U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm2 = 13U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm2 = 14U + (FLEXCOMM2_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM3 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm3 = 0U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm3 = 1U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm3 = 2U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm3 = 3U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm3 = 4U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm3 = 5U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm3 = 6U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm3 = 7U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm3 = 8U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm3 = 9U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm3 = 10U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm3 = 11U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm3 = 12U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm3 = 13U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm3 = 14U + (FLEXCOMM3_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM4 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm4 = 0U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm4 = 1U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm4 = 2U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm4 = 3U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm4 = 4U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm4 = 5U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm4 = 6U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm4 = 7U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm4 = 8U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm4 = 9U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm4 = 10U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm4 = 11U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm4 = 12U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm4 = 13U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm4 = 14U + (FLEXCOMM4_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM5 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm5 = 0U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm5 = 1U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm5 = 2U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm5 = 3U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm5 = 4U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm5 = 5U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm5 = 6U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm5 = 7U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm5 = 8U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm5 = 9U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm5 = 10U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm5 = 11U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm5 = 12U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm5 = 13U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm5 = 14U + (FLEXCOMM5_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM6 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm6 = 0U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm6 = 1U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm6 = 2U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm6 = 3U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm6 = 4U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm6 = 5U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm6 = 6U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm6 = 7U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm6 = 8U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm6 = 9U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm6 = 10U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm6 = 11U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm6 = 12U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm6 = 13U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm6 = 14U + (FLEXCOMM6_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM7 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm7 = 0U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm7 = 1U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm7 = 2U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm7 = 3U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm7 = 4U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm7 = 5U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm7 = 6U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm7 = 7U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm7 = 8U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm7 = 9U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm7 = 10U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm7 = 11U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm7 = 12U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm7 = 13U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm7 = 14U + (FLEXCOMM7_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM8 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm8 = 0U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm8 = 1U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm8 = 2U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm8 = 3U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm8 = 4U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm8 = 5U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm8 = 6U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm8 = 7U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm8 = 8U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm8 = 9U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm8 = 10U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm8 = 11U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm8 = 12U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm8 = 13U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm8 = 14U + (FLEXCOMM8_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM9 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm9 = 0U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm9 = 1U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm9 = 2U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm9 = 3U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm9 = 4U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm9 = 5U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm9 = 6U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm9 = 7U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm9 = 8U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm9 = 9U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm9 = 10U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm9 = 11U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm9 = 12U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm9 = 13U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm9 = 14U + (FLEXCOMM9_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM10 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm10 = 0U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm10 = 1U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm10 = 2U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm10 = 3U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm10 = 4U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm10 = 5U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm10 = 6U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm10 = 7U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm10 = 8U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm10 = 9U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm10 = 10U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm10 = 11U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm10 = 12U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm10 = 13U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm10 = 14U + (FLEXCOMM10_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM11 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm11 = 0U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm11 = 1U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm11 = 2U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm11 = 3U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm11 = 4U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm11 = 5U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm11 = 6U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm11 = 7U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm11 = 8U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm11 = 9U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm11 = 10U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm11 = 11U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm11 = 12U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm11 = 13U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm11 = 14U + (FLEXCOMM11_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM12 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm12 = 0U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm12 = 1U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm12 = 2U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm12 = 3U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm12 = 4U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm12 = 5U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm12 = 6U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm12 = 7U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm12 = 8U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm12 = 9U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm12 = 10U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm12 = 11U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm12 = 12U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm12 = 13U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm12 = 14U + (FLEXCOMM12_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM13 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm13 = 0U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm13 = 1U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm13 = 2U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm13 = 3U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out3ToFlexcomm13 = 4U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexcomm13 = 5U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToFlexcomm13 = 6U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexcomm13 = 7U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexcomm13 = 8U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexcomm13 = 9U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexcomm13 = 10U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexcomm13 = 11U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BMatchToFlexcomm13 = 12U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm13 = 13U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm13 = 14U + (FLEXCOMM13_ITRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier0 capture input mux. */ kINPUTMUX_CtInp0ToTimer0CaptureChannels = 0U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer0CaptureChannels = 1U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer0CaptureChannels = 2U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer0CaptureChannels = 3U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer0CaptureChannels = 4U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer0CaptureChannels = 5U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer0CaptureChannels = 6U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer0CaptureChannels = 7U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer0CaptureChannels = 8U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer0CaptureChannels = 9U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer0CaptureChannels = 10U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer0CaptureChannels = 11U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer0CaptureChannels = 12U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer0CaptureChannels = 13U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer0CaptureChannels = 14U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer0CaptureChannels = 15U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer0CaptureChannels = 16U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer0CaptureChannels = 17U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer0CaptureChannels = 18U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer0CaptureChannels = 19U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer0CaptureChannels = 20U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer0CaptureChannels = 21U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer0CaptureChannels = 22U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer0CaptureChannels = 23U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer0CaptureChannels = 24U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer0CaptureChannels = 25U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer0CaptureChannels = 26U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer0CaptureChannels = 27U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer0CaptureChannels = 28U + (CT32BIT0_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier1 capture input mux. */ kINPUTMUX_CtInp0ToTimer1CaptureChannels = 0U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer1CaptureChannels = 1U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer1CaptureChannels = 2U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer1CaptureChannels = 3U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer1CaptureChannels = 4U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer1CaptureChannels = 5U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer1CaptureChannels = 6U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer1CaptureChannels = 7U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer1CaptureChannels = 8U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer1CaptureChannels = 9U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer1CaptureChannels = 10U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer1CaptureChannels = 11U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer1CaptureChannels = 12U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer1CaptureChannels = 13U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer1CaptureChannels = 14U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer1CaptureChannels = 15U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer1CaptureChannels = 16U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer1CaptureChannels = 17U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer1CaptureChannels = 18U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer1CaptureChannels = 19U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer1CaptureChannels = 20U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer1CaptureChannels = 21U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer1CaptureChannels = 22U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer1CaptureChannels = 23U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer1CaptureChannels = 24U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer1CaptureChannels = 25U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer1CaptureChannels = 26U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer1CaptureChannels = 27U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer1CaptureChannels = 28U + (CT32BIT1_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier2 capture input mux. */ kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer2CaptureChannels = 9U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer2CaptureChannels = 10U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer2CaptureChannels = 11U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer2CaptureChannels = 12U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer2CaptureChannels = 13U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer2CaptureChannels = 14U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer2CaptureChannels = 15U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer2CaptureChannels = 16U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer2CaptureChannels = 17U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer2CaptureChannels = 18U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer2CaptureChannels = 19U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer2CaptureChannels = 20U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer2CaptureChannels = 21U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer2CaptureChannels = 22U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer2CaptureChannels = 23U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer2CaptureChannels = 24U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer2CaptureChannels = 25U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer2CaptureChannels = 26U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer2CaptureChannels = 27U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer2CaptureChannels = 28U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier3 capture input mux. */ kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer3CaptureChannels = 9U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer3CaptureChannels = 10U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer3CaptureChannels = 11U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer3CaptureChannels = 12U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer3CaptureChannels = 13U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer3CaptureChannels = 14U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer3CaptureChannels = 15U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer3CaptureChannels = 16U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer3CaptureChannels = 17U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer3CaptureChannels = 18U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer3CaptureChannels = 19U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer3CaptureChannels = 20U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer3CaptureChannels = 21U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer3CaptureChannels = 22U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer3CaptureChannels = 23U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer3CaptureChannels = 24U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer3CaptureChannels = 25U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer3CaptureChannels = 26U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer3CaptureChannels = 27U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer3CaptureChannels = 28U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier4 capture input mux. */ kINPUTMUX_CtInp0ToTimer4CaptureChannels = 0U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer4CaptureChannels = 1U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer4CaptureChannels = 2U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer4CaptureChannels = 3U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer4CaptureChannels = 4U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer4CaptureChannels = 5U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer4CaptureChannels = 6U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer4CaptureChannels = 7U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer4CaptureChannels = 8U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer4CaptureChannels = 9U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer4CaptureChannels = 10U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer4CaptureChannels = 11U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer4CaptureChannels = 12U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer4CaptureChannels = 13U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer4CaptureChannels = 14U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer4CaptureChannels = 15U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer4CaptureChannels = 16U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer4CaptureChannels = 17U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer4CaptureChannels = 18U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer4CaptureChannels = 19U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer4CaptureChannels = 20U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer4CaptureChannels = 21U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer4CaptureChannels = 22U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer4CaptureChannels = 23U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer4CaptureChannels = 24U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer4CaptureChannels = 25U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer4CaptureChannels = 26U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer4CaptureChannels = 27U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer4CaptureChannels = 28U + (CT32BIT4_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier0 Input trigger mux. */ kINPUTMUX_CtInp0ToTimer0Trigger = 0U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer0Trigger = 1U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer0Trigger = 2U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer0Trigger = 3U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer0Trigger = 4U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer0Trigger = 5U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer0Trigger = 6U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer0Trigger = 7U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer0Trigger = 8U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer0Trigger = 9U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer0Trigger = 10U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer0Trigger = 11U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer0Trigger = 12U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer0Trigger = 13U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer0Trigger = 14U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer0Trigger = 15U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer0Trigger = 16U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer0Trigger = 17U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer0Trigger = 18U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer0Trigger = 19U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer0Trigger = 20U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer0Trigger = 21U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer0Trigger = 22U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer0Trigger = 23U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer0Trigger = 24U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer0Trigger = 25U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer0Trigger = 26U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer0Trigger = 27U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer0Trigger = 28U + (CT32BIT0_TRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier1 Input trigger mux. */ kINPUTMUX_CtInp0ToTimer1Trigger = 0U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer1Trigger = 1U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer1Trigger = 2U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer1Trigger = 3U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer1Trigger = 4U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer1Trigger = 5U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer1Trigger = 6U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer1Trigger = 7U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer1Trigger = 8U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer1Trigger = 9U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer1Trigger = 10U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer1Trigger = 11U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer1Trigger = 12U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer1Trigger = 13U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer1Trigger = 14U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer1Trigger = 15U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer1Trigger = 16U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer1Trigger = 17U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer1Trigger = 18U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer1Trigger = 19U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer1Trigger = 20U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer1Trigger = 21U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer1Trigger = 22U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer1Trigger = 23U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer1Trigger = 24U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer1Trigger = 25U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer1Trigger = 26U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer1Trigger = 27U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer1Trigger = 28U + (CT32BIT1_TRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier2 Input trigger mux. */ kINPUTMUX_CtInp0ToTimer2Trigger = 0U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer2Trigger = 1U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer2Trigger = 2U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer2Trigger = 3U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer2Trigger = 4U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer2Trigger = 5U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer2Trigger = 6U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer2Trigger = 7U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer2Trigger = 8U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer2Trigger = 9U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer2Trigger = 10U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer2Trigger = 11U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer2Trigger = 12U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer2Trigger = 13U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer2Trigger = 14U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer2Trigger = 15U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer2Trigger = 16U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer2Trigger = 17U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer2Trigger = 18U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer2Trigger = 19U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer2Trigger = 20U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer2Trigger = 21U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer2Trigger = 22U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer2Trigger = 23U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer2Trigger = 24U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer2Trigger = 25U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer2Trigger = 26U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer2Trigger = 27U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer2Trigger = 28U + (CT32BIT2_TRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier3 Input trigger mux. */ kINPUTMUX_CtInp0ToTimer3Trigger = 0U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer3Trigger = 1U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer3Trigger = 2U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer3Trigger = 3U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer3Trigger = 4U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer3Trigger = 5U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer3Trigger = 6U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer3Trigger = 7U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer3Trigger = 8U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer3Trigger = 9U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer3Trigger = 10U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer3Trigger = 11U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer3Trigger = 12U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer3Trigger = 13U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer3Trigger = 14U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer3Trigger = 15U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer3Trigger = 16U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer3Trigger = 17U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer3Trigger = 18U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer3Trigger = 19U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer3Trigger = 20U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer3Trigger = 21U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer3Trigger = 22U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer3Trigger = 23U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer3Trigger = 24U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer3Trigger = 25U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer3Trigger = 26U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer3Trigger = 27U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer3Trigger = 28U + (CT32BIT3_TRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier4 Input trigger mux. */ kINPUTMUX_CtInp0ToTimer4Trigger = 0U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer4Trigger = 1U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer4Trigger = 2U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer4Trigger = 3U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer4Trigger = 4U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer4Trigger = 5U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer4Trigger = 6U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer4Trigger = 7U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer4Trigger = 8U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer4Trigger = 9U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp10ToTimer4Trigger = 10U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp11ToTimer4Trigger = 11U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp12ToTimer4Trigger = 12U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp13ToTimer4Trigger = 13U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp14ToTimer4Trigger = 14U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp15ToTimer4Trigger = 15U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0TxSyncToTimer4Trigger = 16U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai0RxSyncToTimer4Trigger = 17U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1TxSyncToTimer4Trigger = 18U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai1RxSyncToTimer4Trigger = 19U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2TxSyncToTimer4Trigger = 20U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai2RxSyncToTimer4Trigger = 21U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToTimer4Trigger = 22U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToTimer4Trigger = 23U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer4Trigger = 24U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer4Trigger = 25U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer4Trigger = 26U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToTimer4Trigger = 27U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToTimer4Trigger = 28U + (CT32BIT4_TRIG_PMUX_ID << PMUX_SHIFT), /*!< Frequency measurement reference clock. */ kINPUTMUX_OscClkToFreqmeasRef = 0U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro1Div8ToFreqmeasRef = 1U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro1ToFreqmeasRef = 2U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_LposcToFreqmeasRef = 3U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_32KhzOscToFreqmeasRef = 4U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro0ToFreqmeasRef = 6U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro2ToFreqmeasRef = 7U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_FreqmeGpioAClkToFreqmeasRef = 8U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), kINPUTMUX_FreqmeGpioBClkToFreqmeasRef = 9U + (FREQME_REF_PMUX_ID << PMUX_SHIFT), /*!< Frequency measurement target clock. */ kINPUTMUX_OscClkToFreqmeasTar = 0U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro1Div8ToFreqmeasTar = 1U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro1ToFreqmeasTar = 2U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_LposcToFreqmeasTar = 3U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_32KhzOscToFreqmeasTar = 4U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro0ToFreqmeasTar = 6U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Fro2ToFreqmeasTar = 7U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_FreqmeGpioAClkToFreqmeasTar = 8U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), kINPUTMUX_FreqmeGpioBClkToFreqmeasTar = 9U + (FREQME_TAR_PMUX_ID << PMUX_SHIFT), /*!< EZHV input mux. */ kINPUTMUX_GpioInt0Trig0ToEzhv = 0U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0Trig1ToEzhv = 1U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1Trig0ToEzhv = 2U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1Trig1ToEzhv = 3U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt2Trig0ToEzhv = 4U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt2Trig1ToEzhv = 5U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt3Trig0ToEzhv = 6U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt3Trig1ToEzhv = 7U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt4Trig0ToEzhv = 8U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt4Trig1ToEzhv = 9U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt5Trig0ToEzhv = 10U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt5Trig1ToEzhv = 11U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt6Trig0ToEzhv = 12U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt6Trig1ToEzhv = 13U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt7Trig0ToEzhv = 14U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt7Trig1ToEzhv = 15U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm0IrqToEzhv = 16U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm1IrqToEzhv = 17U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm2IrqToEzhv = 18U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm3IrqToEzhv = 19U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm4IrqToEzhv = 20U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm5IrqToEzhv = 21U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm6IrqToEzhv = 22U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm7IrqToEzhv = 23U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm14IrqToEzhv = 24U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm16IrqToEzhv = 25U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c0IrqToEzhv = 26U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c1IrqToEzhv = 27U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c2IrqToEzhv = 28U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c3IrqToEzhv = 29U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_FlexioIrqToEzhv = 30U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio0IrqToEzhv = 31U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio1IrqToEzhv = 32U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio2IrqToEzhv = 33U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio3IrqToEzhv = 34U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio4IrqToEzhv = 35U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio5IrqToEzhv = 36U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio6IrqToEzhv = 37U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio7IrqToEzhv = 38U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio8IrqToEzhv = 39U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio9IrqToEzhv = 40U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio10IrqToEzhv = 41U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0IrqToEzhv = 42U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer0IrqToEzhv = 43U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer1IrqToEzhv = 44U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer2IrqToEzhv = 45U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer3IrqToEzhv = 46U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer4IrqToEzhv = 47U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer5IrqToEzhv = 48U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer6IrqToEzhv = 49U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer7IrqToEzhv = 50U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Utick0IrqToEzhv = 51U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Mrt0IrqToEzhv = 52U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToEzhv = 53U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_OsEventIrqToEzhv = 54U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Wdt0IrqToEzhv = 55U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Wdt1IrqToEzhv = 56U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0IrqToEzhv = 57U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_AcmpIrqToEzhv = 58U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_MicfilIrqToEzhv = 59U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_HwvadToEzhv = 60U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sdio0IrqToEzhv = 61U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sdio1IrqToEzhv = 62U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0IrqToEzhv = 63U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1IrqToEzhv = 64U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_LcdifIrqToEzhv = 65U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpuIrqToEzhv = 66U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Ch0IrqToEzhv = 67U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Ch1IrqToEzhv = 68U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Ch2IrqToEzhv = 69U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma0Ch3IrqToEzhv = 70U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Ch0IrqToEzhv = 71U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Ch1IrqToEzhv = 72U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Ch2IrqToEzhv = 73U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma1Ch3IrqToEzhv = 74U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Ch0IrqToEzhv = 75U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Ch1IrqToEzhv = 76U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Ch2IrqToEzhv = 77U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Ch3IrqToEzhv = 78U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Ch0IrqToEzhv = 79U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Ch1IrqToEzhv = 80U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Ch2IrqToEzhv = 81U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Ch3IrqToEzhv = 82U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dsp0TieExpstate1ToEzhv = 83U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dsp1TieExpstate1ToEzhv = 84U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_SctOut8ToEzhv = 85U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_SctOut9ToEzhv = 86U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToEzhv = 87U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat2ToEzhv = 88U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToEzhv = 89U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat2ToEzhv = 90U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cpu0TxevToEzhv = 91U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BmatchToEzhv = 92U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_MipiIrqToEzhv = 93U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb0SofToEzhv = 94U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Usb1SofToEzhv = 95U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToEzhv = 96U + (EZHV_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToEzhv = 97U + (EZHV_PMUX_ID << PMUX_SHIFT), /* FLEXIO0 input mux */ kINPUTMUX_CtInp0ToFlexio0 = 0U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexio0 = 1U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexio0 = 2U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexio0 = 3U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out6ToFlexio0 = 4U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out7ToFlexio0 = 5U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out8ToFlexio0 = 6U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToFlexio0 = 7U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToFlexio0 = 8U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToFlexio0 = 9U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToFlexio0 = 10U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToFlexio0 = 11U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BmatchToFlexio0 = 12U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexio0 = 13U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_EzhvOutToFlexio0 = 14U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqOutToFlexio0 = 15U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio0Irq0ToFlexio0 = 16U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio0Irq1ToFlexio0 = 17U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio1Irq0ToFlexio0 = 18U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio1Irq1ToFlexio0 = 19U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio2Irq0ToFlexio0 = 20U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio2Irq1ToFlexio0 = 21U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio3Irq0ToFlexio0 = 22U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio3Irq1ToFlexio0 = 23U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio4Irq0ToFlexio0 = 24U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio4Irq1ToFlexio0 = 25U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio5Irq0ToFlexio0 = 26U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio5Irq1ToFlexio0 = 27U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio6Irq0ToFlexio0 = 28U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio6Irq1ToFlexio0 = 29U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio7Irq0ToFlexio0 = 30U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio7Irq1ToFlexio0 = 31U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio8Irq0ToFlexio0 = 32U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio8Irq1ToFlexio0 = 33U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio9Irq0ToFlexio0 = 34U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio9Irq1ToFlexio0 = 35U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio10Irq0ToFlexio0 = 36U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio10Irq1ToFlexio0 = 37U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut0ToFlexio0 = 38U + (FLEXIO_PMUX_ID << PMUX_SHIFT), kINPUTMUX_TmprOut1ToFlexio0 = 39U + (FLEXIO_PMUX_ID << PMUX_SHIFT), #else kINPUTMUX_GpioPort8Pin0ToPintsel = 0U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin1ToPintsel = 1U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin2ToPintsel = 2U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin3ToPintsel = 3U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin4ToPintsel = 4U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin5ToPintsel = 5U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin6ToPintsel = 6U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin7ToPintsel = 7U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin8ToPintsel = 8U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin9ToPintsel = 9U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin10ToPintsel = 10U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin11ToPintsel = 11U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin12ToPintsel = 12U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin13ToPintsel = 13U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin14ToPintsel = 14U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin15ToPintsel = 15U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin16ToPintsel = 16U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin17ToPintsel = 17U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin18ToPintsel = 18U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin19ToPintsel = 19U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin20ToPintsel = 20U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin21ToPintsel = 21U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin22ToPintsel = 22U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin23ToPintsel = 23U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin24ToPintsel = 24U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin25ToPintsel = 25U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin26ToPintsel = 26U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin27ToPintsel = 27U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin28ToPintsel = 28U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin29ToPintsel = 29U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin30ToPintsel = 30U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort8Pin31ToPintsel = 31U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin0ToPintsel = 32U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin1ToPintsel = 33U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin2ToPintsel = 34U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin3ToPintsel = 35U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin4ToPintsel = 36U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin5ToPintsel = 37U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin6ToPintsel = 38U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin7ToPintsel = 39U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin8ToPintsel = 40U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin9ToPintsel = 41U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin10ToPintsel = 42U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin11ToPintsel = 43U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin12ToPintsel = 44U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin13ToPintsel = 45U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin14ToPintsel = 46U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin15ToPintsel = 47U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin16ToPintsel = 48U + (PINTSEL_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioPort10Pin17ToPintsel = 49U + (PINTSEL_PMUX_ID << PMUX_SHIFT), /*!< DSP Interrupt. */ kINPUTMUX_Flexcomm17ToDspInterrupt = 0U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm18ToDspInterrupt = 1U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm19ToDspInterrupt = 2U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Flexcomm20ToDspInterrupt = 3U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Pmc1ToDspInterrupt = 4U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio8Irq0ToDspInterrupt = 7U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio8Irq1ToDspInterrupt = 8U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio9Irq0ToDspInterrupt = 9U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio9Irq1ToDspInterrupt = 10U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio10Irq0ToDspInterrupt = 11U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio10Irq1ToDspInterrupt = 12U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Wdt2ToDspInterrupt = 13U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Wdt3ToDspInterrupt = 14U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Mu0BToDspInterrupt = 15U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Mu3BToDspInterrupt = 16U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Utick1ToDspInterrupt = 17U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Mrt1ToDspInterrupt = 18U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_OsEventTimerToDspInterrupt = 19U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer5ToDspInterrupt = 20U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer6ToDspInterrupt = 21U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ctimer7ToDspInterrupt = 22U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc1AlarmToDspInterrupt = 23U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc1WakeupToDspInterrupt = 24U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c2ToDspInterrupt = 25U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_I3c3ToDspInterrupt = 26U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_MicfilToDspInterrupt = 27U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_HwvadToDspInterrupt = 28U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq0ToDspInterrupt = 34U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq1ToDspInterrupt = 35U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq2ToDspInterrupt = 36U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq3ToDspInterrupt = 37U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq4ToDspInterrupt = 38U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq5ToDspInterrupt = 39U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq6ToDspInterrupt = 40U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma2Irq7ToDspInterrupt = 41U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq0ToDspInterrupt = 42U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq1ToDspInterrupt = 43U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq2ToDspInterrupt = 44U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq3ToDspInterrupt = 45U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq4ToDspInterrupt = 46U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq5ToDspInterrupt = 47U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq6ToDspInterrupt = 48U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Dma3Irq7ToDspInterrupt = 49U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0ToDspInterrupt = 50U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1ToDspInterrupt = 51U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt2ToDspInterrupt = 52U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt3ToDspInterrupt = 53U + (DSP_INT_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3ToDspInterrupt = 54U + (DSP_INT_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM17 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm17 = 0U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm17 = 1U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm17 = 2U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm17 = 3U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct5Mat3ToFlexcomm17 = 7U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct6Mat3ToFlexcomm17 = 8U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct7Mat3ToFlexcomm17 = 9U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1BMatchToFlexcomm17 = 12U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm17 = 13U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm17 = 14U + (FLEXCOMM17_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM18 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm18 = 0U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm18 = 1U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm18 = 2U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm18 = 3U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct5Mat3ToFlexcomm18 = 7U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct6Mat3ToFlexcomm18 = 8U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct7Mat3ToFlexcomm18 = 9U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1BMatchToFlexcomm18 = 12U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm18 = 13U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm18 = 14U + (FLEXCOMM18_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM19 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm19 = 0U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm19 = 1U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm19 = 2U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm19 = 3U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct5Mat3ToFlexcomm19 = 7U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct6Mat3ToFlexcomm19 = 8U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct7Mat3ToFlexcomm19 = 9U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1BMatchToFlexcomm19 = 12U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm19 = 13U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm19 = 14U + (FLEXCOMM19_ITRIG_PMUX_ID << PMUX_SHIFT), /* FLEXCOMM20 TRIG input mux */ kINPUTMUX_CtInp0ToFlexcomm20 = 0U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToFlexcomm20 = 1U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToFlexcomm20 = 2U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToFlexcomm20 = 3U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct5Mat3ToFlexcomm20 = 7U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct6Mat3ToFlexcomm20 = 8U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct7Mat3ToFlexcomm20 = 9U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1BMatchToFlexcomm20 = 12U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToFlexcomm20 = 13U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Rtc0IrqToFlexcomm20 = 14U + (FLEXCOMM20_ITRIG_PMUX_ID << PMUX_SHIFT), /* ADC0 TRIG input mux */ kINPUTMUX_Gpio0Irq0ToAdc0 = 0U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio1Irq0ToAdc0 = 1U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio2Irq0ToAdc0 = 2U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio3Irq0ToAdc0 = 3U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio4Irq0ToAdc0 = 4U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio5Irq0ToAdc0 = 5U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio6Irq0ToAdc0 = 6U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio7Irq0ToAdc0 = 7U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio8Irq0ToAdc0 = 8U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio9Irq0ToAdc0 = 9U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Gpio10Irq0ToAdc0 = 10U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out4ToAdc0 = 11U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out5ToAdc0 = 12U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sct0Out9ToAdc0 = 13U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct0Mat3ToAdc0 = 14U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct1Mat3ToAdc0 = 15U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct2Mat3ToAdc0 = 16U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct3Mat3ToAdc0 = 17U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct4Mat3ToAdc0 = 18U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct5Mat3ToAdc0 = 19U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct6Mat3ToAdc0 = 20U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Ct7Mat3ToAdc0 = 21U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToAdc0 = 22U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cpu0TxevToAdc0 = 23U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cpu1TxevToAdc0 = 24U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_EzhvOutToAdc0 = 25U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt0BmatchToAdc0 = 26U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_GpioInt1BmatchToAdc0 = 27U + (ADC0_TRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier5 capture input mux. */ kINPUTMUX_CtInp0ToTimer5CaptureChannels = 0U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer5CaptureChannels = 1U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer5CaptureChannels = 2U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer5CaptureChannels = 3U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer5CaptureChannels = 4U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer5CaptureChannels = 5U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer5CaptureChannels = 6U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer5CaptureChannels = 7U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer5CaptureChannels = 8U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer5CaptureChannels = 9U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3TxSyncToTimer5CaptureChannels = 16U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3RxSyncToTimer5CaptureChannels = 17U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer5CaptureChannels = 18U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer5CaptureChannels = 19U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer5CaptureChannels = 20U + (CT32BIT5_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier6 capture input mux. */ kINPUTMUX_CtInp0ToTimer6CaptureChannels = 0U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer6CaptureChannels = 1U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer6CaptureChannels = 2U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer6CaptureChannels = 3U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer6CaptureChannels = 4U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer6CaptureChannels = 5U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer6CaptureChannels = 6U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer6CaptureChannels = 7U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer6CaptureChannels = 8U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer6CaptureChannels = 9U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3TxSyncToTimer6CaptureChannels = 16U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3RxSyncToTimer6CaptureChannels = 17U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer6CaptureChannels = 18U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer6CaptureChannels = 19U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer6CaptureChannels = 20U + (CT32BIT6_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier7 capture input mux. */ kINPUTMUX_CtInp0ToTimer7CaptureChannels = 0U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer7CaptureChannels = 1U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer7CaptureChannels = 2U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer7CaptureChannels = 3U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer7CaptureChannels = 4U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer7CaptureChannels = 5U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer7CaptureChannels = 6U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer7CaptureChannels = 7U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer7CaptureChannels = 8U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer7CaptureChannels = 9U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3TxSyncToTimer7CaptureChannels = 16U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3RxSyncToTimer7CaptureChannels = 17U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer7CaptureChannels = 18U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer7CaptureChannels = 19U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer7CaptureChannels = 20U + (CT32BIT7_CAP_PMUX_ID << PMUX_SHIFT), /*!< CTmier5 input trigger. */ kINPUTMUX_CtInp0ToTimer5Trigger = 0U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer5Trigger = 1U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer5Trigger = 2U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer5Trigger = 3U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer5Trigger = 4U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer5Trigger = 5U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer5Trigger = 6U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer5Trigger = 7U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer5Trigger = 8U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer5Trigger = 9U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3TxSyncToTimer5Trigger = 16U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3RxSyncToTimer5Trigger = 17U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer5Trigger = 18U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer5Trigger = 19U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer5Trigger = 20U + (CT32BIT5_TRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier6 input trigger. */ kINPUTMUX_CtInp0ToTimer6Trigger = 0U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer6Trigger = 1U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer6Trigger = 2U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer6Trigger = 3U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer6Trigger = 4U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer6Trigger = 5U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer6Trigger = 6U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer6Trigger = 7U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer6Trigger = 8U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer6Trigger = 9U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3TxSyncToTimer6Trigger = 16U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3RxSyncToTimer6Trigger = 17U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer6Trigger = 18U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer6Trigger = 19U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer6Trigger = 20U + (CT32BIT6_TRIG_PMUX_ID << PMUX_SHIFT), /*!< CTmier7 input trigger. */ kINPUTMUX_CtInp0ToTimer7Trigger = 0U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp1ToTimer7Trigger = 1U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp2ToTimer7Trigger = 2U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp3ToTimer7Trigger = 3U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp4ToTimer7Trigger = 4U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp5ToTimer7Trigger = 5U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp6ToTimer7Trigger = 6U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp7ToTimer7Trigger = 7U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp8ToTimer7Trigger = 8U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_CtInp9ToTimer7Trigger = 9U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3TxSyncToTimer7Trigger = 16U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Sai3RxSyncToTimer7Trigger = 17U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Cmp0OutToTimer7Trigger = 18U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp0ToTimer7Trigger = 19U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), kINPUTMUX_Adc0Tcomp1ToTimer7Trigger = 20U + (CT32BIT7_TRIG_PMUX_ID << PMUX_SHIFT), #endif } inputmux_connection_t; /*@}*/ #endif /* _FSL_INPUTMUX_CONNECTIONS_ */