/*
 * NOTE: Autogenerated file by gen_soc_headers.py
 * for MCXA156VPJ/signal_configuration.xml
 *
 * 
 */

#ifndef _ZEPHYR_DTS_BINDING_MCXA156VPJ_
#define _ZEPHYR_DTS_BINDING_MCXA156VPJ_

#define A15X_MUX(port, pin, mux)		\
	(((((port) - '0') & 0xF) << 28) |	\
	(((pin) & 0x3F) << 22) |		\
	(((mux) & 0xF) << 8))

#define P0_0 A15X_MUX('0',0,0) /* PT0_0 */
#define TMS_P0_0 A15X_MUX('0',0,1) /* PT0_0 */
#define SWDIO_P0_0 A15X_MUX('0',0,1) /* PT0_0 */
#define LPUART0_RTS_B_P0_0 A15X_MUX('0',0,2) /* PT0_0 */
#define LPSPI0_PCS0_P0_0 A15X_MUX('0',0,3) /* PT0_0 */
#define CT_INP0_P0_0 A15X_MUX('0',0,4) /* PT0_0 */
#define FLEXIO0_D0_P0_0 A15X_MUX('0',0,6) /* PT0_0 */
#define P0_1 A15X_MUX('0',1,0) /* PT0_1 */
#define TCLK_P0_1 A15X_MUX('0',1,1) /* PT0_1 */
#define SWCLK_P0_1 A15X_MUX('0',1,1) /* PT0_1 */
#define LPUART0_CTS_B_P0_1 A15X_MUX('0',1,2) /* PT0_1 */
#define LPSPI0_SDI_P0_1 A15X_MUX('0',1,3) /* PT0_1 */
#define CT_INP1_P0_1 A15X_MUX('0',1,4) /* PT0_1 */
#define FLEXIO0_D1_P0_1 A15X_MUX('0',1,6) /* PT0_1 */
#define P0_2 A15X_MUX('0',2,0) /* PT0_2 */
#define SWO_P0_2 A15X_MUX('0',2,1) /* PT0_2 */
#define TDO_P0_2 A15X_MUX('0',2,1) /* PT0_2 */
#define LPUART0_RXD_P0_2 A15X_MUX('0',2,2) /* PT0_2 */
#define LPSPI0_SCK_P0_2 A15X_MUX('0',2,3) /* PT0_2 */
#define CT0_MAT0_P0_2 A15X_MUX('0',2,4) /* PT0_2 */
#define UTICK_CAP0_P0_2 A15X_MUX('0',2,5) /* PT0_2 */
#define FLEXIO0_D2_P0_2 A15X_MUX('0',2,6) /* PT0_2 */
#define I3C0_PUR_P0_2 A15X_MUX('0',2,10) /* PT0_2 */
#define P0_3 A15X_MUX('0',3,0) /* PT0_3 */
#define CMP1_IN1_P0_3 A15X_MUX('0',3,0) /* PT0_3 */
#define ADC0_A14_P0_3 A15X_MUX('0',3,0) /* PT0_3 */
#define TDI_P0_3 A15X_MUX('0',3,1) /* PT0_3 */
#define LPUART0_TXD_P0_3 A15X_MUX('0',3,2) /* PT0_3 */
#define LPSPI0_SDO_P0_3 A15X_MUX('0',3,3) /* PT0_3 */
#define CT0_MAT1_P0_3 A15X_MUX('0',3,4) /* PT0_3 */
#define UTICK_CAP1_P0_3 A15X_MUX('0',3,5) /* PT0_3 */
#define FLEXIO0_D3_P0_3 A15X_MUX('0',3,6) /* PT0_3 */
#define CMP0_OUT_P0_3 A15X_MUX('0',3,8) /* PT0_3 */
#define ADC0_A15_P0_6 A15X_MUX('0',6,0) /* PT0_6 */
#define P0_6 A15X_MUX('0',6,0) /* PT0_6 */
#define ISPMODE_N_P0_6 A15X_MUX('0',6,1) /* PT0_6 */
#define LPI2C0_HREQ_P0_6 A15X_MUX('0',6,2) /* PT0_6 */
#define LPSPI0_PCS1_P0_6 A15X_MUX('0',6,3) /* PT0_6 */
#define CT_INP2_P0_6 A15X_MUX('0',6,4) /* PT0_6 */
#define FLEXIO0_D6_P0_6 A15X_MUX('0',6,6) /* PT0_6 */
#define WUU0_IN31_P0_6 A15X_MUX('0',6,8) /* PT0_6 */
#define CMP1_OUT_P0_6 A15X_MUX('0',6,8) /* PT0_6 */
#define CLKOUT_P0_6 A15X_MUX('0',6,12) /* PT0_6 */
#define WUU0_IN2_P0_16 A15X_MUX('0',16,0) /* PT0_16 */
#define P0_16 A15X_MUX('0',16,0) /* PT0_16 */
#define LPI2C0_SDA_P0_16 A15X_MUX('0',16,2) /* PT0_16 */
#define LPSPI0_PCS2_P0_16 A15X_MUX('0',16,3) /* PT0_16 */
#define CT0_MAT0_P0_16 A15X_MUX('0',16,4) /* PT0_16 */
#define UTICK_CAP2_P0_16 A15X_MUX('0',16,5) /* PT0_16 */
#define FLEXIO0_D0_P0_16 A15X_MUX('0',16,6) /* PT0_16 */
#define I3C0_SDA_P0_16 A15X_MUX('0',16,10) /* PT0_16 */
#define P0_17 A15X_MUX('0',17,0) /* PT0_17 */
#define LPI2C0_SCL_P0_17 A15X_MUX('0',17,2) /* PT0_17 */
#define LPSPI0_PCS3_P0_17 A15X_MUX('0',17,3) /* PT0_17 */
#define CT0_MAT1_P0_17 A15X_MUX('0',17,4) /* PT0_17 */
#define UTICK_CAP3_P0_17 A15X_MUX('0',17,5) /* PT0_17 */
#define FLEXIO0_D1_P0_17 A15X_MUX('0',17,6) /* PT0_17 */
#define I3C0_SCL_P0_17 A15X_MUX('0',17,10) /* PT0_17 */
#define P0_18 A15X_MUX('0',18,0) /* PT0_18 */
#define ADC0_A8_P0_18 A15X_MUX('0',18,0) /* PT0_18 */
#define LPI2C0_SCLS_P0_18 A15X_MUX('0',18,2) /* PT0_18 */
#define CT0_MAT2_P0_18 A15X_MUX('0',18,4) /* PT0_18 */
#define FLEXIO0_D2_P0_18 A15X_MUX('0',18,6) /* PT0_18 */
#define CMP0_OUT_P0_18 A15X_MUX('0',18,8) /* PT0_18 */
#define P0_19 A15X_MUX('0',19,0) /* PT0_19 */
#define ADC0_A9_P0_19 A15X_MUX('0',19,0) /* PT0_19 */
#define LPI2C0_SDAS_P0_19 A15X_MUX('0',19,2) /* PT0_19 */
#define CT0_MAT3_P0_19 A15X_MUX('0',19,4) /* PT0_19 */
#define FLEXIO0_D3_P0_19 A15X_MUX('0',19,6) /* PT0_19 */
#define WUU0_IN31_P0_19 A15X_MUX('0',19,8) /* PT0_19 */
#define CMP1_OUT_P0_19 A15X_MUX('0',19,8) /* PT0_19 */
#define P0_20 A15X_MUX('0',20,0) /* PT0_20 */
#define ADC0_A10_P0_20 A15X_MUX('0',20,0) /* PT0_20 */
#define LPUART0_RXD_P0_20 A15X_MUX('0',20,3) /* PT0_20 */
#define CT_INP0_P0_20 A15X_MUX('0',20,4) /* PT0_20 */
#define FLEXIO0_D4_P0_20 A15X_MUX('0',20,6) /* PT0_20 */
#define P0_21 A15X_MUX('0',21,0) /* PT0_21 */
#define ADC0_A11_P0_21 A15X_MUX('0',21,0) /* PT0_21 */
#define LPUART0_TXD_P0_21 A15X_MUX('0',21,3) /* PT0_21 */
#define CT_INP1_P0_21 A15X_MUX('0',21,4) /* PT0_21 */
#define FLEXIO0_D5_P0_21 A15X_MUX('0',21,6) /* PT0_21 */
#define P0_22 A15X_MUX('0',22,0) /* PT0_22 */
#define ADC0_A12_P0_22 A15X_MUX('0',22,0) /* PT0_22 */
#define LPUART0_RTS_B_P0_22 A15X_MUX('0',22,3) /* PT0_22 */
#define CT_INP2_P0_22 A15X_MUX('0',22,4) /* PT0_22 */
#define CT0_MAT0_P0_22 A15X_MUX('0',22,5) /* PT0_22 */
#define FLEXIO0_D6_P0_22 A15X_MUX('0',22,6) /* PT0_22 */
#define ADC0_A13_P0_23 A15X_MUX('0',23,0) /* PT0_23 */
#define P0_23 A15X_MUX('0',23,0) /* PT0_23 */
#define LPUART0_CTS_B_P0_23 A15X_MUX('0',23,3) /* PT0_23 */
#define CT_INP3_P0_23 A15X_MUX('0',23,4) /* PT0_23 */
#define CT0_MAT1_P0_23 A15X_MUX('0',23,5) /* PT0_23 */
#define FLEXIO0_D7_P0_23 A15X_MUX('0',23,6) /* PT0_23 */
#define P1_0 A15X_MUX('1',0,0) /* PT1_0 */
#define CMP0_IN3_P1_0 A15X_MUX('1',0,0) /* PT1_0 */
#define LPTMR0_ALT3_P1_0 A15X_MUX('1',0,0) /* PT1_0 */
#define ADC0_A16_P1_0 A15X_MUX('1',0,0) /* PT1_0 */
#define WUU0_IN6_P1_0 A15X_MUX('1',0,0) /* PT1_0 */
#define TRIG_IN0_P1_0 A15X_MUX('1',0,1) /* PT1_0 */
#define LPSPI0_SDO_P1_0 A15X_MUX('1',0,2) /* PT1_0 */
#define LPI2C1_SDA_P1_0 A15X_MUX('1',0,3) /* PT1_0 */
#define CT_INP4_P1_0 A15X_MUX('1',0,4) /* PT1_0 */
#define CT0_MAT2_P1_0 A15X_MUX('1',0,5) /* PT1_0 */
#define FLEXIO0_D8_P1_0 A15X_MUX('1',0,6) /* PT1_0 */
#define CMP1_IN3_P1_1 A15X_MUX('1',1,0) /* PT1_1 */
#define ADC0_A17_P1_1 A15X_MUX('1',1,0) /* PT1_1 */
#define P1_1 A15X_MUX('1',1,0) /* PT1_1 */
#define TRIG_IN1_P1_1 A15X_MUX('1',1,1) /* PT1_1 */
#define LPSPI0_SCK_P1_1 A15X_MUX('1',1,2) /* PT1_1 */
#define LPI2C1_SCL_P1_1 A15X_MUX('1',1,3) /* PT1_1 */
#define CT_INP5_P1_1 A15X_MUX('1',1,4) /* PT1_1 */
#define CT0_MAT3_P1_1 A15X_MUX('1',1,5) /* PT1_1 */
#define FLEXIO0_D9_P1_1 A15X_MUX('1',1,6) /* PT1_1 */
#define P1_2 A15X_MUX('1',2,0) /* PT1_2 */
#define ADC0_A18_P1_2 A15X_MUX('1',2,0) /* PT1_2 */
#define TRIG_OUT0_P1_2 A15X_MUX('1',2,1) /* PT1_2 */
#define LPSPI0_SDI_P1_2 A15X_MUX('1',2,2) /* PT1_2 */
#define LPI2C1_SDAS_P1_2 A15X_MUX('1',2,3) /* PT1_2 */
#define CT1_MAT0_P1_2 A15X_MUX('1',2,4) /* PT1_2 */
#define CT_INP0_P1_2 A15X_MUX('1',2,5) /* PT1_2 */
#define FLEXIO0_D10_P1_2 A15X_MUX('1',2,6) /* PT1_2 */
#define CAN0_TXD_P1_2 A15X_MUX('1',2,11) /* PT1_2 */
#define WUU0_IN7_P1_3 A15X_MUX('1',3,0) /* PT1_3 */
#define CMP0_IN1_P1_3 A15X_MUX('1',3,0) /* PT1_3 */
#define ADC0_A19_P1_3 A15X_MUX('1',3,0) /* PT1_3 */
#define P1_3 A15X_MUX('1',3,0) /* PT1_3 */
#define TRIG_OUT1_P1_3 A15X_MUX('1',3,1) /* PT1_3 */
#define LPSPI0_PCS0_P1_3 A15X_MUX('1',3,2) /* PT1_3 */
#define LPI2C1_SCLS_P1_3 A15X_MUX('1',3,3) /* PT1_3 */
#define CT1_MAT1_P1_3 A15X_MUX('1',3,4) /* PT1_3 */
#define CT_INP1_P1_3 A15X_MUX('1',3,5) /* PT1_3 */
#define FLEXIO0_D11_P1_3 A15X_MUX('1',3,6) /* PT1_3 */
#define CAN0_RXD_P1_3 A15X_MUX('1',3,11) /* PT1_3 */
#define ADC0_A20_P1_4 A15X_MUX('1',4,0) /* PT1_4 */
#define P1_4 A15X_MUX('1',4,0) /* PT1_4 */
#define CMP0_IN2_P1_4 A15X_MUX('1',4,0) /* PT1_4 */
#define WUU0_IN8_P1_4 A15X_MUX('1',4,0) /* PT1_4 */
#define FREQME_CLK_IN0_P1_4 A15X_MUX('1',4,1) /* PT1_4 */
#define LPSPI0_PCS3_P1_4 A15X_MUX('1',4,2) /* PT1_4 */
#define LPUART2_RXD_P1_4 A15X_MUX('1',4,3) /* PT1_4 */
#define CT1_MAT2_P1_4 A15X_MUX('1',4,4) /* PT1_4 */
#define FLEXIO0_D12_P1_4 A15X_MUX('1',4,6) /* PT1_4 */
#define CMP1_IN2_P1_5 A15X_MUX('1',5,0) /* PT1_5 */
#define P1_5 A15X_MUX('1',5,0) /* PT1_5 */
#define ADC0_A21_P1_5 A15X_MUX('1',5,0) /* PT1_5 */
#define FREQME_CLK_IN1_P1_5 A15X_MUX('1',5,1) /* PT1_5 */
#define LPSPI0_PCS2_P1_5 A15X_MUX('1',5,2) /* PT1_5 */
#define LPUART2_TXD_P1_5 A15X_MUX('1',5,3) /* PT1_5 */
#define CT1_MAT3_P1_5 A15X_MUX('1',5,4) /* PT1_5 */
#define FLEXIO0_D13_P1_5 A15X_MUX('1',5,6) /* PT1_5 */
#define P1_6 A15X_MUX('1',6,0) /* PT1_6 */
#define ADC0_A22_P1_6 A15X_MUX('1',6,0) /* PT1_6 */
#define TRIG_IN2_P1_6 A15X_MUX('1',6,1) /* PT1_6 */
#define LPSPI0_PCS1_P1_6 A15X_MUX('1',6,2) /* PT1_6 */
#define LPUART2_RTS_B_P1_6 A15X_MUX('1',6,3) /* PT1_6 */
#define CT_INP6_P1_6 A15X_MUX('1',6,4) /* PT1_6 */
#define CT4_MAT0_P1_6 A15X_MUX('1',6,5) /* PT1_6 */
#define FLEXIO0_D14_P1_6 A15X_MUX('1',6,6) /* PT1_6 */
#define CAN0_TXD_P1_6 A15X_MUX('1',6,11) /* PT1_6 */
#define WUU0_IN9_P1_7 A15X_MUX('1',7,0) /* PT1_7 */
#define P1_7 A15X_MUX('1',7,0) /* PT1_7 */
#define ADC0_A23_P1_7 A15X_MUX('1',7,0) /* PT1_7 */
#define TRIG_OUT2_P1_7 A15X_MUX('1',7,1) /* PT1_7 */
#define LPUART2_CTS_B_P1_7 A15X_MUX('1',7,3) /* PT1_7 */
#define CT_INP7_P1_7 A15X_MUX('1',7,4) /* PT1_7 */
#define CT4_MAT1_P1_7 A15X_MUX('1',7,5) /* PT1_7 */
#define FLEXIO0_D15_P1_7 A15X_MUX('1',7,6) /* PT1_7 */
#define CAN0_RXD_P1_7 A15X_MUX('1',7,11) /* PT1_7 */
#define P1_8 A15X_MUX('1',8,0) /* PT1_8 */
#define WUU0_IN10_P1_8 A15X_MUX('1',8,0) /* PT1_8 */
#define FREQME_CLK_IN0_P1_8 A15X_MUX('1',8,1) /* PT1_8 */
#define LPUART1_RXD_P1_8 A15X_MUX('1',8,2) /* PT1_8 */
#define LPI2C2_SDA_P1_8 A15X_MUX('1',8,3) /* PT1_8 */
#define CT_INP8_P1_8 A15X_MUX('1',8,4) /* PT1_8 */
#define CT0_MAT2_P1_8 A15X_MUX('1',8,5) /* PT1_8 */
#define FLEXIO0_D16_P1_8 A15X_MUX('1',8,6) /* PT1_8 */
#define I3C0_SDA_P1_8 A15X_MUX('1',8,10) /* PT1_8 */
#define P1_9 A15X_MUX('1',9,0) /* PT1_9 */
#define FREQME_CLK_IN1_P1_9 A15X_MUX('1',9,1) /* PT1_9 */
#define LPUART1_TXD_P1_9 A15X_MUX('1',9,2) /* PT1_9 */
#define LPI2C2_SCL_P1_9 A15X_MUX('1',9,3) /* PT1_9 */
#define CT_INP9_P1_9 A15X_MUX('1',9,4) /* PT1_9 */
#define CT0_MAT3_P1_9 A15X_MUX('1',9,5) /* PT1_9 */
#define FLEXIO0_D17_P1_9 A15X_MUX('1',9,6) /* PT1_9 */
#define I3C0_SCL_P1_9 A15X_MUX('1',9,10) /* PT1_9 */
#define ADC1_A8_P1_10 A15X_MUX('1',10,0) /* PT1_10 */
#define P1_10 A15X_MUX('1',10,0) /* PT1_10 */
#define LPUART1_RTS_B_P1_10 A15X_MUX('1',10,2) /* PT1_10 */
#define LPI2C2_SDAS_P1_10 A15X_MUX('1',10,3) /* PT1_10 */
#define CT2_MAT0_P1_10 A15X_MUX('1',10,4) /* PT1_10 */
#define FLEXIO0_D18_P1_10 A15X_MUX('1',10,6) /* PT1_10 */
#define CAN0_TXD_P1_10 A15X_MUX('1',10,11) /* PT1_10 */
#define P1_11 A15X_MUX('1',11,0) /* PT1_11 */
#define WUU0_IN11_P1_11 A15X_MUX('1',11,0) /* PT1_11 */
#define ADC1_A9_P1_11 A15X_MUX('1',11,0) /* PT1_11 */
#define TRIG_OUT2_P1_11 A15X_MUX('1',11,1) /* PT1_11 */
#define LPUART1_CTS_B_P1_11 A15X_MUX('1',11,2) /* PT1_11 */
#define LPI2C2_SCLS_P1_11 A15X_MUX('1',11,3) /* PT1_11 */
#define CT2_MAT1_P1_11 A15X_MUX('1',11,4) /* PT1_11 */
#define FLEXIO0_D19_P1_11 A15X_MUX('1',11,6) /* PT1_11 */
#define I3C0_PUR_P1_11 A15X_MUX('1',11,10) /* PT1_11 */
#define CAN0_RXD_P1_11 A15X_MUX('1',11,11) /* PT1_11 */
#define ADC1_A10_P1_12 A15X_MUX('1',12,0) /* PT1_12 */
#define WUU0_IN12_P1_12 A15X_MUX('1',12,0) /* PT1_12 */
#define P1_12 A15X_MUX('1',12,0) /* PT1_12 */
#define LPI2C1_SDA_P1_12 A15X_MUX('1',12,2) /* PT1_12 */
#define LPUART2_RXD_P1_12 A15X_MUX('1',12,3) /* PT1_12 */
#define CT2_MAT2_P1_12 A15X_MUX('1',12,4) /* PT1_12 */
#define FLEXIO0_D20_P1_12 A15X_MUX('1',12,6) /* PT1_12 */
#define CAN0_RXD_P1_12 A15X_MUX('1',12,11) /* PT1_12 */
#define ADC1_A11_P1_13 A15X_MUX('1',13,0) /* PT1_13 */
#define P1_13 A15X_MUX('1',13,0) /* PT1_13 */
#define TRIG_IN3_P1_13 A15X_MUX('1',13,1) /* PT1_13 */
#define LPI2C1_SCL_P1_13 A15X_MUX('1',13,2) /* PT1_13 */
#define LPUART2_TXD_P1_13 A15X_MUX('1',13,3) /* PT1_13 */
#define CT2_MAT3_P1_13 A15X_MUX('1',13,4) /* PT1_13 */
#define FLEXIO0_D21_P1_13 A15X_MUX('1',13,6) /* PT1_13 */
#define CAN0_TXD_P1_13 A15X_MUX('1',13,11) /* PT1_13 */
#define P1_14 A15X_MUX('1',14,0) /* PT1_14 */
#define ADC1_A12_P1_14 A15X_MUX('1',14,0) /* PT1_14 */
#define LPI2C1_SCLS_P1_14 A15X_MUX('1',14,2) /* PT1_14 */
#define LPUART2_RTS_B_P1_14 A15X_MUX('1',14,3) /* PT1_14 */
#define CT_INP10_P1_14 A15X_MUX('1',14,4) /* PT1_14 */
#define CT3_MAT0_P1_14 A15X_MUX('1',14,5) /* PT1_14 */
#define FLEXIO0_D22_P1_14 A15X_MUX('1',14,6) /* PT1_14 */
#define P1_15 A15X_MUX('1',15,0) /* PT1_15 */
#define ADC1_A13_P1_15 A15X_MUX('1',15,0) /* PT1_15 */
#define LPI2C1_SDAS_P1_15 A15X_MUX('1',15,2) /* PT1_15 */
#define LPUART2_CTS_B_P1_15 A15X_MUX('1',15,3) /* PT1_15 */
#define CT_INP11_P1_15 A15X_MUX('1',15,4) /* PT1_15 */
#define CT3_MAT1_P1_15 A15X_MUX('1',15,5) /* PT1_15 */
#define FLEXIO0_D23_P1_15 A15X_MUX('1',15,6) /* PT1_15 */
#define P1_29 A15X_MUX('1',29,0) /* PT1_29 */
#define RESET_B_P1_29 A15X_MUX('1',29,1) /* PT1_29 */
#define SPC_LPREQ_P1_29 A15X_MUX('1',29,2) /* PT1_29 */
#define P1_30 A15X_MUX('1',30,0) /* PT1_30 */
#define XTAL48M_P1_30 A15X_MUX('1',30,0) /* PT1_30 */
#define TRIG_OUT3_P1_30 A15X_MUX('1',30,1) /* PT1_30 */
#define LPI2C0_SDA_P1_30 A15X_MUX('1',30,3) /* PT1_30 */
#define CT_INP16_P1_30 A15X_MUX('1',30,4) /* PT1_30 */
#define FLEXIO0_D30_P1_30 A15X_MUX('1',30,6) /* PT1_30 */
#define I3C0_SDA_P1_30 A15X_MUX('1',30,10) /* PT1_30 */
#define EXTAL48M_P1_31 A15X_MUX('1',31,0) /* PT1_31 */
#define P1_31 A15X_MUX('1',31,0) /* PT1_31 */
#define TRIG_IN4_P1_31 A15X_MUX('1',31,1) /* PT1_31 */
#define LPI2C0_SCL_P1_31 A15X_MUX('1',31,3) /* PT1_31 */
#define CT_INP17_P1_31 A15X_MUX('1',31,4) /* PT1_31 */
#define FLEXIO0_D31_P1_31 A15X_MUX('1',31,6) /* PT1_31 */
#define I3C0_SCL_P1_31 A15X_MUX('1',31,10) /* PT1_31 */
#define P2_0 A15X_MUX('2',0,0) /* PT2_0 */
#define ADC0_A0_P2_0 A15X_MUX('2',0,0) /* PT2_0 */
#define WUU0_IN18_P2_0 A15X_MUX('2',0,0) /* PT2_0 */
#define TRIG_IN6_P2_0 A15X_MUX('2',0,1) /* PT2_0 */
#define LPUART0_RXD_P2_0 A15X_MUX('2',0,2) /* PT2_0 */
#define LPUART4_CTS_B_P2_0 A15X_MUX('2',0,3) /* PT2_0 */
#define CT_INP16_P2_0 A15X_MUX('2',0,4) /* PT2_0 */
#define CT2_MAT0_P2_0 A15X_MUX('2',0,5) /* PT2_0 */
#define FLEXIO0_D8_P2_0 A15X_MUX('2',0,6) /* PT2_0 */
#define P2_1 A15X_MUX('2',1,0) /* PT2_1 */
#define ADC0_A1_P2_1 A15X_MUX('2',1,0) /* PT2_1 */
#define TRIG_IN7_P2_1 A15X_MUX('2',1,1) /* PT2_1 */
#define LPUART0_TXD_P2_1 A15X_MUX('2',1,2) /* PT2_1 */
#define LPUART4_RTS_B_P2_1 A15X_MUX('2',1,3) /* PT2_1 */
#define CT_INP17_P2_1 A15X_MUX('2',1,4) /* PT2_1 */
#define CT2_MAT1_P2_1 A15X_MUX('2',1,5) /* PT2_1 */
#define FLEXIO0_D9_P2_1 A15X_MUX('2',1,6) /* PT2_1 */
#define P2_2 A15X_MUX('2',2,0) /* PT2_2 */
#define CMP0_IN0_P2_2 A15X_MUX('2',2,0) /* PT2_2 */
#define DAC0_OUT_P2_2 A15X_MUX('2',2,0) /* PT2_2 */
#define ADC0_A4_P2_2 A15X_MUX('2',2,0) /* PT2_2 */
#define TRIG_IN6_P2_2 A15X_MUX('2',2,1) /* PT2_2 */
#define LPUART0_RTS_B_P2_2 A15X_MUX('2',2,2) /* PT2_2 */
#define LPUART2_TXD_P2_2 A15X_MUX('2',2,3) /* PT2_2 */
#define CT_INP12_P2_2 A15X_MUX('2',2,4) /* PT2_2 */
#define CT2_MAT2_P2_2 A15X_MUX('2',2,5) /* PT2_2 */
#define FLEXIO0_D10_P2_2 A15X_MUX('2',2,6) /* PT2_2 */
#define P2_3 A15X_MUX('2',3,0) /* PT2_3 */
#define WUU0_IN19_P2_3 A15X_MUX('2',3,0) /* PT2_3 */
#define CMP1_IN0_P2_3 A15X_MUX('2',3,0) /* PT2_3 */
#define ADC1_A4_P2_3 A15X_MUX('2',3,0) /* PT2_3 */
#define TRIG_IN7_P2_3 A15X_MUX('2',3,1) /* PT2_3 */
#define LPUART0_CTS_B_P2_3 A15X_MUX('2',3,2) /* PT2_3 */
#define LPUART2_RXD_P2_3 A15X_MUX('2',3,3) /* PT2_3 */
#define CT_INP13_P2_3 A15X_MUX('2',3,4) /* PT2_3 */
#define CT2_MAT3_P2_3 A15X_MUX('2',3,5) /* PT2_3 */
#define FLEXIO0_D11_P2_3 A15X_MUX('2',3,6) /* PT2_3 */
#define ADC1_A0_P2_4 A15X_MUX('2',4,0) /* PT2_4 */
#define P2_4 A15X_MUX('2',4,0) /* PT2_4 */
#define LPUART2_CTS_B_P2_4 A15X_MUX('2',4,3) /* PT2_4 */
#define CT_INP14_P2_4 A15X_MUX('2',4,4) /* PT2_4 */
#define CT1_MAT0_P2_4 A15X_MUX('2',4,5) /* PT2_4 */
#define FLEXIO0_D12_P2_4 A15X_MUX('2',4,6) /* PT2_4 */
#define ADC1_A1_P2_5 A15X_MUX('2',5,0) /* PT2_5 */
#define P2_5 A15X_MUX('2',5,0) /* PT2_5 */
#define LPUART2_RTS_B_P2_5 A15X_MUX('2',5,3) /* PT2_5 */
#define CT_INP15_P2_5 A15X_MUX('2',5,4) /* PT2_5 */
#define CT1_MAT1_P2_5 A15X_MUX('2',5,5) /* PT2_5 */
#define FLEXIO0_D13_P2_5 A15X_MUX('2',5,6) /* PT2_5 */
#define P2_6 A15X_MUX('2',6,0) /* PT2_6 */
#define ADC1_A3_P2_6 A15X_MUX('2',6,0) /* PT2_6 */
#define TRIG_OUT4_P2_6 A15X_MUX('2',6,1) /* PT2_6 */
#define LPSPI1_PCS1_P2_6 A15X_MUX('2',6,2) /* PT2_6 */
#define LPUART4_RXD_P2_6 A15X_MUX('2',6,3) /* PT2_6 */
#define CT_INP18_P2_6 A15X_MUX('2',6,4) /* PT2_6 */
#define CT1_MAT2_P2_6 A15X_MUX('2',6,5) /* PT2_6 */
#define FLEXIO0_D14_P2_6 A15X_MUX('2',6,6) /* PT2_6 */
#define ADC0_A7_P2_7 A15X_MUX('2',7,0) /* PT2_7 */
#define P2_7 A15X_MUX('2',7,0) /* PT2_7 */
#define VREFI_P2_7 A15X_MUX('2',7,0) /* PT2_7 */
#define ADC1_A7_P2_7 A15X_MUX('2',7,0) /* PT2_7 */
#define TRIG_IN5_P2_7 A15X_MUX('2',7,1) /* PT2_7 */
#define LPUART4_TXD_P2_7 A15X_MUX('2',7,3) /* PT2_7 */
#define CT_INP19_P2_7 A15X_MUX('2',7,4) /* PT2_7 */
#define CT1_MAT3_P2_7 A15X_MUX('2',7,5) /* PT2_7 */
#define FLEXIO0_D15_P2_7 A15X_MUX('2',7,6) /* PT2_7 */
#define P2_10 A15X_MUX('2',10,0) /* PT2_10 */
#define TRIG_OUT5_P2_10 A15X_MUX('2',10,1) /* PT2_10 */
#define LPUART2_TXD_P2_10 A15X_MUX('2',10,3) /* PT2_10 */
#define CT3_MAT2_P2_10 A15X_MUX('2',10,4) /* PT2_10 */
#define FLEXIO0_D18_P2_10 A15X_MUX('2',10,6) /* PT2_10 */
#define P2_11 A15X_MUX('2',11,0) /* PT2_11 */
#define TRIG_IN4_P2_11 A15X_MUX('2',11,1) /* PT2_11 */
#define LPUART2_RXD_P2_11 A15X_MUX('2',11,3) /* PT2_11 */
#define CT3_MAT3_P2_11 A15X_MUX('2',11,4) /* PT2_11 */
#define FLEXIO0_D19_P2_11 A15X_MUX('2',11,6) /* PT2_11 */
#define ADC0_A5_P2_12 A15X_MUX('2',12,0) /* PT2_12 */
#define OPAMP0_INP0_P2_12 A15X_MUX('2',12,0) /* PT2_12 */
#define P2_12 A15X_MUX('2',12,0) /* PT2_12 */
#define WUU0_IN20_P2_12 A15X_MUX('2',12,0) /* PT2_12 */
#define USB0_VBUS_DET_P2_12 A15X_MUX('2',12,1) /* PT2_12 */
#define LPSPI1_SCK_P2_12 A15X_MUX('2',12,2) /* PT2_12 */
#define LPUART1_RXD_P2_12 A15X_MUX('2',12,3) /* PT2_12 */
#define CT4_MAT0_P2_12 A15X_MUX('2',12,4) /* PT2_12 */
#define CT0_MAT0_P2_12 A15X_MUX('2',12,5) /* PT2_12 */
#define FLEXIO0_D20_P2_12 A15X_MUX('2',12,6) /* PT2_12 */
#define CAN0_RXD_P2_12 A15X_MUX('2',12,11) /* PT2_12 */
#define OPAMP0_INN_P2_13 A15X_MUX('2',13,0) /* PT2_13 */
#define OPAMP0_INP1_P2_13 A15X_MUX('2',13,0) /* PT2_13 */
#define ADC1_A5_P2_13 A15X_MUX('2',13,0) /* PT2_13 */
#define P2_13 A15X_MUX('2',13,0) /* PT2_13 */
#define TRIG_IN8_P2_13 A15X_MUX('2',13,1) /* PT2_13 */
#define LPSPI1_SDO_P2_13 A15X_MUX('2',13,2) /* PT2_13 */
#define LPUART1_TXD_P2_13 A15X_MUX('2',13,3) /* PT2_13 */
#define CT4_MAT1_P2_13 A15X_MUX('2',13,4) /* PT2_13 */
#define CT0_MAT1_P2_13 A15X_MUX('2',13,5) /* PT2_13 */
#define FLEXIO0_D21_P2_13 A15X_MUX('2',13,6) /* PT2_13 */
#define CAN0_TXD_P2_13 A15X_MUX('2',13,11) /* PT2_13 */
#define ADC0_A2_P2_15 A15X_MUX('2',15,0) /* PT2_15 */
#define P2_15 A15X_MUX('2',15,0) /* PT2_15 */
#define OPAMP0_OUT_P2_15 A15X_MUX('2',15,0) /* PT2_15 */
#define TRIG_OUT4_P2_15 A15X_MUX('2',15,1) /* PT2_15 */
#define LPSPI1_SDI_P2_15 A15X_MUX('2',15,2) /* PT2_15 */
#define LPUART1_RTS_B_P2_15 A15X_MUX('2',15,3) /* PT2_15 */
#define CT4_MAT3_P2_15 A15X_MUX('2',15,4) /* PT2_15 */
#define CT0_MAT2_P2_15 A15X_MUX('2',15,5) /* PT2_15 */
#define FLEXIO0_D23_P2_15 A15X_MUX('2',15,6) /* PT2_15 */
#define P2_16 A15X_MUX('2',16,0) /* PT2_16 */
#define ADC0_A6_P2_16 A15X_MUX('2',16,0) /* PT2_16 */
#define LPSPI1_SDI_P2_16 A15X_MUX('2',16,2) /* PT2_16 */
#define LPUART1_RTS_B_P2_16 A15X_MUX('2',16,3) /* PT2_16 */
#define CT3_MAT0_P2_16 A15X_MUX('2',16,4) /* PT2_16 */
#define CT0_MAT2_P2_16 A15X_MUX('2',16,5) /* PT2_16 */
#define FLEXIO0_D24_P2_16 A15X_MUX('2',16,6) /* PT2_16 */
#define ADC1_A6_P2_17 A15X_MUX('2',17,0) /* PT2_17 */
#define P2_17 A15X_MUX('2',17,0) /* PT2_17 */
#define TRIG_IN9_P2_17 A15X_MUX('2',17,1) /* PT2_17 */
#define LPSPI1_PCS0_P2_17 A15X_MUX('2',17,2) /* PT2_17 */
#define LPUART1_CTS_B_P2_17 A15X_MUX('2',17,3) /* PT2_17 */
#define CT3_MAT1_P2_17 A15X_MUX('2',17,4) /* PT2_17 */
#define CT0_MAT3_P2_17 A15X_MUX('2',17,5) /* PT2_17 */
#define FLEXIO0_D25_P2_17 A15X_MUX('2',17,6) /* PT2_17 */
#define P2_19 A15X_MUX('2',19,0) /* PT2_19 */
#define ADC1_A2_P2_19 A15X_MUX('2',19,0) /* PT2_19 */
#define TRIG_OUT5_P2_19 A15X_MUX('2',19,1) /* PT2_19 */
#define CT3_MAT3_P2_19 A15X_MUX('2',19,4) /* PT2_19 */
#define FLEXIO0_D27_P2_19 A15X_MUX('2',19,6) /* PT2_19 */
#define P2_20 A15X_MUX('2',20,0) /* PT2_20 */
#define TRIG_IN8_P2_20 A15X_MUX('2',20,1) /* PT2_20 */
#define LPSPI1_PCS2_P2_20 A15X_MUX('2',20,2) /* PT2_20 */
#define CT2_MAT0_P2_20 A15X_MUX('2',20,4) /* PT2_20 */
#define FLEXIO0_D28_P2_20 A15X_MUX('2',20,6) /* PT2_20 */
#define P2_21 A15X_MUX('2',21,0) /* PT2_21 */
#define TRIG_IN9_P2_21 A15X_MUX('2',21,1) /* PT2_21 */
#define LPSPI1_PCS3_P2_21 A15X_MUX('2',21,2) /* PT2_21 */
#define CT2_MAT1_P2_21 A15X_MUX('2',21,4) /* PT2_21 */
#define FLEXIO0_D29_P2_21 A15X_MUX('2',21,6) /* PT2_21 */
#define P2_23 A15X_MUX('2',23,0) /* PT2_23 */
#define TRIG_OUT5_P2_23 A15X_MUX('2',23,1) /* PT2_23 */
#define CT2_MAT3_P2_23 A15X_MUX('2',23,4) /* PT2_23 */
#define FLEXIO0_D31_P2_23 A15X_MUX('2',23,6) /* PT2_23 */
#define WUU0_IN22_P3_0 A15X_MUX('3',0,0) /* PT3_0 */
#define P3_0 A15X_MUX('3',0,0) /* PT3_0 */
#define TRIG_IN0_P3_0 A15X_MUX('3',0,1) /* PT3_0 */
#define LPUART3_RXD_P3_0 A15X_MUX('3',0,3) /* PT3_0 */
#define CT_INP16_P3_0 A15X_MUX('3',0,4) /* PT3_0 */
#define PWM0_A0_P3_0 A15X_MUX('3',0,5) /* PT3_0 */
#define FLEXIO0_D8_P3_0 A15X_MUX('3',0,6) /* PT3_0 */
#define PWM1_X0_P3_0 A15X_MUX('3',0,7) /* PT3_0 */
#define P3_1 A15X_MUX('3',1,0) /* PT3_1 */
#define TRIG_IN1_P3_1 A15X_MUX('3',1,1) /* PT3_1 */
#define LPUART3_TXD_P3_1 A15X_MUX('3',1,3) /* PT3_1 */
#define CT_INP17_P3_1 A15X_MUX('3',1,4) /* PT3_1 */
#define PWM0_B0_P3_1 A15X_MUX('3',1,5) /* PT3_1 */
#define FLEXIO0_D9_P3_1 A15X_MUX('3',1,6) /* PT3_1 */
#define PWM1_X1_P3_1 A15X_MUX('3',1,7) /* PT3_1 */
#define FREQME_CLK_OUT0_P3_1 A15X_MUX('3',1,12) /* PT3_1 */
#define P3_2 A15X_MUX('3',2,0) /* PT3_2 */
#define LPSPI1_PCS1_P3_2 A15X_MUX('3',2,2) /* PT3_2 */
#define CT4_MAT0_P3_2 A15X_MUX('3',2,4) /* PT3_2 */
#define FLEXIO0_D10_P3_2 A15X_MUX('3',2,6) /* PT3_2 */
#define PWM1_X2_P3_2 A15X_MUX('3',2,7) /* PT3_2 */
#define P3_6 A15X_MUX('3',6,0) /* PT3_6 */
#define CLKOUT_P3_6 A15X_MUX('3',6,1) /* PT3_6 */
#define LPSPI1_PCS3_P3_6 A15X_MUX('3',6,2) /* PT3_6 */
#define LPUART3_RTS_B_P3_6 A15X_MUX('3',6,3) /* PT3_6 */
#define CT4_MAT2_P3_6 A15X_MUX('3',6,4) /* PT3_6 */
#define PWM0_A0_P3_6 A15X_MUX('3',6,5) /* PT3_6 */
#define FLEXIO0_D14_P3_6 A15X_MUX('3',6,6) /* PT3_6 */
#define PWM1_A0_P3_6 A15X_MUX('3',6,7) /* PT3_6 */
#define FREQME_CLK_OUT1_P3_6 A15X_MUX('3',6,12) /* PT3_6 */
#define P3_7 A15X_MUX('3',7,0) /* PT3_7 */
#define TRIG_IN2_P3_7 A15X_MUX('3',7,1) /* PT3_7 */
#define LPSPI1_PCS2_P3_7 A15X_MUX('3',7,2) /* PT3_7 */
#define LPUART3_CTS_B_P3_7 A15X_MUX('3',7,3) /* PT3_7 */
#define CT4_MAT3_P3_7 A15X_MUX('3',7,4) /* PT3_7 */
#define PWM0_B0_P3_7 A15X_MUX('3',7,5) /* PT3_7 */
#define FLEXIO0_D15_P3_7 A15X_MUX('3',7,6) /* PT3_7 */
#define PWM1_B0_P3_7 A15X_MUX('3',7,7) /* PT3_7 */
#define P3_8 A15X_MUX('3',8,0) /* PT3_8 */
#define WUU0_IN23_P3_8 A15X_MUX('3',8,0) /* PT3_8 */
#define TRIG_IN3_P3_8 A15X_MUX('3',8,1) /* PT3_8 */
#define LPSPI1_SDO_P3_8 A15X_MUX('3',8,2) /* PT3_8 */
#define LPUART1_RXD_P3_8 A15X_MUX('3',8,3) /* PT3_8 */
#define CT_INP4_P3_8 A15X_MUX('3',8,4) /* PT3_8 */
#define PWM0_A1_P3_8 A15X_MUX('3',8,5) /* PT3_8 */
#define FLEXIO0_D16_P3_8 A15X_MUX('3',8,6) /* PT3_8 */
#define CLKOUT_P3_8 A15X_MUX('3',8,12) /* PT3_8 */
#define P3_9 A15X_MUX('3',9,0) /* PT3_9 */
#define TRIG_IN4_P3_9 A15X_MUX('3',9,1) /* PT3_9 */
#define LPSPI1_SDI_P3_9 A15X_MUX('3',9,2) /* PT3_9 */
#define LPUART1_TXD_P3_9 A15X_MUX('3',9,3) /* PT3_9 */
#define CT_INP5_P3_9 A15X_MUX('3',9,4) /* PT3_9 */
#define PWM0_B1_P3_9 A15X_MUX('3',9,5) /* PT3_9 */
#define FLEXIO0_D17_P3_9 A15X_MUX('3',9,6) /* PT3_9 */
#define P3_10 A15X_MUX('3',10,0) /* PT3_10 */
#define TRIG_IN5_P3_10 A15X_MUX('3',10,1) /* PT3_10 */
#define LPSPI1_SCK_P3_10 A15X_MUX('3',10,2) /* PT3_10 */
#define LPUART1_RTS_B_P3_10 A15X_MUX('3',10,3) /* PT3_10 */
#define CT1_MAT0_P3_10 A15X_MUX('3',10,4) /* PT3_10 */
#define PWM0_A2_P3_10 A15X_MUX('3',10,5) /* PT3_10 */
#define FLEXIO0_D18_P3_10 A15X_MUX('3',10,6) /* PT3_10 */
#define P3_11 A15X_MUX('3',11,0) /* PT3_11 */
#define WUU0_IN24_P3_11 A15X_MUX('3',11,0) /* PT3_11 */
#define TRIG_IN6_P3_11 A15X_MUX('3',11,1) /* PT3_11 */
#define LPSPI1_PCS0_P3_11 A15X_MUX('3',11,2) /* PT3_11 */
#define LPUART1_CTS_B_P3_11 A15X_MUX('3',11,3) /* PT3_11 */
#define CT1_MAT1_P3_11 A15X_MUX('3',11,4) /* PT3_11 */
#define PWM0_B2_P3_11 A15X_MUX('3',11,5) /* PT3_11 */
#define FLEXIO0_D19_P3_11 A15X_MUX('3',11,6) /* PT3_11 */
#define P3_12 A15X_MUX('3',12,0) /* PT3_12 */
#define LPUART2_RTS_B_P3_12 A15X_MUX('3',12,2) /* PT3_12 */
#define LPUART3_TXD_P3_12 A15X_MUX('3',12,3) /* PT3_12 */
#define CT1_MAT2_P3_12 A15X_MUX('3',12,4) /* PT3_12 */
#define PWM0_X0_P3_12 A15X_MUX('3',12,5) /* PT3_12 */
#define FLEXIO0_D20_P3_12 A15X_MUX('3',12,6) /* PT3_12 */
#define PWM1_A2_P3_12 A15X_MUX('3',12,7) /* PT3_12 */
#define P3_13 A15X_MUX('3',13,0) /* PT3_13 */
#define LPUART2_CTS_B_P3_13 A15X_MUX('3',13,2) /* PT3_13 */
#define LPUART3_RXD_P3_13 A15X_MUX('3',13,3) /* PT3_13 */
#define CT1_MAT3_P3_13 A15X_MUX('3',13,4) /* PT3_13 */
#define PWM0_X1_P3_13 A15X_MUX('3',13,5) /* PT3_13 */
#define FLEXIO0_D21_P3_13 A15X_MUX('3',13,6) /* PT3_13 */
#define PWM1_B2_P3_13 A15X_MUX('3',13,7) /* PT3_13 */
#define WUU0_IN25_P3_14 A15X_MUX('3',14,0) /* PT3_14 */
#define P3_14 A15X_MUX('3',14,0) /* PT3_14 */
#define LPUART2_RXD_P3_14 A15X_MUX('3',14,2) /* PT3_14 */
#define LPUART3_CTS_B_P3_14 A15X_MUX('3',14,3) /* PT3_14 */
#define CT_INP6_P3_14 A15X_MUX('3',14,4) /* PT3_14 */
#define PWM0_X2_P3_14 A15X_MUX('3',14,5) /* PT3_14 */
#define FLEXIO0_D22_P3_14 A15X_MUX('3',14,6) /* PT3_14 */
#define PWM1_A1_P3_14 A15X_MUX('3',14,7) /* PT3_14 */
#define P3_15 A15X_MUX('3',15,0) /* PT3_15 */
#define LPUART2_TXD_P3_15 A15X_MUX('3',15,2) /* PT3_15 */
#define LPUART3_RTS_B_P3_15 A15X_MUX('3',15,3) /* PT3_15 */
#define CT_INP7_P3_15 A15X_MUX('3',15,4) /* PT3_15 */
#define FLEXIO0_D23_P3_15 A15X_MUX('3',15,6) /* PT3_15 */
#define PWM1_B1_P3_15 A15X_MUX('3',15,7) /* PT3_15 */
#define P3_16 A15X_MUX('3',16,0) /* PT3_16 */
#define LPUART4_RTS_B_P3_16 A15X_MUX('3',16,2) /* PT3_16 */
#define CT_INP8_P3_16 A15X_MUX('3',16,4) /* PT3_16 */
#define FLEXIO0_D24_P3_16 A15X_MUX('3',16,6) /* PT3_16 */
#define PWM1_A0_P3_16 A15X_MUX('3',16,7) /* PT3_16 */
#define P3_17 A15X_MUX('3',17,0) /* PT3_17 */
#define LPUART4_CTS_B_P3_17 A15X_MUX('3',17,2) /* PT3_17 */
#define CT_INP9_P3_17 A15X_MUX('3',17,4) /* PT3_17 */
#define FLEXIO0_D25_P3_17 A15X_MUX('3',17,6) /* PT3_17 */
#define PWM1_B0_P3_17 A15X_MUX('3',17,7) /* PT3_17 */
#define P3_18 A15X_MUX('3',18,0) /* PT3_18 */
#define LPUART4_RXD_P3_18 A15X_MUX('3',18,2) /* PT3_18 */
#define CT2_MAT0_P3_18 A15X_MUX('3',18,4) /* PT3_18 */
#define PWM0_X0_P3_18 A15X_MUX('3',18,5) /* PT3_18 */
#define FLEXIO0_D26_P3_18 A15X_MUX('3',18,6) /* PT3_18 */
#define PWM1_X0_P3_18 A15X_MUX('3',18,7) /* PT3_18 */
#define P3_19 A15X_MUX('3',19,0) /* PT3_19 */
#define LPUART4_TXD_P3_19 A15X_MUX('3',19,2) /* PT3_19 */
#define CT2_MAT1_P3_19 A15X_MUX('3',19,4) /* PT3_19 */
#define PWM0_X1_P3_19 A15X_MUX('3',19,5) /* PT3_19 */
#define FLEXIO0_D27_P3_19 A15X_MUX('3',19,6) /* PT3_19 */
#define PWM1_X1_P3_19 A15X_MUX('3',19,7) /* PT3_19 */
#define P3_20 A15X_MUX('3',20,0) /* PT3_20 */
#define TRIG_OUT0_P3_20 A15X_MUX('3',20,1) /* PT3_20 */
#define LPI2C3_SDA_P3_20 A15X_MUX('3',20,2) /* PT3_20 */
#define LPUART1_RXD_P3_20 A15X_MUX('3',20,3) /* PT3_20 */
#define CT2_MAT2_P3_20 A15X_MUX('3',20,4) /* PT3_20 */
#define PWM0_X2_P3_20 A15X_MUX('3',20,5) /* PT3_20 */
#define FLEXIO0_D28_P3_20 A15X_MUX('3',20,6) /* PT3_20 */
#define P3_21 A15X_MUX('3',21,0) /* PT3_21 */
#define TRIG_OUT1_P3_21 A15X_MUX('3',21,1) /* PT3_21 */
#define LPI2C3_SCL_P3_21 A15X_MUX('3',21,2) /* PT3_21 */
#define LPUART1_TXD_P3_21 A15X_MUX('3',21,3) /* PT3_21 */
#define CT2_MAT3_P3_21 A15X_MUX('3',21,4) /* PT3_21 */
#define FLEXIO0_D29_P3_21 A15X_MUX('3',21,6) /* PT3_21 */
#define P3_22 A15X_MUX('3',22,0) /* PT3_22 */
#define LPUART1_RTS_B_P3_22 A15X_MUX('3',22,3) /* PT3_22 */
#define CT_INP10_P3_22 A15X_MUX('3',22,4) /* PT3_22 */
#define FLEXIO0_D30_P3_22 A15X_MUX('3',22,6) /* PT3_22 */
#define PWM1_X2_P3_22 A15X_MUX('3',22,7) /* PT3_22 */
#define WUU0_IN30_P3_27 A15X_MUX('3',27,0) /* PT3_27 */
#define P3_27 A15X_MUX('3',27,0) /* PT3_27 */
#define TRIG_OUT7_P3_27 A15X_MUX('3',27,1) /* PT3_27 */
#define LPI2C3_SCL_P3_27 A15X_MUX('3',27,2) /* PT3_27 */
#define LPUART4_TXD_P3_27 A15X_MUX('3',27,3) /* PT3_27 */
#define CT_INP13_P3_27 A15X_MUX('3',27,4) /* PT3_27 */
#define CT3_MAT1_P3_27 A15X_MUX('3',27,5) /* PT3_27 */
#define FLEXIO0_D27_P3_27 A15X_MUX('3',27,6) /* PT3_27 */
#define WUU0_IN26_P3_28 A15X_MUX('3',28,0) /* PT3_28 */
#define P3_28 A15X_MUX('3',28,0) /* PT3_28 */
#define TRIG_IN11_P3_28 A15X_MUX('3',28,1) /* PT3_28 */
#define LPI2C3_SDA_P3_28 A15X_MUX('3',28,2) /* PT3_28 */
#define LPUART4_RXD_P3_28 A15X_MUX('3',28,3) /* PT3_28 */
#define CT_INP12_P3_28 A15X_MUX('3',28,4) /* PT3_28 */
#define CT3_MAT2_P3_28 A15X_MUX('3',28,5) /* PT3_28 */
#define FLEXIO0_D28_P3_28 A15X_MUX('3',28,6) /* PT3_28 */
#define WUU0_IN27_P3_29 A15X_MUX('3',29,0) /* PT3_29 */
#define P3_29 A15X_MUX('3',29,0) /* PT3_29 */
#define ADC1_A22_P3_29 A15X_MUX('3',29,0) /* PT3_29 */
#define ISPMODE_N_P3_29 A15X_MUX('3',29,1) /* PT3_29 */
#define LPI2C3_HREQ_P3_29 A15X_MUX('3',29,2) /* PT3_29 */
#define CT_INP3_P3_29 A15X_MUX('3',29,4) /* PT3_29 */
#define CT3_MAT3_P3_29 A15X_MUX('3',29,5) /* PT3_29 */
#define FLEXIO0_D29_P3_29 A15X_MUX('3',29,6) /* PT3_29 */
#define ADC1_A21_P3_30 A15X_MUX('3',30,0) /* PT3_30 */
#define P3_30 A15X_MUX('3',30,0) /* PT3_30 */
#define TRIG_OUT6_P3_30 A15X_MUX('3',30,1) /* PT3_30 */
#define LPI2C3_SCLS_P3_30 A15X_MUX('3',30,2) /* PT3_30 */
#define LPUART4_RTS_B_P3_30 A15X_MUX('3',30,3) /* PT3_30 */
#define CT0_MAT2_P3_30 A15X_MUX('3',30,4) /* PT3_30 */
#define FLEXIO0_D30_P3_30 A15X_MUX('3',30,6) /* PT3_30 */
#define P3_31 A15X_MUX('3',31,0) /* PT3_31 */
#define LPTMR0_ALT2_P3_31 A15X_MUX('3',31,0) /* PT3_31 */
#define ADC1_A20_P3_31 A15X_MUX('3',31,0) /* PT3_31 */
#define TRIG_IN10_P3_31 A15X_MUX('3',31,1) /* PT3_31 */
#define LPI2C3_SDAS_P3_31 A15X_MUX('3',31,2) /* PT3_31 */
#define LPUART4_CTS_B_P3_31 A15X_MUX('3',31,3) /* PT3_31 */
#define CT0_MAT3_P3_31 A15X_MUX('3',31,4) /* PT3_31 */
#define FLEXIO0_D31_P3_31 A15X_MUX('3',31,6) /* PT3_31 */
#define P4_2 A15X_MUX('4',2,0) /* PT4_2 */
#define WUU0_IN16_P4_2 A15X_MUX('4',2,0) /* PT4_2 */
#define CLKOUT_P4_2 A15X_MUX('4',2,1) /* PT4_2 */
#define LPI2C2_SDAS_P4_2 A15X_MUX('4',2,2) /* PT4_2 */
#define LPUART3_RXD_P4_2 A15X_MUX('4',2,3) /* PT4_2 */
#define CT4_MAT0_P4_2 A15X_MUX('4',2,4) /* PT4_2 */
#define PWM0_A2_P4_2 A15X_MUX('4',2,5) /* PT4_2 */
#define FLEXIO0_D10_P4_2 A15X_MUX('4',2,6) /* PT4_2 */
#define P4_3 A15X_MUX('4',3,0) /* PT4_3 */
#define LPI2C2_SCL_P4_3 A15X_MUX('4',3,2) /* PT4_3 */
#define LPUART4_TXD_P4_3 A15X_MUX('4',3,3) /* PT4_3 */
#define CT4_MAT1_P4_3 A15X_MUX('4',3,4) /* PT4_3 */
#define PWM0_B2_P4_3 A15X_MUX('4',3,5) /* PT4_3 */
#define FLEXIO0_D11_P4_3 A15X_MUX('4',3,6) /* PT4_3 */
#define P4_4 A15X_MUX('4',4,0) /* PT4_4 */
#define LPI2C2_SDA_P4_4 A15X_MUX('4',4,2) /* PT4_4 */
#define LPUART4_RXD_P4_4 A15X_MUX('4',4,3) /* PT4_4 */
#define CT4_MAT2_P4_4 A15X_MUX('4',4,4) /* PT4_4 */
#define PWM0_A1_P4_4 A15X_MUX('4',4,5) /* PT4_4 */
#define FLEXIO0_D12_P4_4 A15X_MUX('4',4,6) /* PT4_4 */
#define P4_5 A15X_MUX('4',5,0) /* PT4_5 */
#define TRIG_OUT3_P4_5 A15X_MUX('4',5,1) /* PT4_5 */
#define LPI2C2_SCLS_P4_5 A15X_MUX('4',5,2) /* PT4_5 */
#define LPUART3_TXD_P4_5 A15X_MUX('4',5,3) /* PT4_5 */
#define CT4_MAT3_P4_5 A15X_MUX('4',5,4) /* PT4_5 */
#define PWM0_B1_P4_5 A15X_MUX('4',5,5) /* PT4_5 */
#define FLEXIO0_D13_P4_5 A15X_MUX('4',5,6) /* PT4_5 */
#define P4_6 A15X_MUX('4',6,0) /* PT4_6 */
#define WUU0_IN17_P4_6 A15X_MUX('4',6,0) /* PT4_6 */
#define TRIG_IN4_P4_6 A15X_MUX('4',6,1) /* PT4_6 */
#define LPI2C2_HREQ_P4_6 A15X_MUX('4',6,2) /* PT4_6 */
#define LPUART3_CTS_B_P4_6 A15X_MUX('4',6,3) /* PT4_6 */
#define CT_INP6_P4_6 A15X_MUX('4',6,4) /* PT4_6 */
#define PWM0_A0_P4_6 A15X_MUX('4',6,5) /* PT4_6 */
#define FLEXIO0_D14_P4_6 A15X_MUX('4',6,6) /* PT4_6 */
#define P4_7 A15X_MUX('4',7,0) /* PT4_7 */
#define TRIG_IN5_P4_7 A15X_MUX('4',7,1) /* PT4_7 */
#define LPUART3_RTS_B_P4_7 A15X_MUX('4',7,3) /* PT4_7 */
#define CT_INP7_P4_7 A15X_MUX('4',7,4) /* PT4_7 */
#define PWM0_B0_P4_7 A15X_MUX('4',7,5) /* PT4_7 */
#define FLEXIO0_D15_P4_7 A15X_MUX('4',7,6) /* PT4_7 */
#endif