/* * Copyright 1997-2016 Freescale Semiconductor, Inc. * Copyright 2016-2022 NXP * * SPDX-License-Identifier: BSD-3-Clause */ /*! * @file S32Z2_CANXL_GRP_CONTROL.h * @version 1.8 * @date 2022-07-13 * @brief Peripheral Access Layer for S32Z2_CANXL_GRP_CONTROL * * This file contains register definitions and macros for easy access to their * bit fields. * * This file assumes LITTLE endian system. */ /** * @page misra_violations MISRA-C:2012 violations * * @section [global] * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced * The SoC header defines typedef for all modules. * * @section [global] * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced * The SoC header defines macros for all modules and registers. * * @section [global] * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro * These are generated macros used for accessing the bit-fields from registers. * * @section [global] * Violates MISRA 2012 Required Rule 5.1, identifier clash * The supported compilers use more than 31 significant characters for identifiers. * * @section [global] * Violates MISRA 2012 Required Rule 5.2, identifier clash * The supported compilers use more than 31 significant characters for identifiers. * * @section [global] * Violates MISRA 2012 Required Rule 5.4, identifier clash * The supported compilers use more than 31 significant characters for identifiers. * * @section [global] * Violates MISRA 2012 Required Rule 5.5, identifier clash * The supported compilers use more than 31 significant characters for identifiers. * * @section [global] * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler * This type qualifier is needed to ensure correct I/O access and addressing. */ /* Prevention from multiple including the same memory map */ #if !defined(S32Z2_CANXL_GRP_CONTROL_H_) /* Check if memory map has not been already included */ #define S32Z2_CANXL_GRP_CONTROL_H_ #include "S32Z2_COMMON.h" /* ---------------------------------------------------------------------------- -- CANXL_GRP_CONTROL Peripheral Access Layer ---------------------------------------------------------------------------- */ /*! * @addtogroup CANXL_GRP_CONTROL_Peripheral_Access_Layer CANXL_GRP_CONTROL Peripheral Access Layer * @{ */ /** CANXL_GRP_CONTROL - Size of Registers Arrays */ #define CANXL_GRP_CONTROL_DSCACTIVEARRAY_COUNT 4u #define CANXL_GRP_CONTROL_FIFOCTRLREQ_COUNT 4u #define CANXL_GRP_CONTROL_TXIFLAGARRAY_COUNT 4u #define CANXL_GRP_CONTROL_MSGIMASKARRAY_COUNT 4u #define CANXL_GRP_CONTROL_OVERRUNFARRAY_COUNT 4u #define CANXL_GRP_CONTROL_URUNFARRAY_COUNT 4u /** CANXL_GRP_CONTROL - Register Layout Typedef */ typedef struct { __IO uint32_t DSCCTRL; /**< Descriptors Control, offset: 0x0 */ __I uint32_t DSCACTIVE[CANXL_GRP_CONTROL_DSCACTIVEARRAY_COUNT]; /**< Descriptor Activation 1..Descriptor Activation 4, array offset: 0x4, array step: 0x4 */ __IO uint32_t FIFOCTRL[CANXL_GRP_CONTROL_FIFOCTRLREQ_COUNT]; /**< Message FIFO Control 1..Message FIFO Control 4, array offset: 0x14, array step: 0x4 */ uint8_t RESERVED_0[48]; __IO uint32_t MSGIFLAG[CANXL_GRP_CONTROL_TXIFLAGARRAY_COUNT]; /**< Message Interrupt FLAG 1..Message Interrupt FLAG 4, array offset: 0x54, array step: 0x4 */ uint8_t RESERVED_1[16]; __IO uint32_t MSGIMASK[CANXL_GRP_CONTROL_MSGIMASKARRAY_COUNT]; /**< Message Interrupt Mask 1..Message Interrupt Mask 4, array offset: 0x74, array step: 0x4 */ uint8_t RESERVED_2[16]; __IO uint32_t FREEDSC0; /**< Free Descriptor Index 0, offset: 0x94 */ uint8_t RESERVED_3[112]; __IO uint32_t OVERRUNF[CANXL_GRP_CONTROL_OVERRUNFARRAY_COUNT]; /**< Descriptor Overrun Flag, array offset: 0x108, array step: 0x4 */ uint8_t RESERVED_4[32]; __IO uint32_t URUNF[CANXL_GRP_CONTROL_URUNFARRAY_COUNT]; /**< Under Run Flag, array offset: 0x138, array step: 0x4 */ } CANXL_GRP_CONTROL_Type, *CANXL_GRP_CONTROL_MemMapPtr; /** Number of instances of the CANXL_GRP_CONTROL module. */ #define CANXL_GRP_CONTROL_INSTANCE_COUNT (2u) /* CANXL_GRP_CONTROL - Peripheral instance base addresses */ /** Peripheral CANXL_0__GRP_CONTROL base address */ #define IP_CANXL_0__GRP_CONTROL_BASE (0x47426000u) /** Peripheral CANXL_0__GRP_CONTROL base pointer */ #define IP_CANXL_0__GRP_CONTROL ((CANXL_GRP_CONTROL_Type *)IP_CANXL_0__GRP_CONTROL_BASE) /** Peripheral CANXL_1__GRP_CONTROL base address */ #define IP_CANXL_1__GRP_CONTROL_BASE (0x47526000u) /** Peripheral CANXL_1__GRP_CONTROL base pointer */ #define IP_CANXL_1__GRP_CONTROL ((CANXL_GRP_CONTROL_Type *)IP_CANXL_1__GRP_CONTROL_BASE) /** Array initializer of CANXL_GRP_CONTROL peripheral base addresses */ #define IP_CANXL_GRP_CONTROL_BASE_ADDRS { IP_CANXL_0__GRP_CONTROL_BASE, IP_CANXL_1__GRP_CONTROL_BASE } /** Array initializer of CANXL_GRP_CONTROL peripheral base pointers */ #define IP_CANXL_GRP_CONTROL_BASE_PTRS { IP_CANXL_0__GRP_CONTROL, IP_CANXL_1__GRP_CONTROL } /* ---------------------------------------------------------------------------- -- CANXL_GRP_CONTROL Register Masks ---------------------------------------------------------------------------- */ /*! * @addtogroup CANXL_GRP_CONTROL_Register_Masks CANXL_GRP_CONTROL Register Masks * @{ */ /*! @name DSCCTRL - Descriptors Control */ /*! @{ */ #define CANXL_GRP_CONTROL_DSCCTRL_TXDSC_MASK (0x7FU) #define CANXL_GRP_CONTROL_DSCCTRL_TXDSC_SHIFT (0U) #define CANXL_GRP_CONTROL_DSCCTRL_TXDSC_WIDTH (7U) #define CANXL_GRP_CONTROL_DSCCTRL_TXDSC(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCCTRL_TXDSC_SHIFT)) & CANXL_GRP_CONTROL_DSCCTRL_TXDSC_MASK) /*! @} */ /*! @name DSCACTIVE - Descriptor Activation 1..Descriptor Activation 4 */ /*! @{ */ #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT0_MASK (0x1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT0_SHIFT (0U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT0_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT0_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT0_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT32_MASK (0x1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT32_SHIFT (0U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT32_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT32(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT32_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT32_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT64_MASK (0x1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT64_SHIFT (0U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT64_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT64(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT64_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT64_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT96_MASK (0x1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT96_SHIFT (0U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT96_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT96(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT96_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT96_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT1_MASK (0x2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT1_SHIFT (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT1_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT1_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT1_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT33_MASK (0x2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT33_SHIFT (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT33_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT33(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT33_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT33_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT65_MASK (0x2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT65_SHIFT (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT65_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT65(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT65_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT65_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT97_MASK (0x2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT97_SHIFT (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT97_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT97(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT97_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT97_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT2_MASK (0x4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT2_SHIFT (2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT2_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT2_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT2_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT34_MASK (0x4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT34_SHIFT (2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT34_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT34(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT34_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT34_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT66_MASK (0x4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT66_SHIFT (2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT66_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT66(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT66_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT66_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT98_MASK (0x4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT98_SHIFT (2U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT98_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT98(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT98_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT98_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT3_MASK (0x8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT3_SHIFT (3U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT3_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT3_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT3_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT35_MASK (0x8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT35_SHIFT (3U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT35_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT35(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT35_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT35_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT67_MASK (0x8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT67_SHIFT (3U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT67_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT67(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT67_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT67_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT99_MASK (0x8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT99_SHIFT (3U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT99_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT99(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT99_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT99_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT4_MASK (0x10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT4_SHIFT (4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT4_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT4_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT4_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT36_MASK (0x10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT36_SHIFT (4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT36_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT36(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT36_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT36_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT68_MASK (0x10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT68_SHIFT (4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT68_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT68(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT68_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT68_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT100_MASK (0x10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT100_SHIFT (4U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT100_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT100(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT100_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT100_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT5_MASK (0x20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT5_SHIFT (5U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT5_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT5_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT5_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT37_MASK (0x20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT37_SHIFT (5U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT37_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT37(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT37_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT37_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT69_MASK (0x20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT69_SHIFT (5U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT69_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT69(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT69_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT69_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT101_MASK (0x20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT101_SHIFT (5U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT101_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT101(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT101_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT101_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT6_MASK (0x40U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT6_SHIFT (6U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT6_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT6_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT6_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT38_MASK (0x40U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT38_SHIFT (6U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT38_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT38(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT38_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT38_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT70_MASK (0x40U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT70_SHIFT (6U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT70_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT70(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT70_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT70_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT102_MASK (0x40U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT102_SHIFT (6U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT102_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT102(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT102_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT102_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT7_MASK (0x80U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT7_SHIFT (7U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT7_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT7_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT7_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT39_MASK (0x80U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT39_SHIFT (7U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT39_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT39(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT39_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT39_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT71_MASK (0x80U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT71_SHIFT (7U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT71_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT71(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT71_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT71_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT103_MASK (0x80U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT103_SHIFT (7U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT103_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT103(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT103_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT103_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT8_MASK (0x100U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT8_SHIFT (8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT8_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT8_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT8_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT40_MASK (0x100U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT40_SHIFT (8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT40_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT40(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT40_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT40_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT72_MASK (0x100U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT72_SHIFT (8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT72_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT72(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT72_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT72_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT104_MASK (0x100U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT104_SHIFT (8U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT104_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT104(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT104_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT104_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT9_MASK (0x200U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT9_SHIFT (9U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT9_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT9_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT9_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT41_MASK (0x200U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT41_SHIFT (9U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT41_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT41(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT41_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT41_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT73_MASK (0x200U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT73_SHIFT (9U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT73_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT73(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT73_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT73_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT105_MASK (0x200U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT105_SHIFT (9U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT105_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT105(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT105_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT105_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT10_MASK (0x400U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT10_SHIFT (10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT10_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT10_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT10_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT42_MASK (0x400U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT42_SHIFT (10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT42_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT42(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT42_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT42_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT74_MASK (0x400U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT74_SHIFT (10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT74_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT74(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT74_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT74_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT106_MASK (0x400U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT106_SHIFT (10U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT106_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT106(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT106_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT106_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT11_MASK (0x800U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT11_SHIFT (11U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT11_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT11_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT11_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT43_MASK (0x800U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT43_SHIFT (11U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT43_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT43(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT43_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT43_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT75_MASK (0x800U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT75_SHIFT (11U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT75_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT75(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT75_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT75_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT107_MASK (0x800U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT107_SHIFT (11U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT107_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT107(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT107_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT107_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT12_MASK (0x1000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT12_SHIFT (12U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT12_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT12_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT12_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT44_MASK (0x1000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT44_SHIFT (12U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT44_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT44(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT44_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT44_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT76_MASK (0x1000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT76_SHIFT (12U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT76_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT76(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT76_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT76_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT108_MASK (0x1000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT108_SHIFT (12U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT108_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT108(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT108_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT108_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT13_MASK (0x2000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT13_SHIFT (13U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT13_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT13_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT13_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT45_MASK (0x2000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT45_SHIFT (13U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT45_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT45(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT45_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT45_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT77_MASK (0x2000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT77_SHIFT (13U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT77_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT77(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT77_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT77_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT109_MASK (0x2000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT109_SHIFT (13U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT109_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT109(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT109_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT109_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT14_MASK (0x4000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT14_SHIFT (14U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT14_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT14_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT14_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT46_MASK (0x4000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT46_SHIFT (14U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT46_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT46(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT46_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT46_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT78_MASK (0x4000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT78_SHIFT (14U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT78_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT78(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT78_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT78_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT110_MASK (0x4000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT110_SHIFT (14U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT110_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT110(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT110_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT110_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT15_MASK (0x8000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT15_SHIFT (15U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT15_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT15_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT15_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT47_MASK (0x8000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT47_SHIFT (15U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT47_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT47(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT47_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT47_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT79_MASK (0x8000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT79_SHIFT (15U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT79_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT79(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT79_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT79_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT111_MASK (0x8000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT111_SHIFT (15U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT111_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT111(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT111_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT111_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT16_MASK (0x10000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT16_SHIFT (16U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT16_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT16_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT16_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT48_MASK (0x10000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT48_SHIFT (16U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT48_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT48(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT48_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT48_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT80_MASK (0x10000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT80_SHIFT (16U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT80_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT80(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT80_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT80_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT112_MASK (0x10000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT112_SHIFT (16U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT112_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT112(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT112_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT112_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT17_MASK (0x20000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT17_SHIFT (17U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT17_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT17_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT17_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT49_MASK (0x20000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT49_SHIFT (17U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT49_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT49(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT49_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT49_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT81_MASK (0x20000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT81_SHIFT (17U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT81_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT81(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT81_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT81_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT113_MASK (0x20000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT113_SHIFT (17U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT113_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT113(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT113_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT113_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT18_MASK (0x40000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT18_SHIFT (18U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT18_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT18_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT18_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT50_MASK (0x40000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT50_SHIFT (18U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT50_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT50(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT50_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT50_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT82_MASK (0x40000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT82_SHIFT (18U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT82_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT82(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT82_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT82_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT114_MASK (0x40000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT114_SHIFT (18U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT114_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT114(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT114_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT114_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT19_MASK (0x80000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT19_SHIFT (19U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT19_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT19_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT19_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT51_MASK (0x80000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT51_SHIFT (19U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT51_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT51(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT51_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT51_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT83_MASK (0x80000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT83_SHIFT (19U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT83_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT83(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT83_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT83_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT115_MASK (0x80000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT115_SHIFT (19U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT115_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT115(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT115_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT115_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT20_MASK (0x100000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT20_SHIFT (20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT20_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT20_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT20_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT52_MASK (0x100000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT52_SHIFT (20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT52_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT52(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT52_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT52_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT84_MASK (0x100000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT84_SHIFT (20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT84_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT84(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT84_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT84_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT116_MASK (0x100000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT116_SHIFT (20U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT116_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT116(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT116_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT116_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT21_MASK (0x200000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT21_SHIFT (21U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT21_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT21_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT21_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT53_MASK (0x200000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT53_SHIFT (21U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT53_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT53(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT53_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT53_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT85_MASK (0x200000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT85_SHIFT (21U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT85_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT85(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT85_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT85_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT117_MASK (0x200000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT117_SHIFT (21U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT117_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT117(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT117_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT117_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT22_MASK (0x400000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT22_SHIFT (22U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT22_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT22_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT22_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT54_MASK (0x400000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT54_SHIFT (22U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT54_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT54(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT54_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT54_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT86_MASK (0x400000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT86_SHIFT (22U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT86_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT86(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT86_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT86_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT118_MASK (0x400000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT118_SHIFT (22U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT118_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT118(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT118_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT118_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT23_MASK (0x800000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT23_SHIFT (23U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT23_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT23_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT23_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT55_MASK (0x800000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT55_SHIFT (23U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT55_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT55(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT55_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT55_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT87_MASK (0x800000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT87_SHIFT (23U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT87_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT87(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT87_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT87_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT119_MASK (0x800000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT119_SHIFT (23U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT119_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT119(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT119_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT119_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT24_MASK (0x1000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT24_SHIFT (24U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT24_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT24_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT24_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT56_MASK (0x1000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT56_SHIFT (24U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT56_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT56(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT56_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT56_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT88_MASK (0x1000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT88_SHIFT (24U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT88_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT88(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT88_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT88_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT120_MASK (0x1000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT120_SHIFT (24U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT120_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT120(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT120_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT120_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT25_MASK (0x2000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT25_SHIFT (25U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT25_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT25_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT25_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT57_MASK (0x2000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT57_SHIFT (25U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT57_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT57(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT57_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT57_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT89_MASK (0x2000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT89_SHIFT (25U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT89_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT89(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT89_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT89_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT121_MASK (0x2000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT121_SHIFT (25U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT121_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT121(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT121_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT121_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT26_MASK (0x4000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT26_SHIFT (26U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT26_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT26_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT26_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT58_MASK (0x4000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT58_SHIFT (26U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT58_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT58(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT58_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT58_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT90_MASK (0x4000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT90_SHIFT (26U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT90_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT90(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT90_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT90_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT122_MASK (0x4000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT122_SHIFT (26U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT122_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT122(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT122_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT122_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT27_MASK (0x8000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT27_SHIFT (27U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT27_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT27_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT27_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT59_MASK (0x8000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT59_SHIFT (27U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT59_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT59(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT59_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT59_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT91_MASK (0x8000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT91_SHIFT (27U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT91_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT91(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT91_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT91_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT123_MASK (0x8000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT123_SHIFT (27U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT123_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT123(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT123_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT123_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT28_MASK (0x10000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT28_SHIFT (28U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT28_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT28_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT28_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT60_MASK (0x10000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT60_SHIFT (28U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT60_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT60(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT60_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT60_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT92_MASK (0x10000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT92_SHIFT (28U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT92_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT92(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT92_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT92_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT124_MASK (0x10000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT124_SHIFT (28U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT124_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT124(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT124_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT124_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT29_MASK (0x20000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT29_SHIFT (29U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT29_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT29_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT29_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT61_MASK (0x20000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT61_SHIFT (29U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT61_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT61(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT61_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT61_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT93_MASK (0x20000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT93_SHIFT (29U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT93_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT93(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT93_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT93_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT125_MASK (0x20000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT125_SHIFT (29U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT125_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT125(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT125_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT125_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT30_MASK (0x40000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT30_SHIFT (30U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT30_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT30_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT30_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT62_MASK (0x40000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT62_SHIFT (30U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT62_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT62(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT62_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT62_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT94_MASK (0x40000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT94_SHIFT (30U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT94_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT94(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT94_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT94_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT126_MASK (0x40000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT126_SHIFT (30U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT126_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT126(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT126_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT126_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT31_MASK (0x80000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT31_SHIFT (31U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT31_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT31_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT31_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT63_MASK (0x80000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT63_SHIFT (31U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT63_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT63(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT63_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT63_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT95_MASK (0x80000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT95_SHIFT (31U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT95_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT95(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT95_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT95_MASK) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT127_MASK (0x80000000U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT127_SHIFT (31U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT127_WIDTH (1U) #define CANXL_GRP_CONTROL_DSCACTIVE_DCACT127(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_DSCACTIVE_DCACT127_SHIFT)) & CANXL_GRP_CONTROL_DSCACTIVE_DCACT127_MASK) /*! @} */ /*! @name FIFOCTRL - Message FIFO Control 1..Message FIFO Control 4 */ /*! @{ */ #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_MASK (0xFU) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_SHIFT (0U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH1_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH3_MASK (0xFU) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH3_SHIFT (0U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH3_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH3_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH3_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH5_MASK (0xFU) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH5_SHIFT (0U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH5_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH5_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH5_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH7_MASK (0xFU) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH7_SHIFT (0U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH7_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH7_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH7_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1_MASK (0xF00U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1_SHIFT (8U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM1_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM3_MASK (0xF00U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM3_SHIFT (8U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM3_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM3_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM3_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM5_MASK (0xF00U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM5_SHIFT (8U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM5_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM5_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM5_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM7_MASK (0xF00U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM7_SHIFT (8U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM7_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM7_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM7_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_MASK (0xF0000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_SHIFT (16U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH2_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH4_MASK (0xF0000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH4_SHIFT (16U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH4_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH4_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH4_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH6_MASK (0xF0000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH6_SHIFT (16U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH6_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH6_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH6_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH8_MASK (0xF0000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH8_SHIFT (16U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH8_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH8_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFODPH8_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2_MASK (0xF000000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2_SHIFT (24U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM2_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM4_MASK (0xF000000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM4_SHIFT (24U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM4_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM4_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM4_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM6_MASK (0xF000000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM6_SHIFT (24U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM6_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM6_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM6_MASK) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM8_MASK (0xF000000U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM8_SHIFT (24U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM8_WIDTH (4U) #define CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM8_SHIFT)) & CANXL_GRP_CONTROL_FIFOCTRL_FIFOWTM8_MASK) /*! @} */ /*! @name MSGIFLAG - Message Interrupt FLAG 1..Message Interrupt FLAG 4 */ /*! @{ */ #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG0_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG0_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG0_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG0_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG0_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG32_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG32_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG32_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG32(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG32_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG32_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG64_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG64_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG64_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG64(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG64_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG64_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG96_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG96_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG96_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG96(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG96_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG96_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG1_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG1_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG1_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG1_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG1_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG33_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG33_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG33_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG33(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG33_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG33_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG65_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG65_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG65_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG65(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG65_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG65_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG97_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG97_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG97_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG97(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG97_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG97_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG2_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG2_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG2_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG2_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG2_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG34_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG34_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG34_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG34(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG34_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG34_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG66_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG66_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG66_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG66(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG66_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG66_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG98_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG98_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG98_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG98(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG98_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG98_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG3_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG3_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG3_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG3_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG3_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG35_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG35_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG35_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG35(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG35_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG35_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG67_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG67_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG67_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG67(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG67_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG67_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG99_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG99_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG99_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG99(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG99_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG99_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG4_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG4_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG4_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG4_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG4_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG36_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG36_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG36_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG36(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG36_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG36_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG68_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG68_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG68_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG68(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG68_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG68_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG100_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG100_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG100_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG100(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG100_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG100_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG5_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG5_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG5_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG5_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG5_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG37_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG37_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG37_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG37(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG37_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG37_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG69_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG69_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG69_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG69(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG69_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG69_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG101_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG101_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG101_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG101(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG101_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG101_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG6_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG6_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG6_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG6_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG6_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG38_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG38_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG38_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG38(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG38_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG38_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG70_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG70_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG70_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG70(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG70_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG70_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG102_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG102_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG102_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG102(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG102_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG102_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG7_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG7_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG7_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG7_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG7_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG39_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG39_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG39_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG39(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG39_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG39_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG71_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG71_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG71_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG71(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG71_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG71_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG103_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG103_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG103_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG103(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG103_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG103_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG8_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG8_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG8_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG8_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG8_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG40_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG40_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG40_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG40(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG40_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG40_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG72_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG72_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG72_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG72(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG72_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG72_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG104_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG104_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG104_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG104(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG104_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG104_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG9_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG9_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG9_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG9_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG9_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG41_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG41_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG41_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG41(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG41_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG41_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG73_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG73_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG73_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG73(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG73_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG73_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG105_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG105_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG105_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG105(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG105_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG105_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG10_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG10_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG10_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG10_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG10_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG42_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG42_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG42_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG42(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG42_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG42_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG74_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG74_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG74_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG74(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG74_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG74_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG106_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG106_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG106_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG106(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG106_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG106_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG11_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG11_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG11_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG11_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG11_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG43_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG43_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG43_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG43(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG43_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG43_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG75_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG75_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG75_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG75(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG75_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG75_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG107_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG107_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG107_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG107(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG107_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG107_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG12_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG12_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG12_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG12_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG12_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG44_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG44_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG44_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG44(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG44_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG44_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG76_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG76_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG76_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG76(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG76_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG76_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG108_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG108_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG108_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG108(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG108_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG108_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG13_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG13_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG13_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG13_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG13_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG45_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG45_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG45_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG45(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG45_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG45_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG77_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG77_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG77_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG77(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG77_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG77_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG109_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG109_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG109_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG109(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG109_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG109_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG14_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG14_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG14_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG14_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG14_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG46_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG46_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG46_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG46(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG46_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG46_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG78_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG78_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG78_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG78(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG78_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG78_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG110_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG110_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG110_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG110(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG110_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG110_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG15_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG15_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG15_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG15_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG15_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG47_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG47_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG47_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG47(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG47_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG47_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG79_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG79_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG79_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG79(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG79_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG79_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG111_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG111_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG111_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG111(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG111_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG111_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG16_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG16_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG16_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG16_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG16_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG48_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG48_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG48_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG48(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG48_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG48_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG80_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG80_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG80_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG80(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG80_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG80_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG112_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG112_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG112_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG112(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG112_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG112_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG17_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG17_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG17_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG17_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG17_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG49_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG49_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG49_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG49(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG49_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG49_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG81_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG81_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG81_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG81(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG81_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG81_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG113_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG113_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG113_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG113(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG113_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG113_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG18_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG18_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG18_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG18_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG18_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG50_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG50_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG50_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG50(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG50_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG50_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG82_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG82_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG82_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG82(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG82_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG82_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG114_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG114_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG114_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG114(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG114_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG114_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG19_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG19_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG19_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG19_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG19_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG51_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG51_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG51_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG51(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG51_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG51_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG83_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG83_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG83_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG83(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG83_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG83_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG115_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG115_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG115_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG115(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG115_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG115_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG20_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG20_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG20_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG20_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG20_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG52_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG52_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG52_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG52(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG52_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG52_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG84_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG84_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG84_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG84(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG84_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG84_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG116_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG116_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG116_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG116(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG116_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG116_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG21_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG21_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG21_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG21_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG21_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG53_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG53_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG53_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG53(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG53_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG53_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG85_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG85_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG85_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG85(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG85_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG85_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG117_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG117_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG117_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG117(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG117_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG117_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG22_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG22_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG22_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG22_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG22_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG54_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG54_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG54_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG54(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG54_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG54_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG86_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG86_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG86_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG86(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG86_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG86_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG118_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG118_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG118_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG118(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG118_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG118_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG23_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG23_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG23_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG23_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG23_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG55_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG55_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG55_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG55(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG55_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG55_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG87_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG87_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG87_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG87(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG87_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG87_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG119_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG119_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG119_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG119(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG119_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG119_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG24_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG24_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG24_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG24_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG24_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG56_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG56_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG56_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG56(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG56_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG56_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG88_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG88_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG88_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG88(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG88_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG88_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG120_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG120_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG120_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG120(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG120_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG120_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG25_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG25_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG25_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG25_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG25_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG57_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG57_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG57_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG57(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG57_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG57_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG89_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG89_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG89_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG89(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG89_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG89_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG121_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG121_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG121_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG121(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG121_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG121_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG26_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG26_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG26_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG26_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG26_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG58_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG58_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG58_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG58(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG58_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG58_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG90_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG90_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG90_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG90(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG90_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG90_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG122_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG122_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG122_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG122(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG122_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG122_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG27_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG27_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG27_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG27_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG27_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG59_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG59_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG59_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG59(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG59_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG59_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG91_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG91_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG91_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG91(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG91_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG91_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG123_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG123_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG123_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG123(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG123_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG123_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG28_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG28_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG28_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG28_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG28_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG60_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG60_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG60_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG60(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG60_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG60_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG92_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG92_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG92_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG92(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG92_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG92_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG124_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG124_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG124_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG124(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG124_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG124_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG29_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG29_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG29_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG29_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG29_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG61_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG61_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG61_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG61(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG61_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG61_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG93_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG93_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG93_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG93(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG93_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG93_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG125_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG125_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG125_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG125(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG125_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG125_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG30_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG30_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG30_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG30_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG30_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG62_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG62_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG62_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG62(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG62_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG62_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG94_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG94_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG94_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG94(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG94_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG94_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG126_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG126_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG126_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG126(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG126_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG126_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG31_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG31_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG31_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG31_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG31_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG63_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG63_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG63_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG63(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG63_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG63_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG95_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG95_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG95_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG95(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG95_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG95_MASK) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG127_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG127_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG127_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG127(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG127_SHIFT)) & CANXL_GRP_CONTROL_MSGIFLAG_MSGFLAG127_MASK) /*! @} */ /*! @name MSGIMASK - Message Interrupt Mask 1..Message Interrupt Mask 4 */ /*! @{ */ #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM0_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM0_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM0_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM0_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM0_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM32_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM32_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM32_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM32(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM32_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM32_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM64_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM64_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM64_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM64(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM64_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM64_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM96_MASK (0x1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM96_SHIFT (0U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM96_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM96(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM96_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM96_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM1_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM1_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM1_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM1_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM1_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM33_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM33_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM33_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM33(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM33_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM33_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM65_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM65_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM65_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM65(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM65_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM65_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM97_MASK (0x2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM97_SHIFT (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM97_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM97(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM97_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM97_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM2_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM2_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM2_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM2_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM2_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM34_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM34_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM34_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM34(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM34_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM34_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM66_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM66_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM66_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM66(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM66_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM66_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM98_MASK (0x4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM98_SHIFT (2U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM98_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM98(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM98_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM98_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM3_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM3_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM3_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM3_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM3_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM35_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM35_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM35_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM35(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM35_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM35_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM67_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM67_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM67_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM67(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM67_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM67_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM99_MASK (0x8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM99_SHIFT (3U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM99_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM99(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM99_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM99_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM4_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM4_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM4_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM4_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM4_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM36_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM36_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM36_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM36(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM36_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM36_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM68_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM68_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM68_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM68(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM68_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM68_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM100_MASK (0x10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM100_SHIFT (4U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM100_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM100(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM100_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM100_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM5_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM5_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM5_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM5_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM5_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM37_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM37_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM37_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM37(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM37_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM37_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM69_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM69_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM69_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM69(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM69_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM69_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM101_MASK (0x20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM101_SHIFT (5U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM101_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM101(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM101_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM101_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM6_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM6_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM6_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM6_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM6_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM38_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM38_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM38_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM38(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM38_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM38_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM70_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM70_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM70_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM70(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM70_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM70_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM102_MASK (0x40U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM102_SHIFT (6U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM102_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM102(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM102_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM102_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM7_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM7_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM7_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM7_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM7_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM39_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM39_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM39_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM39(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM39_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM39_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM71_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM71_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM71_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM71(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM71_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM71_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM103_MASK (0x80U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM103_SHIFT (7U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM103_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM103(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM103_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM103_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM8_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM8_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM8_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM8_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM8_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM40_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM40_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM40_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM40(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM40_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM40_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM72_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM72_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM72_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM72(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM72_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM72_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM104_MASK (0x100U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM104_SHIFT (8U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM104_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM104(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM104_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM104_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM9_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM9_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM9_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM9_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM9_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM41_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM41_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM41_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM41(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM41_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM41_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM73_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM73_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM73_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM73(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM73_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM73_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM105_MASK (0x200U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM105_SHIFT (9U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM105_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM105(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM105_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM105_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM10_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM10_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM10_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM10_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM10_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM42_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM42_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM42_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM42(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM42_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM42_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM74_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM74_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM74_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM74(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM74_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM74_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM106_MASK (0x400U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM106_SHIFT (10U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM106_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM106(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM106_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM106_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM11_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM11_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM11_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM11_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM11_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM43_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM43_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM43_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM43(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM43_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM43_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM75_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM75_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM75_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM75(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM75_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM75_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM107_MASK (0x800U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM107_SHIFT (11U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM107_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM107(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM107_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM107_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM12_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM12_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM12_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM12_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM12_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM44_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM44_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM44_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM44(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM44_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM44_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM76_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM76_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM76_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM76(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM76_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM76_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM108_MASK (0x1000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM108_SHIFT (12U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM108_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM108(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM108_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM108_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM13_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM13_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM13_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM13_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM13_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM45_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM45_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM45_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM45(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM45_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM45_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM77_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM77_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM77_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM77(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM77_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM77_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM109_MASK (0x2000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM109_SHIFT (13U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM109_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM109(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM109_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM109_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM14_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM14_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM14_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM14_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM14_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM46_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM46_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM46_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM46(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM46_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM46_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM78_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM78_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM78_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM78(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM78_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM78_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM110_MASK (0x4000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM110_SHIFT (14U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM110_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM110(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM110_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM110_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM15_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM15_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM15_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM15_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM15_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM47_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM47_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM47_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM47(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM47_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM47_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM79_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM79_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM79_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM79(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM79_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM79_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM111_MASK (0x8000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM111_SHIFT (15U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM111_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM111(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM111_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM111_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM16_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM16_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM16_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM16_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM16_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM48_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM48_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM48_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM48(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM48_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM48_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM80_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM80_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM80_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM80(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM80_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM80_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM112_MASK (0x10000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM112_SHIFT (16U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM112_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM112(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM112_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM112_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM17_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM17_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM17_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM17_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM17_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM49_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM49_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM49_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM49(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM49_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM49_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM81_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM81_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM81_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM81(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM81_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM81_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM113_MASK (0x20000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM113_SHIFT (17U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM113_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM113(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM113_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM113_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM18_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM18_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM18_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM18_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM18_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM50_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM50_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM50_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM50(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM50_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM50_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM82_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM82_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM82_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM82(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM82_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM82_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM114_MASK (0x40000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM114_SHIFT (18U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM114_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM114(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM114_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM114_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM19_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM19_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM19_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM19_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM19_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM51_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM51_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM51_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM51(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM51_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM51_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM83_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM83_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM83_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM83(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM83_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM83_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM115_MASK (0x80000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM115_SHIFT (19U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM115_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM115(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM115_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM115_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM20_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM20_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM20_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM20_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM20_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM52_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM52_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM52_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM52(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM52_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM52_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM84_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM84_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM84_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM84(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM84_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM84_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM116_MASK (0x100000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM116_SHIFT (20U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM116_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM116(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM116_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM116_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM21_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM21_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM21_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM21_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM21_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM53_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM53_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM53_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM53(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM53_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM53_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM85_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM85_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM85_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM85(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM85_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM85_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM117_MASK (0x200000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM117_SHIFT (21U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM117_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM117(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM117_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM117_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM22_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM22_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM22_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM22_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM22_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM54_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM54_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM54_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM54(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM54_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM54_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM86_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM86_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM86_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM86(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM86_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM86_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM118_MASK (0x400000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM118_SHIFT (22U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM118_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM118(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM118_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM118_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM23_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM23_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM23_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM23_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM23_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM55_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM55_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM55_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM55(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM55_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM55_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM87_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM87_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM87_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM87(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM87_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM87_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM119_MASK (0x800000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM119_SHIFT (23U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM119_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM119(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM119_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM119_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM24_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM24_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM24_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM24_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM24_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM56_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM56_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM56_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM56(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM56_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM56_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM88_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM88_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM88_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM88(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM88_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM88_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM120_MASK (0x1000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM120_SHIFT (24U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM120_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM120(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM120_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM120_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM25_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM25_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM25_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM25_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM25_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM57_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM57_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM57_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM57(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM57_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM57_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM89_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM89_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM89_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM89(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM89_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM89_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM121_MASK (0x2000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM121_SHIFT (25U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM121_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM121(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM121_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM121_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM26_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM26_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM26_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM26_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM26_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM58_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM58_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM58_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM58(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM58_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM58_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM90_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM90_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM90_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM90(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM90_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM90_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM122_MASK (0x4000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM122_SHIFT (26U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM122_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM122(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM122_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM122_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM27_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM27_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM27_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM27_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM27_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM59_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM59_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM59_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM59(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM59_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM59_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM91_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM91_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM91_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM91(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM91_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM91_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM123_MASK (0x8000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM123_SHIFT (27U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM123_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM123(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM123_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM123_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM28_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM28_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM28_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM28_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM28_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM60_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM60_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM60_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM60(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM60_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM60_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM92_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM92_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM92_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM92(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM92_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM92_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM124_MASK (0x10000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM124_SHIFT (28U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM124_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM124(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM124_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM124_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM29_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM29_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM29_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM29_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM29_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM61_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM61_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM61_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM61(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM61_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM61_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM93_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM93_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM93_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM93(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM93_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM93_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM125_MASK (0x20000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM125_SHIFT (29U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM125_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM125(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM125_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM125_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM30_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM30_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM30_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM30_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM30_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM62_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM62_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM62_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM62(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM62_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM62_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM94_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM94_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM94_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM94(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM94_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM94_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM126_MASK (0x40000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM126_SHIFT (30U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM126_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM126(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM126_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM126_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM31_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM31_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM31_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM31_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM31_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM63_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM63_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM63_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM63(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM63_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM63_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM95_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM95_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM95_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM95(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM95_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM95_MASK) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM127_MASK (0x80000000U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM127_SHIFT (31U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM127_WIDTH (1U) #define CANXL_GRP_CONTROL_MSGIMASK_MSGDIM127(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_MSGIMASK_MSGDIM127_SHIFT)) & CANXL_GRP_CONTROL_MSGIMASK_MSGDIM127_MASK) /*! @} */ /*! @name FREEDSC0 - Free Descriptor Index 0 */ /*! @{ */ #define CANXL_GRP_CONTROL_FREEDSC0_TMWMRK_MASK (0x7U) #define CANXL_GRP_CONTROL_FREEDSC0_TMWMRK_SHIFT (0U) #define CANXL_GRP_CONTROL_FREEDSC0_TMWMRK_WIDTH (3U) #define CANXL_GRP_CONTROL_FREEDSC0_TMWMRK(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_FREEDSC0_TMWMRK_SHIFT)) & CANXL_GRP_CONTROL_FREEDSC0_TMWMRK_MASK) /*! @} */ /*! @name OVERRUNF - Descriptor Overrun Flag */ /*! @{ */ #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF0_MASK (0x1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF0_SHIFT (0U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF0_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF0_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF0_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF32_MASK (0x1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF32_SHIFT (0U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF32_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF32(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF32_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF32_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF64_MASK (0x1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF64_SHIFT (0U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF64_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF64(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF64_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF64_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF96_MASK (0x1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF96_SHIFT (0U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF96_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF96(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF96_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF96_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF1_MASK (0x2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF1_SHIFT (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF1_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF1_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF1_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF33_MASK (0x2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF33_SHIFT (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF33_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF33(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF33_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF33_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF65_MASK (0x2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF65_SHIFT (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF65_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF65(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF65_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF65_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF97_MASK (0x2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF97_SHIFT (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF97_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF97(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF97_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF97_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF2_MASK (0x4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF2_SHIFT (2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF2_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF2_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF2_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF34_MASK (0x4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF34_SHIFT (2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF34_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF34(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF34_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF34_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF66_MASK (0x4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF66_SHIFT (2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF66_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF66(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF66_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF66_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF98_MASK (0x4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF98_SHIFT (2U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF98_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF98(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF98_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF98_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF3_MASK (0x8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF3_SHIFT (3U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF3_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF3_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF3_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF35_MASK (0x8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF35_SHIFT (3U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF35_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF35(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF35_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF35_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF67_MASK (0x8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF67_SHIFT (3U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF67_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF67(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF67_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF67_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF99_MASK (0x8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF99_SHIFT (3U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF99_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF99(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF99_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF99_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF4_MASK (0x10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF4_SHIFT (4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF4_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF4_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF4_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF36_MASK (0x10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF36_SHIFT (4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF36_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF36(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF36_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF36_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF68_MASK (0x10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF68_SHIFT (4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF68_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF68(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF68_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF68_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF100_MASK (0x10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF100_SHIFT (4U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF100_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF100(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF100_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF100_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF5_MASK (0x20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF5_SHIFT (5U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF5_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF5_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF5_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF37_MASK (0x20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF37_SHIFT (5U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF37_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF37(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF37_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF37_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF69_MASK (0x20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF69_SHIFT (5U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF69_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF69(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF69_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF69_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF101_MASK (0x20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF101_SHIFT (5U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF101_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF101(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF101_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF101_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF6_MASK (0x40U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF6_SHIFT (6U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF6_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF6_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF6_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF38_MASK (0x40U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF38_SHIFT (6U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF38_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF38(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF38_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF38_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF70_MASK (0x40U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF70_SHIFT (6U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF70_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF70(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF70_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF70_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF102_MASK (0x40U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF102_SHIFT (6U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF102_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF102(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF102_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF102_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF7_MASK (0x80U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF7_SHIFT (7U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF7_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF7_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF7_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF39_MASK (0x80U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF39_SHIFT (7U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF39_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF39(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF39_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF39_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF71_MASK (0x80U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF71_SHIFT (7U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF71_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF71(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF71_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF71_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF103_MASK (0x80U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF103_SHIFT (7U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF103_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF103(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF103_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF103_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF8_MASK (0x100U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF8_SHIFT (8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF8_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF8_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF8_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF40_MASK (0x100U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF40_SHIFT (8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF40_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF40(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF40_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF40_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF72_MASK (0x100U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF72_SHIFT (8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF72_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF72(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF72_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF72_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF104_MASK (0x100U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF104_SHIFT (8U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF104_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF104(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF104_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF104_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF9_MASK (0x200U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF9_SHIFT (9U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF9_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF9_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF9_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF41_MASK (0x200U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF41_SHIFT (9U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF41_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF41(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF41_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF41_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF73_MASK (0x200U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF73_SHIFT (9U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF73_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF73(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF73_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF73_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF105_MASK (0x200U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF105_SHIFT (9U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF105_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF105(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF105_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF105_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF10_MASK (0x400U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF10_SHIFT (10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF10_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF10_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF10_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF42_MASK (0x400U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF42_SHIFT (10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF42_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF42(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF42_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF42_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF74_MASK (0x400U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF74_SHIFT (10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF74_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF74(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF74_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF74_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF106_MASK (0x400U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF106_SHIFT (10U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF106_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF106(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF106_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF106_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF11_MASK (0x800U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF11_SHIFT (11U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF11_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF11_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF11_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF43_MASK (0x800U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF43_SHIFT (11U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF43_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF43(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF43_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF43_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF75_MASK (0x800U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF75_SHIFT (11U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF75_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF75(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF75_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF75_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF107_MASK (0x800U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF107_SHIFT (11U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF107_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF107(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF107_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF107_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF12_MASK (0x1000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF12_SHIFT (12U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF12_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF12_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF12_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF44_MASK (0x1000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF44_SHIFT (12U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF44_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF44(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF44_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF44_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF76_MASK (0x1000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF76_SHIFT (12U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF76_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF76(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF76_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF76_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF108_MASK (0x1000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF108_SHIFT (12U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF108_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF108(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF108_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF108_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF13_MASK (0x2000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF13_SHIFT (13U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF13_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF13_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF13_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF45_MASK (0x2000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF45_SHIFT (13U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF45_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF45(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF45_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF45_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF77_MASK (0x2000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF77_SHIFT (13U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF77_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF77(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF77_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF77_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF109_MASK (0x2000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF109_SHIFT (13U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF109_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF109(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF109_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF109_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF14_MASK (0x4000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF14_SHIFT (14U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF14_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF14_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF14_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF46_MASK (0x4000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF46_SHIFT (14U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF46_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF46(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF46_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF46_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF78_MASK (0x4000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF78_SHIFT (14U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF78_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF78(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF78_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF78_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF110_MASK (0x4000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF110_SHIFT (14U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF110_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF110(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF110_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF110_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF15_MASK (0x8000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF15_SHIFT (15U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF15_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF15_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF15_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF47_MASK (0x8000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF47_SHIFT (15U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF47_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF47(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF47_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF47_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF79_MASK (0x8000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF79_SHIFT (15U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF79_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF79(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF79_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF79_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF111_MASK (0x8000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF111_SHIFT (15U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF111_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF111(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF111_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF111_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF16_MASK (0x10000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF16_SHIFT (16U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF16_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF16_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF16_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF48_MASK (0x10000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF48_SHIFT (16U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF48_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF48(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF48_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF48_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF80_MASK (0x10000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF80_SHIFT (16U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF80_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF80(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF80_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF80_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF112_MASK (0x10000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF112_SHIFT (16U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF112_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF112(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF112_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF112_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF17_MASK (0x20000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF17_SHIFT (17U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF17_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF17_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF17_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF49_MASK (0x20000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF49_SHIFT (17U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF49_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF49(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF49_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF49_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF81_MASK (0x20000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF81_SHIFT (17U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF81_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF81(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF81_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF81_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF113_MASK (0x20000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF113_SHIFT (17U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF113_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF113(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF113_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF113_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF18_MASK (0x40000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF18_SHIFT (18U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF18_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF18_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF18_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF50_MASK (0x40000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF50_SHIFT (18U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF50_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF50(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF50_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF50_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF82_MASK (0x40000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF82_SHIFT (18U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF82_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF82(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF82_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF82_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF114_MASK (0x40000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF114_SHIFT (18U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF114_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF114(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF114_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF114_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF19_MASK (0x80000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF19_SHIFT (19U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF19_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF19_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF19_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF51_MASK (0x80000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF51_SHIFT (19U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF51_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF51(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF51_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF51_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF83_MASK (0x80000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF83_SHIFT (19U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF83_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF83(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF83_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF83_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF115_MASK (0x80000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF115_SHIFT (19U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF115_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF115(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF115_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF115_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF20_MASK (0x100000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF20_SHIFT (20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF20_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF20_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF20_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF52_MASK (0x100000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF52_SHIFT (20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF52_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF52(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF52_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF52_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF84_MASK (0x100000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF84_SHIFT (20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF84_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF84(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF84_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF84_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF116_MASK (0x100000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF116_SHIFT (20U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF116_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF116(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF116_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF116_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF21_MASK (0x200000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF21_SHIFT (21U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF21_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF21_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF21_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF53_MASK (0x200000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF53_SHIFT (21U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF53_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF53(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF53_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF53_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF85_MASK (0x200000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF85_SHIFT (21U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF85_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF85(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF85_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF85_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF117_MASK (0x200000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF117_SHIFT (21U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF117_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF117(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF117_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF117_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF22_MASK (0x400000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF22_SHIFT (22U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF22_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF22_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF22_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF54_MASK (0x400000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF54_SHIFT (22U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF54_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF54(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF54_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF54_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF86_MASK (0x400000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF86_SHIFT (22U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF86_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF86(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF86_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF86_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF118_MASK (0x400000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF118_SHIFT (22U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF118_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF118(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF118_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF118_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF23_MASK (0x800000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF23_SHIFT (23U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF23_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF23_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF23_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF55_MASK (0x800000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF55_SHIFT (23U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF55_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF55(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF55_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF55_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF87_MASK (0x800000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF87_SHIFT (23U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF87_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF87(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF87_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF87_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF119_MASK (0x800000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF119_SHIFT (23U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF119_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF119(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF119_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF119_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF24_MASK (0x1000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF24_SHIFT (24U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF24_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF24_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF24_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF56_MASK (0x1000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF56_SHIFT (24U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF56_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF56(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF56_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF56_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF88_MASK (0x1000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF88_SHIFT (24U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF88_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF88(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF88_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF88_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF120_MASK (0x1000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF120_SHIFT (24U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF120_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF120(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF120_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF120_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF25_MASK (0x2000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF25_SHIFT (25U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF25_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF25_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF25_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF57_MASK (0x2000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF57_SHIFT (25U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF57_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF57(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF57_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF57_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF89_MASK (0x2000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF89_SHIFT (25U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF89_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF89(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF89_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF89_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF121_MASK (0x2000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF121_SHIFT (25U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF121_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF121(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF121_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF121_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF26_MASK (0x4000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF26_SHIFT (26U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF26_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF26_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF26_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF58_MASK (0x4000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF58_SHIFT (26U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF58_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF58(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF58_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF58_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF90_MASK (0x4000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF90_SHIFT (26U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF90_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF90(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF90_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF90_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF122_MASK (0x4000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF122_SHIFT (26U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF122_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF122(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF122_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF122_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF27_MASK (0x8000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF27_SHIFT (27U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF27_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF27_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF27_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF59_MASK (0x8000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF59_SHIFT (27U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF59_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF59(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF59_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF59_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF91_MASK (0x8000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF91_SHIFT (27U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF91_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF91(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF91_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF91_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF123_MASK (0x8000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF123_SHIFT (27U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF123_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF123(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF123_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF123_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF28_MASK (0x10000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF28_SHIFT (28U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF28_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF28_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF28_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF60_MASK (0x10000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF60_SHIFT (28U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF60_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF60(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF60_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF60_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF92_MASK (0x10000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF92_SHIFT (28U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF92_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF92(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF92_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF92_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF124_MASK (0x10000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF124_SHIFT (28U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF124_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF124(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF124_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF124_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF29_MASK (0x20000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF29_SHIFT (29U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF29_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF29_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF29_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF61_MASK (0x20000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF61_SHIFT (29U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF61_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF61(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF61_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF61_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF93_MASK (0x20000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF93_SHIFT (29U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF93_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF93(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF93_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF93_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF125_MASK (0x20000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF125_SHIFT (29U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF125_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF125(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF125_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF125_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF30_MASK (0x40000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF30_SHIFT (30U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF30_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF30_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF30_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF62_MASK (0x40000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF62_SHIFT (30U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF62_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF62(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF62_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF62_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF94_MASK (0x40000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF94_SHIFT (30U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF94_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF94(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF94_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF94_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF126_MASK (0x40000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF126_SHIFT (30U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF126_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF126(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF126_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF126_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF31_MASK (0x80000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF31_SHIFT (31U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF31_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF31_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF31_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF63_MASK (0x80000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF63_SHIFT (31U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF63_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF63(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF63_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF63_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF95_MASK (0x80000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF95_SHIFT (31U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF95_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF95(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF95_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF95_MASK) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF127_MASK (0x80000000U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF127_SHIFT (31U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF127_WIDTH (1U) #define CANXL_GRP_CONTROL_OVERRUNF_OVRRF127(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_OVERRUNF_OVRRF127_SHIFT)) & CANXL_GRP_CONTROL_OVERRUNF_OVRRF127_MASK) /*! @} */ /*! @name URUNF - Under Run Flag */ /*! @{ */ #define CANXL_GRP_CONTROL_URUNF_URUNF0_MASK (0x1U) #define CANXL_GRP_CONTROL_URUNF_URUNF0_SHIFT (0U) #define CANXL_GRP_CONTROL_URUNF_URUNF0_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF0_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF0_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF32_MASK (0x1U) #define CANXL_GRP_CONTROL_URUNF_URUNF32_SHIFT (0U) #define CANXL_GRP_CONTROL_URUNF_URUNF32_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF32(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF32_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF32_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF64_MASK (0x1U) #define CANXL_GRP_CONTROL_URUNF_URUNF64_SHIFT (0U) #define CANXL_GRP_CONTROL_URUNF_URUNF64_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF64(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF64_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF64_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF96_MASK (0x1U) #define CANXL_GRP_CONTROL_URUNF_URUNF96_SHIFT (0U) #define CANXL_GRP_CONTROL_URUNF_URUNF96_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF96(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF96_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF96_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF1_MASK (0x2U) #define CANXL_GRP_CONTROL_URUNF_URUNF1_SHIFT (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF1_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF1_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF1_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF33_MASK (0x2U) #define CANXL_GRP_CONTROL_URUNF_URUNF33_SHIFT (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF33_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF33(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF33_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF33_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF65_MASK (0x2U) #define CANXL_GRP_CONTROL_URUNF_URUNF65_SHIFT (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF65_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF65(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF65_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF65_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF97_MASK (0x2U) #define CANXL_GRP_CONTROL_URUNF_URUNF97_SHIFT (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF97_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF97(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF97_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF97_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF2_MASK (0x4U) #define CANXL_GRP_CONTROL_URUNF_URUNF2_SHIFT (2U) #define CANXL_GRP_CONTROL_URUNF_URUNF2_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF2_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF2_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF34_MASK (0x4U) #define CANXL_GRP_CONTROL_URUNF_URUNF34_SHIFT (2U) #define CANXL_GRP_CONTROL_URUNF_URUNF34_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF34(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF34_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF34_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF66_MASK (0x4U) #define CANXL_GRP_CONTROL_URUNF_URUNF66_SHIFT (2U) #define CANXL_GRP_CONTROL_URUNF_URUNF66_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF66(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF66_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF66_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF98_MASK (0x4U) #define CANXL_GRP_CONTROL_URUNF_URUNF98_SHIFT (2U) #define CANXL_GRP_CONTROL_URUNF_URUNF98_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF98(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF98_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF98_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF3_MASK (0x8U) #define CANXL_GRP_CONTROL_URUNF_URUNF3_SHIFT (3U) #define CANXL_GRP_CONTROL_URUNF_URUNF3_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF3_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF3_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF35_MASK (0x8U) #define CANXL_GRP_CONTROL_URUNF_URUNF35_SHIFT (3U) #define CANXL_GRP_CONTROL_URUNF_URUNF35_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF35(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF35_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF35_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF67_MASK (0x8U) #define CANXL_GRP_CONTROL_URUNF_URUNF67_SHIFT (3U) #define CANXL_GRP_CONTROL_URUNF_URUNF67_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF67(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF67_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF67_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF99_MASK (0x8U) #define CANXL_GRP_CONTROL_URUNF_URUNF99_SHIFT (3U) #define CANXL_GRP_CONTROL_URUNF_URUNF99_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF99(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF99_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF99_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF4_MASK (0x10U) #define CANXL_GRP_CONTROL_URUNF_URUNF4_SHIFT (4U) #define CANXL_GRP_CONTROL_URUNF_URUNF4_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF4_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF4_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF36_MASK (0x10U) #define CANXL_GRP_CONTROL_URUNF_URUNF36_SHIFT (4U) #define CANXL_GRP_CONTROL_URUNF_URUNF36_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF36(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF36_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF36_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF68_MASK (0x10U) #define CANXL_GRP_CONTROL_URUNF_URUNF68_SHIFT (4U) #define CANXL_GRP_CONTROL_URUNF_URUNF68_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF68(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF68_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF68_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF100_MASK (0x10U) #define CANXL_GRP_CONTROL_URUNF_URUNF100_SHIFT (4U) #define CANXL_GRP_CONTROL_URUNF_URUNF100_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF100(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF100_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF100_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF5_MASK (0x20U) #define CANXL_GRP_CONTROL_URUNF_URUNF5_SHIFT (5U) #define CANXL_GRP_CONTROL_URUNF_URUNF5_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF5_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF5_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF37_MASK (0x20U) #define CANXL_GRP_CONTROL_URUNF_URUNF37_SHIFT (5U) #define CANXL_GRP_CONTROL_URUNF_URUNF37_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF37(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF37_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF37_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF69_MASK (0x20U) #define CANXL_GRP_CONTROL_URUNF_URUNF69_SHIFT (5U) #define CANXL_GRP_CONTROL_URUNF_URUNF69_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF69(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF69_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF69_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF101_MASK (0x20U) #define CANXL_GRP_CONTROL_URUNF_URUNF101_SHIFT (5U) #define CANXL_GRP_CONTROL_URUNF_URUNF101_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF101(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF101_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF101_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF6_MASK (0x40U) #define CANXL_GRP_CONTROL_URUNF_URUNF6_SHIFT (6U) #define CANXL_GRP_CONTROL_URUNF_URUNF6_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF6_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF6_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF38_MASK (0x40U) #define CANXL_GRP_CONTROL_URUNF_URUNF38_SHIFT (6U) #define CANXL_GRP_CONTROL_URUNF_URUNF38_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF38(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF38_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF38_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF70_MASK (0x40U) #define CANXL_GRP_CONTROL_URUNF_URUNF70_SHIFT (6U) #define CANXL_GRP_CONTROL_URUNF_URUNF70_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF70(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF70_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF70_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF102_MASK (0x40U) #define CANXL_GRP_CONTROL_URUNF_URUNF102_SHIFT (6U) #define CANXL_GRP_CONTROL_URUNF_URUNF102_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF102(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF102_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF102_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF7_MASK (0x80U) #define CANXL_GRP_CONTROL_URUNF_URUNF7_SHIFT (7U) #define CANXL_GRP_CONTROL_URUNF_URUNF7_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF7_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF7_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF39_MASK (0x80U) #define CANXL_GRP_CONTROL_URUNF_URUNF39_SHIFT (7U) #define CANXL_GRP_CONTROL_URUNF_URUNF39_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF39(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF39_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF39_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF71_MASK (0x80U) #define CANXL_GRP_CONTROL_URUNF_URUNF71_SHIFT (7U) #define CANXL_GRP_CONTROL_URUNF_URUNF71_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF71(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF71_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF71_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF103_MASK (0x80U) #define CANXL_GRP_CONTROL_URUNF_URUNF103_SHIFT (7U) #define CANXL_GRP_CONTROL_URUNF_URUNF103_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF103(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF103_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF103_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF8_MASK (0x100U) #define CANXL_GRP_CONTROL_URUNF_URUNF8_SHIFT (8U) #define CANXL_GRP_CONTROL_URUNF_URUNF8_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF8_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF8_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF40_MASK (0x100U) #define CANXL_GRP_CONTROL_URUNF_URUNF40_SHIFT (8U) #define CANXL_GRP_CONTROL_URUNF_URUNF40_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF40(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF40_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF40_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF72_MASK (0x100U) #define CANXL_GRP_CONTROL_URUNF_URUNF72_SHIFT (8U) #define CANXL_GRP_CONTROL_URUNF_URUNF72_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF72(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF72_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF72_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF104_MASK (0x100U) #define CANXL_GRP_CONTROL_URUNF_URUNF104_SHIFT (8U) #define CANXL_GRP_CONTROL_URUNF_URUNF104_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF104(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF104_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF104_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF9_MASK (0x200U) #define CANXL_GRP_CONTROL_URUNF_URUNF9_SHIFT (9U) #define CANXL_GRP_CONTROL_URUNF_URUNF9_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF9_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF9_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF41_MASK (0x200U) #define CANXL_GRP_CONTROL_URUNF_URUNF41_SHIFT (9U) #define CANXL_GRP_CONTROL_URUNF_URUNF41_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF41(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF41_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF41_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF73_MASK (0x200U) #define CANXL_GRP_CONTROL_URUNF_URUNF73_SHIFT (9U) #define CANXL_GRP_CONTROL_URUNF_URUNF73_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF73(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF73_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF73_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF105_MASK (0x200U) #define CANXL_GRP_CONTROL_URUNF_URUNF105_SHIFT (9U) #define CANXL_GRP_CONTROL_URUNF_URUNF105_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF105(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF105_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF105_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF10_MASK (0x400U) #define CANXL_GRP_CONTROL_URUNF_URUNF10_SHIFT (10U) #define CANXL_GRP_CONTROL_URUNF_URUNF10_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF10_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF10_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF42_MASK (0x400U) #define CANXL_GRP_CONTROL_URUNF_URUNF42_SHIFT (10U) #define CANXL_GRP_CONTROL_URUNF_URUNF42_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF42(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF42_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF42_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF74_MASK (0x400U) #define CANXL_GRP_CONTROL_URUNF_URUNF74_SHIFT (10U) #define CANXL_GRP_CONTROL_URUNF_URUNF74_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF74(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF74_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF74_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF106_MASK (0x400U) #define CANXL_GRP_CONTROL_URUNF_URUNF106_SHIFT (10U) #define CANXL_GRP_CONTROL_URUNF_URUNF106_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF106(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF106_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF106_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF11_MASK (0x800U) #define CANXL_GRP_CONTROL_URUNF_URUNF11_SHIFT (11U) #define CANXL_GRP_CONTROL_URUNF_URUNF11_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF11_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF11_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF43_MASK (0x800U) #define CANXL_GRP_CONTROL_URUNF_URUNF43_SHIFT (11U) #define CANXL_GRP_CONTROL_URUNF_URUNF43_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF43(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF43_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF43_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF75_MASK (0x800U) #define CANXL_GRP_CONTROL_URUNF_URUNF75_SHIFT (11U) #define CANXL_GRP_CONTROL_URUNF_URUNF75_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF75(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF75_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF75_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF107_MASK (0x800U) #define CANXL_GRP_CONTROL_URUNF_URUNF107_SHIFT (11U) #define CANXL_GRP_CONTROL_URUNF_URUNF107_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF107(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF107_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF107_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF12_MASK (0x1000U) #define CANXL_GRP_CONTROL_URUNF_URUNF12_SHIFT (12U) #define CANXL_GRP_CONTROL_URUNF_URUNF12_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF12_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF12_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF44_MASK (0x1000U) #define CANXL_GRP_CONTROL_URUNF_URUNF44_SHIFT (12U) #define CANXL_GRP_CONTROL_URUNF_URUNF44_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF44(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF44_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF44_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF76_MASK (0x1000U) #define CANXL_GRP_CONTROL_URUNF_URUNF76_SHIFT (12U) #define CANXL_GRP_CONTROL_URUNF_URUNF76_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF76(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF76_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF76_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF108_MASK (0x1000U) #define CANXL_GRP_CONTROL_URUNF_URUNF108_SHIFT (12U) #define CANXL_GRP_CONTROL_URUNF_URUNF108_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF108(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF108_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF108_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF13_MASK (0x2000U) #define CANXL_GRP_CONTROL_URUNF_URUNF13_SHIFT (13U) #define CANXL_GRP_CONTROL_URUNF_URUNF13_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF13_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF13_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF45_MASK (0x2000U) #define CANXL_GRP_CONTROL_URUNF_URUNF45_SHIFT (13U) #define CANXL_GRP_CONTROL_URUNF_URUNF45_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF45(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF45_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF45_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF77_MASK (0x2000U) #define CANXL_GRP_CONTROL_URUNF_URUNF77_SHIFT (13U) #define CANXL_GRP_CONTROL_URUNF_URUNF77_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF77(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF77_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF77_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF109_MASK (0x2000U) #define CANXL_GRP_CONTROL_URUNF_URUNF109_SHIFT (13U) #define CANXL_GRP_CONTROL_URUNF_URUNF109_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF109(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF109_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF109_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF14_MASK (0x4000U) #define CANXL_GRP_CONTROL_URUNF_URUNF14_SHIFT (14U) #define CANXL_GRP_CONTROL_URUNF_URUNF14_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF14_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF14_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF46_MASK (0x4000U) #define CANXL_GRP_CONTROL_URUNF_URUNF46_SHIFT (14U) #define CANXL_GRP_CONTROL_URUNF_URUNF46_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF46(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF46_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF46_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF78_MASK (0x4000U) #define CANXL_GRP_CONTROL_URUNF_URUNF78_SHIFT (14U) #define CANXL_GRP_CONTROL_URUNF_URUNF78_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF78(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF78_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF78_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF110_MASK (0x4000U) #define CANXL_GRP_CONTROL_URUNF_URUNF110_SHIFT (14U) #define CANXL_GRP_CONTROL_URUNF_URUNF110_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF110(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF110_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF110_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF15_MASK (0x8000U) #define CANXL_GRP_CONTROL_URUNF_URUNF15_SHIFT (15U) #define CANXL_GRP_CONTROL_URUNF_URUNF15_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF15_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF15_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF47_MASK (0x8000U) #define CANXL_GRP_CONTROL_URUNF_URUNF47_SHIFT (15U) #define CANXL_GRP_CONTROL_URUNF_URUNF47_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF47(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF47_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF47_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF79_MASK (0x8000U) #define CANXL_GRP_CONTROL_URUNF_URUNF79_SHIFT (15U) #define CANXL_GRP_CONTROL_URUNF_URUNF79_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF79(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF79_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF79_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF111_MASK (0x8000U) #define CANXL_GRP_CONTROL_URUNF_URUNF111_SHIFT (15U) #define CANXL_GRP_CONTROL_URUNF_URUNF111_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF111(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF111_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF111_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF16_MASK (0x10000U) #define CANXL_GRP_CONTROL_URUNF_URUNF16_SHIFT (16U) #define CANXL_GRP_CONTROL_URUNF_URUNF16_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF16_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF16_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF48_MASK (0x10000U) #define CANXL_GRP_CONTROL_URUNF_URUNF48_SHIFT (16U) #define CANXL_GRP_CONTROL_URUNF_URUNF48_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF48(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF48_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF48_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF80_MASK (0x10000U) #define CANXL_GRP_CONTROL_URUNF_URUNF80_SHIFT (16U) #define CANXL_GRP_CONTROL_URUNF_URUNF80_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF80(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF80_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF80_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF112_MASK (0x10000U) #define CANXL_GRP_CONTROL_URUNF_URUNF112_SHIFT (16U) #define CANXL_GRP_CONTROL_URUNF_URUNF112_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF112(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF112_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF112_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF17_MASK (0x20000U) #define CANXL_GRP_CONTROL_URUNF_URUNF17_SHIFT (17U) #define CANXL_GRP_CONTROL_URUNF_URUNF17_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF17_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF17_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF49_MASK (0x20000U) #define CANXL_GRP_CONTROL_URUNF_URUNF49_SHIFT (17U) #define CANXL_GRP_CONTROL_URUNF_URUNF49_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF49(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF49_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF49_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF81_MASK (0x20000U) #define CANXL_GRP_CONTROL_URUNF_URUNF81_SHIFT (17U) #define CANXL_GRP_CONTROL_URUNF_URUNF81_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF81(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF81_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF81_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF113_MASK (0x20000U) #define CANXL_GRP_CONTROL_URUNF_URUNF113_SHIFT (17U) #define CANXL_GRP_CONTROL_URUNF_URUNF113_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF113(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF113_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF113_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF18_MASK (0x40000U) #define CANXL_GRP_CONTROL_URUNF_URUNF18_SHIFT (18U) #define CANXL_GRP_CONTROL_URUNF_URUNF18_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF18_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF18_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF50_MASK (0x40000U) #define CANXL_GRP_CONTROL_URUNF_URUNF50_SHIFT (18U) #define CANXL_GRP_CONTROL_URUNF_URUNF50_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF50(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF50_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF50_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF82_MASK (0x40000U) #define CANXL_GRP_CONTROL_URUNF_URUNF82_SHIFT (18U) #define CANXL_GRP_CONTROL_URUNF_URUNF82_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF82(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF82_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF82_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF114_MASK (0x40000U) #define CANXL_GRP_CONTROL_URUNF_URUNF114_SHIFT (18U) #define CANXL_GRP_CONTROL_URUNF_URUNF114_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF114(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF114_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF114_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF19_MASK (0x80000U) #define CANXL_GRP_CONTROL_URUNF_URUNF19_SHIFT (19U) #define CANXL_GRP_CONTROL_URUNF_URUNF19_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF19_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF19_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF51_MASK (0x80000U) #define CANXL_GRP_CONTROL_URUNF_URUNF51_SHIFT (19U) #define CANXL_GRP_CONTROL_URUNF_URUNF51_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF51(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF51_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF51_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF83_MASK (0x80000U) #define CANXL_GRP_CONTROL_URUNF_URUNF83_SHIFT (19U) #define CANXL_GRP_CONTROL_URUNF_URUNF83_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF83(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF83_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF83_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF115_MASK (0x80000U) #define CANXL_GRP_CONTROL_URUNF_URUNF115_SHIFT (19U) #define CANXL_GRP_CONTROL_URUNF_URUNF115_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF115(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF115_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF115_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF20_MASK (0x100000U) #define CANXL_GRP_CONTROL_URUNF_URUNF20_SHIFT (20U) #define CANXL_GRP_CONTROL_URUNF_URUNF20_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF20_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF20_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF52_MASK (0x100000U) #define CANXL_GRP_CONTROL_URUNF_URUNF52_SHIFT (20U) #define CANXL_GRP_CONTROL_URUNF_URUNF52_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF52(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF52_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF52_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF84_MASK (0x100000U) #define CANXL_GRP_CONTROL_URUNF_URUNF84_SHIFT (20U) #define CANXL_GRP_CONTROL_URUNF_URUNF84_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF84(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF84_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF84_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF116_MASK (0x100000U) #define CANXL_GRP_CONTROL_URUNF_URUNF116_SHIFT (20U) #define CANXL_GRP_CONTROL_URUNF_URUNF116_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF116(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF116_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF116_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF21_MASK (0x200000U) #define CANXL_GRP_CONTROL_URUNF_URUNF21_SHIFT (21U) #define CANXL_GRP_CONTROL_URUNF_URUNF21_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF21_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF21_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF53_MASK (0x200000U) #define CANXL_GRP_CONTROL_URUNF_URUNF53_SHIFT (21U) #define CANXL_GRP_CONTROL_URUNF_URUNF53_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF53(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF53_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF53_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF85_MASK (0x200000U) #define CANXL_GRP_CONTROL_URUNF_URUNF85_SHIFT (21U) #define CANXL_GRP_CONTROL_URUNF_URUNF85_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF85(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF85_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF85_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF117_MASK (0x200000U) #define CANXL_GRP_CONTROL_URUNF_URUNF117_SHIFT (21U) #define CANXL_GRP_CONTROL_URUNF_URUNF117_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF117(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF117_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF117_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF22_MASK (0x400000U) #define CANXL_GRP_CONTROL_URUNF_URUNF22_SHIFT (22U) #define CANXL_GRP_CONTROL_URUNF_URUNF22_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF22_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF22_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF54_MASK (0x400000U) #define CANXL_GRP_CONTROL_URUNF_URUNF54_SHIFT (22U) #define CANXL_GRP_CONTROL_URUNF_URUNF54_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF54(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF54_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF54_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF86_MASK (0x400000U) #define CANXL_GRP_CONTROL_URUNF_URUNF86_SHIFT (22U) #define CANXL_GRP_CONTROL_URUNF_URUNF86_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF86(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF86_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF86_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF118_MASK (0x400000U) #define CANXL_GRP_CONTROL_URUNF_URUNF118_SHIFT (22U) #define CANXL_GRP_CONTROL_URUNF_URUNF118_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF118(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF118_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF118_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF23_MASK (0x800000U) #define CANXL_GRP_CONTROL_URUNF_URUNF23_SHIFT (23U) #define CANXL_GRP_CONTROL_URUNF_URUNF23_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF23_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF23_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF55_MASK (0x800000U) #define CANXL_GRP_CONTROL_URUNF_URUNF55_SHIFT (23U) #define CANXL_GRP_CONTROL_URUNF_URUNF55_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF55(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF55_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF55_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF87_MASK (0x800000U) #define CANXL_GRP_CONTROL_URUNF_URUNF87_SHIFT (23U) #define CANXL_GRP_CONTROL_URUNF_URUNF87_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF87(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF87_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF87_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF119_MASK (0x800000U) #define CANXL_GRP_CONTROL_URUNF_URUNF119_SHIFT (23U) #define CANXL_GRP_CONTROL_URUNF_URUNF119_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF119(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF119_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF119_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF24_MASK (0x1000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF24_SHIFT (24U) #define CANXL_GRP_CONTROL_URUNF_URUNF24_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF24_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF24_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF56_MASK (0x1000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF56_SHIFT (24U) #define CANXL_GRP_CONTROL_URUNF_URUNF56_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF56(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF56_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF56_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF88_MASK (0x1000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF88_SHIFT (24U) #define CANXL_GRP_CONTROL_URUNF_URUNF88_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF88(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF88_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF88_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF120_MASK (0x1000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF120_SHIFT (24U) #define CANXL_GRP_CONTROL_URUNF_URUNF120_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF120(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF120_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF120_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF25_MASK (0x2000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF25_SHIFT (25U) #define CANXL_GRP_CONTROL_URUNF_URUNF25_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF25_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF25_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF57_MASK (0x2000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF57_SHIFT (25U) #define CANXL_GRP_CONTROL_URUNF_URUNF57_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF57(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF57_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF57_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF89_MASK (0x2000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF89_SHIFT (25U) #define CANXL_GRP_CONTROL_URUNF_URUNF89_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF89(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF89_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF89_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF121_MASK (0x2000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF121_SHIFT (25U) #define CANXL_GRP_CONTROL_URUNF_URUNF121_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF121(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF121_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF121_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF26_MASK (0x4000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF26_SHIFT (26U) #define CANXL_GRP_CONTROL_URUNF_URUNF26_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF26_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF26_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF58_MASK (0x4000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF58_SHIFT (26U) #define CANXL_GRP_CONTROL_URUNF_URUNF58_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF58(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF58_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF58_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF90_MASK (0x4000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF90_SHIFT (26U) #define CANXL_GRP_CONTROL_URUNF_URUNF90_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF90(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF90_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF90_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF122_MASK (0x4000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF122_SHIFT (26U) #define CANXL_GRP_CONTROL_URUNF_URUNF122_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF122(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF122_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF122_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF27_MASK (0x8000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF27_SHIFT (27U) #define CANXL_GRP_CONTROL_URUNF_URUNF27_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF27_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF27_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF59_MASK (0x8000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF59_SHIFT (27U) #define CANXL_GRP_CONTROL_URUNF_URUNF59_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF59(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF59_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF59_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF91_MASK (0x8000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF91_SHIFT (27U) #define CANXL_GRP_CONTROL_URUNF_URUNF91_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF91(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF91_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF91_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF123_MASK (0x8000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF123_SHIFT (27U) #define CANXL_GRP_CONTROL_URUNF_URUNF123_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF123(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF123_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF123_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF28_MASK (0x10000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF28_SHIFT (28U) #define CANXL_GRP_CONTROL_URUNF_URUNF28_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF28_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF28_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF60_MASK (0x10000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF60_SHIFT (28U) #define CANXL_GRP_CONTROL_URUNF_URUNF60_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF60(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF60_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF60_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF92_MASK (0x10000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF92_SHIFT (28U) #define CANXL_GRP_CONTROL_URUNF_URUNF92_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF92(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF92_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF92_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF124_MASK (0x10000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF124_SHIFT (28U) #define CANXL_GRP_CONTROL_URUNF_URUNF124_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF124(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF124_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF124_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF29_MASK (0x20000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF29_SHIFT (29U) #define CANXL_GRP_CONTROL_URUNF_URUNF29_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF29_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF29_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF61_MASK (0x20000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF61_SHIFT (29U) #define CANXL_GRP_CONTROL_URUNF_URUNF61_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF61(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF61_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF61_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF93_MASK (0x20000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF93_SHIFT (29U) #define CANXL_GRP_CONTROL_URUNF_URUNF93_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF93(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF93_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF93_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF125_MASK (0x20000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF125_SHIFT (29U) #define CANXL_GRP_CONTROL_URUNF_URUNF125_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF125(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF125_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF125_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF30_MASK (0x40000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF30_SHIFT (30U) #define CANXL_GRP_CONTROL_URUNF_URUNF30_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF30_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF30_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF62_MASK (0x40000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF62_SHIFT (30U) #define CANXL_GRP_CONTROL_URUNF_URUNF62_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF62(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF62_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF62_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF94_MASK (0x40000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF94_SHIFT (30U) #define CANXL_GRP_CONTROL_URUNF_URUNF94_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF94(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF94_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF94_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF126_MASK (0x40000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF126_SHIFT (30U) #define CANXL_GRP_CONTROL_URUNF_URUNF126_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF126(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF126_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF126_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF31_MASK (0x80000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF31_SHIFT (31U) #define CANXL_GRP_CONTROL_URUNF_URUNF31_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF31_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF31_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF63_MASK (0x80000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF63_SHIFT (31U) #define CANXL_GRP_CONTROL_URUNF_URUNF63_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF63(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF63_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF63_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF95_MASK (0x80000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF95_SHIFT (31U) #define CANXL_GRP_CONTROL_URUNF_URUNF95_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF95(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF95_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF95_MASK) #define CANXL_GRP_CONTROL_URUNF_URUNF127_MASK (0x80000000U) #define CANXL_GRP_CONTROL_URUNF_URUNF127_SHIFT (31U) #define CANXL_GRP_CONTROL_URUNF_URUNF127_WIDTH (1U) #define CANXL_GRP_CONTROL_URUNF_URUNF127(x) (((uint32_t)(((uint32_t)(x)) << CANXL_GRP_CONTROL_URUNF_URUNF127_SHIFT)) & CANXL_GRP_CONTROL_URUNF_URUNF127_MASK) /*! @} */ /*! * @} */ /* end of group CANXL_GRP_CONTROL_Register_Masks */ /*! * @} */ /* end of group CANXL_GRP_CONTROL_Peripheral_Access_Layer */ #endif /* #if !defined(S32Z2_CANXL_GRP_CONTROL_H_) */