/*
 * Instance header file for PIC32CX1025SG61128
 *
 * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *   http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 */

/* file generated from device description file (ATDF) version 2023-03-17T09:48:59Z */
#ifndef _PIC32CXSG61_AES_INSTANCE_
#define _PIC32CXSG61_AES_INSTANCE_


/* ========== Instance Parameter definitions for AES peripheral ========== */
#define AES_DMAC_ID_RD                           (82)       /* DMA DATA Read trigger */
#define AES_DMAC_ID_WR                           (81)       /* DMA DATA Write trigger */
#define AES_FOUR_BYTE_OPERATION                  (1)        /* Byte Operation */
#define AES_GCM                                  (1)        /* GCM */
#define AES_INSTANCE_ID                          (73)       /* Instance index for AES */
#define AES_KEYLEN                               (2)        /* Key Length */

#endif /* _PIC32CXSG61_AES_INSTANCE_ */