/* * Instance header file for PIC32CX1025SG41128 * * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * */ /* file generated from device description file (ATDF) version 2023-03-17T09:48:34Z */ #ifndef _PIC32CXSG41_TCC1_INSTANCE_ #define _PIC32CXSG41_TCC1_INSTANCE_ /* ========== Instance Parameter definitions for TCC1 peripheral ========== */ #define TCC1_CC_NUM (4) /* Number of Compare/Capture units */ #define TCC1_DITHERING (1) /* Dithering feature implemented */ #define TCC1_DMAC_ID_MC0 (30) /* Indexes of DMA Match/Compare 0 trigger */ #define TCC1_DMAC_ID_MC1 (31) /* Indexes of DMA Match/Compare 1 trigger */ #define TCC1_DMAC_ID_MC2 (32) /* Indexes of DMA Match/Compare 2 trigger */ #define TCC1_DMAC_ID_MC3 (33) /* Indexes of DMA Match/Compare 3 trigger */ #define TCC1_DMAC_ID_OVF (29) /* DMA overflow/underflow/retrigger trigger */ #define TCC1_DTI (1) /* Dead-Time-Insertion feature implemented */ #define TCC1_EXT (31) /* Coding of implemented extended features */ #define TCC1_GCLK_ID (25) /* Index of Generic Clock */ #define TCC1_INSTANCE_ID (44) /* Instance index for TCC1 */ #define TCC1_MASTER_SLAVE_MODE (2) /* TCC type 0 : NA, 1 : Master, 2 : Slave */ #define TCC1_OTMX (1) /* Output Matrix feature implemented */ #define TCC1_OW_NUM (8) /* Number of Output Waveforms */ #define TCC1_PG (1) /* Pattern Generation feature implemented */ #define TCC1_SIZE (24) #define TCC1_SWAP (1) /* DTI outputs swap feature implemented */ #endif /* _PIC32CXSG41_TCC1_INSTANCE_ */