/*
 * Instance header file for PIC32CX1025SG41128
 *
 * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *   http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 */

/* file generated from device description file (ATDF) version 2023-03-17T09:48:34Z */
#ifndef _PIC32CXSG41_TC0_INSTANCE_
#define _PIC32CXSG41_TC0_INSTANCE_


/* ========== Instance Parameter definitions for TC0 peripheral ========== */
#define TC0_CC_NUM                               (2)        
#define TC0_DMAC_ID_MC0                          (45)       /* Indexes of DMA Match/Compare 0 trigger */
#define TC0_DMAC_ID_MC1                          (46)       /* Indexes of DMA Match/Compare 1 trigger */
#define TC0_DMAC_ID_OVF                          (44)       /* Indexes of DMA Overflow trigger */
#define TC0_EXT                                  (0)        /* Coding of implemented extended features (keep 0 value) */
#define TC0_GCLK_ID                              (9)        /* Index of Generic Clock */
#define TC0_INSTANCE_ID                          (14)       /* Instance index for TC0 */
#define TC0_MASTER_SLAVE_MODE                    (1)        /* TC type 0 : NA, 1 : Master, 2 : Slave */
#define TC0_OW_NUM                               (2)        /* Number of Output Waveforms */

#endif /* _PIC32CXSG41_TC0_INSTANCE_ */