/* * Copyright (c) 2024 Microchip * * SPDX-License-Identifier: Apache-2.0 */ #ifndef _MICROCHIP_PIC32CXSG_AC_COMPONENT_FIXUP_H_ #define _MICROCHIP_PIC32CXSG_AC_COMPONENT_FIXUP_H_ /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t SWRST:1; /*!< bit: 0 Software Reset */ uint8_t ENABLE:1; /*!< bit: 1 Enable */ uint8_t :6; /*!< bit: 2.. 7 Reserved */ } bit; /*!< Structure used for bit access */ uint8_t reg; /*!< Type used for register access */ } AC_CTRLA_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */ uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */ uint8_t :6; /*!< bit: 2.. 7 Reserved */ } bit; /*!< Structure used for bit access */ struct { uint8_t START:2; /*!< bit: 0.. 1 Comparator x Start Comparison */ uint8_t :6; /*!< bit: 2.. 7 Reserved */ } vec; /*!< Structure used for vec access */ uint8_t reg; /*!< Type used for register access */ } AC_CTRLB_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */ uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */ uint16_t :2; /*!< bit: 2.. 3 Reserved */ uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */ uint16_t :3; /*!< bit: 5.. 7 Reserved */ uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input Enable */ uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input Enable */ uint16_t :2; /*!< bit: 10..11 Reserved */ uint16_t INVEI0:1; /*!< bit: 12 Comparator 0 Input Event Invert Enable */ uint16_t INVEI1:1; /*!< bit: 13 Comparator 1 Input Event Invert Enable */ uint16_t :2; /*!< bit: 14..15 Reserved */ } bit; /*!< Structure used for bit access */ struct { uint16_t COMPEO:2; /*!< bit: 0.. 1 Comparator x Event Output Enable */ uint16_t :2; /*!< bit: 2.. 3 Reserved */ uint16_t WINEO:1; /*!< bit: 4 Window x Event Output Enable */ uint16_t :3; /*!< bit: 5.. 7 Reserved */ uint16_t COMPEI:2; /*!< bit: 8.. 9 Comparator x Event Input Enable */ uint16_t :2; /*!< bit: 10..11 Reserved */ uint16_t INVEI:2; /*!< bit: 12..13 Comparator x Input Event Invert Enable */ uint16_t :2; /*!< bit: 14..15 Reserved */ } vec; /*!< Structure used for vec access */ uint16_t reg; /*!< Type used for register access */ } AC_EVCTRL_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ uint8_t :2; /*!< bit: 2.. 3 Reserved */ uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ uint8_t :3; /*!< bit: 5.. 7 Reserved */ } bit; /*!< Structure used for bit access */ struct { uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ uint8_t :2; /*!< bit: 2.. 3 Reserved */ uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ uint8_t :3; /*!< bit: 5.. 7 Reserved */ } vec; /*!< Structure used for vec access */ uint8_t reg; /*!< Type used for register access */ } AC_INTENCLR_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ uint8_t :2; /*!< bit: 2.. 3 Reserved */ uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ uint8_t :3; /*!< bit: 5.. 7 Reserved */ } bit; /*!< Structure used for bit access */ struct { uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x Interrupt Enable */ uint8_t :2; /*!< bit: 2.. 3 Reserved */ uint8_t WIN:1; /*!< bit: 4 Window x Interrupt Enable */ uint8_t :3; /*!< bit: 5.. 7 Reserved */ } vec; /*!< Structure used for vec access */ uint8_t reg; /*!< Type used for register access */ } AC_INTENSET_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { // __I to avoid read-modify-write on write-to-clear register struct { __I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */ __I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */ __I uint8_t :2; /*!< bit: 2.. 3 Reserved */ __I uint8_t WIN0:1; /*!< bit: 4 Window 0 */ __I uint8_t :3; /*!< bit: 5.. 7 Reserved */ } bit; /*!< Structure used for bit access */ struct { __I uint8_t COMP:2; /*!< bit: 0.. 1 Comparator x */ __I uint8_t :2; /*!< bit: 2.. 3 Reserved */ __I uint8_t WIN:1; /*!< bit: 4 Window x */ __I uint8_t :3; /*!< bit: 5.. 7 Reserved */ } vec; /*!< Structure used for vec access */ uint8_t reg; /*!< Type used for register access */ } AC_INTFLAG_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_STATUSA : (AC Offset: 0x07) ( R/ 8) Status A -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */ uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */ uint8_t :2; /*!< bit: 2.. 3 Reserved */ uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */ uint8_t :2; /*!< bit: 6.. 7 Reserved */ } bit; /*!< Structure used for bit access */ struct { uint8_t STATE:2; /*!< bit: 0.. 1 Comparator x Current State */ uint8_t :6; /*!< bit: 2.. 7 Reserved */ } vec; /*!< Structure used for vec access */ uint8_t reg; /*!< Type used for register access */ } AC_STATUSA_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_STATUSB : (AC Offset: 0x08) ( R/ 8) Status B -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */ uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */ uint8_t :6; /*!< bit: 2.. 7 Reserved */ } bit; /*!< Structure used for bit access */ struct { uint8_t READY:2; /*!< bit: 0.. 1 Comparator x Ready */ uint8_t :6; /*!< bit: 2.. 7 Reserved */ } vec; /*!< Structure used for vec access */ uint8_t reg; /*!< Type used for register access */ } AC_STATUSB_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_DBGCTRL : (AC Offset: 0x09) (R/W 8) Debug Control -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t DBGRUN:1; /*!< bit: 0 Debug Run */ uint8_t :7; /*!< bit: 1.. 7 Reserved */ } bit; /*!< Structure used for bit access */ uint8_t reg; /*!< Type used for register access */ } AC_DBGCTRL_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_WINCTRL : (AC Offset: 0x0A) (R/W 8) Window Control -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */ uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */ uint8_t :5; /*!< bit: 3.. 7 Reserved */ } bit; /*!< Structure used for bit access */ uint8_t reg; /*!< Type used for register access */ } AC_WINCTRL_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_SCALER : (AC Offset: 0x0C) (R/W 8) Scaler n -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */ uint8_t :2; /*!< bit: 6.. 7 Reserved */ } bit; /*!< Structure used for bit access */ uint8_t reg; /*!< Type used for register access */ } AC_SCALER_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint32_t :1; /*!< bit: 0 Reserved */ uint32_t ENABLE:1; /*!< bit: 1 Enable */ uint32_t SINGLE:1; /*!< bit: 2 Single-Shot Mode */ uint32_t INTSEL:2; /*!< bit: 3.. 4 Interrupt Selection */ uint32_t :1; /*!< bit: 5 Reserved */ uint32_t RUNSTDBY:1; /*!< bit: 6 Run in Standby */ uint32_t :1; /*!< bit: 7 Reserved */ uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */ uint32_t :1; /*!< bit: 11 Reserved */ uint32_t MUXPOS:3; /*!< bit: 12..14 Positive Input Mux Selection */ uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */ uint32_t SPEED:2; /*!< bit: 16..17 Speed Selection */ uint32_t :1; /*!< bit: 18 Reserved */ uint32_t HYSTEN:1; /*!< bit: 19 Hysteresis Enable */ uint32_t HYST:2; /*!< bit: 20..21 Hysteresis Level */ uint32_t :2; /*!< bit: 22..23 Reserved */ uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */ uint32_t :1; /*!< bit: 27 Reserved */ uint32_t OUT:2; /*!< bit: 28..29 Output */ uint32_t :2; /*!< bit: 30..31 Reserved */ } bit; /*!< Structure used for bit access */ uint32_t reg; /*!< Type used for register access */ } AC_COMPCTRL_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_SYNCBUSY : (AC Offset: 0x20) ( R/ 32) Synchronization Busy -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint32_t SWRST:1; /*!< bit: 0 Software Reset Synchronization Busy */ uint32_t ENABLE:1; /*!< bit: 1 Enable Synchronization Busy */ uint32_t WINCTRL:1; /*!< bit: 2 WINCTRL Synchronization Busy */ uint32_t COMPCTRL0:1; /*!< bit: 3 COMPCTRL 0 Synchronization Busy */ uint32_t COMPCTRL1:1; /*!< bit: 4 COMPCTRL 1 Synchronization Busy */ uint32_t :27; /*!< bit: 5..31 Reserved */ } bit; /*!< Structure used for bit access */ struct { uint32_t :3; /*!< bit: 0.. 2 Reserved */ uint32_t COMPCTRL:2; /*!< bit: 3.. 4 COMPCTRL x Synchronization Busy */ uint32_t :27; /*!< bit: 5..31 Reserved */ } vec; /*!< Structure used for vec access */ uint32_t reg; /*!< Type used for register access */ } AC_SYNCBUSY_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /* -------- AC_CALIB : (AC Offset: 0x24) (R/W 16) Calibration -------- */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef union { struct { uint16_t BIAS0:2; /*!< bit: 0.. 1 COMP0/1 Bias Scaling */ uint16_t :14; /*!< bit: 2..15 Reserved */ } bit; /*!< Structure used for bit access */ uint16_t reg; /*!< Type used for register access */ } AC_CALIB_Type; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ /** \brief AC hardware registers */ #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) typedef struct { __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */ __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */ __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */ __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */ __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */ __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */ __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x07 (R/ 8) Status A */ __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x08 (R/ 8) Status B */ __IO AC_DBGCTRL_Type DBGCTRL; /**< \brief Offset: 0x09 (R/W 8) Debug Control */ __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0A (R/W 8) Window Control */ RoReg8 Reserved1[0x1]; __IO AC_SCALER_Type SCALER[2]; /**< \brief Offset: 0x0C (R/W 8) Scaler n */ RoReg8 Reserved2[0x2]; __IO AC_COMPCTRL_Type COMPCTRL[2]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */ RoReg8 Reserved3[0x8]; __I AC_SYNCBUSY_Type SYNCBUSY; /**< \brief Offset: 0x20 (R/ 32) Synchronization Busy */ __IO AC_CALIB_Type CALIB; /**< \brief Offset: 0x24 (R/W 16) Calibration */ } Ac; #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ #endif /* _MICROCHIP_PIC32CXSG_AC_COMPONENT_FIXUP_H_ */