# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0

# Notes:
# - GPIO pads in range 24-30 are dedicated to in-package Flash, thus not available.
# - QFN40 I/O GPIO pads are 0-23 (ESP32C6 datasheet cap 2.3 table 2-3)
# - QFN32 I/O GPIO pads are 0-9 and 12-23 (ESP32C6 datasheet cap 2.3 table 2-4)

uart0:
  tx:
    sigo: u0txd_out
    gpio: [[0, 23]]
  rx:
    sigi: u0rxd_in
    gpio: [[0, 23]]
  rts:
    sigo: u0rts_out
    gpio: [[0, 23]]
  cts:
    sigi: u0cts_in
    gpio: [[0, 23]]
  dtr:
    sigo: u0dtr_out
    gpio: [[0, 23]]
  dsr:
    sigi: u0dsr_in
    gpio: [[0, 23]]

uart1:
  tx:
    sigo: u1txd_out
    gpio: [[0, 23]]
  rx:
    sigi: u1rxd_in
    gpio: [[0, 23]]
  rts:
    sigo: u1rts_out
    gpio: [[0, 23]]
  cts:
    sigi: u1cts_in
    gpio: [[0, 23]]
  dtr:
    sigo: u1dtr_out
    gpio: [[0, 23]]
  dsr:
    sigi: u1dsr_in
    gpio: [[0, 23]]

spim2:
  miso:
    sigi: fspiq_in
    gpio: [[0, 23]]
  mosi:
    sigo: fspid_out
    gpio: [[0, 23]]
  sclk:
    sigo: fspiclk_out
    gpio: [[0, 23]]
  csel:
    sigo: fspics0_out
    gpio: [[0, 23]]
  csel1:
    sigo: fspics1_out
    gpio: [[0, 23]]
  csel2:
    sigo: fspics2_out
    gpio: [[0, 23]]
  csel3:
    sigo: fspics3_out
    gpio: [[0, 23]]
  csel4:
    sigo: fspics4_out
    gpio: [[0, 23]]
  csel5:
    sigo: fspics5_out
    gpio: [[0, 23]]

ledc:
  ch0:
    sigo: ledc_ls_sig_out0
    gpio: [[0, 23]]
  ch1:
    sigo: ledc_ls_sig_out1
    gpio: [[0, 23]]
  ch2:
    sigo: ledc_ls_sig_out2
    gpio: [[0, 23]]
  ch3:
    sigo: ledc_ls_sig_out3
    gpio: [[0, 23]]
  ch4:
    sigo: ledc_ls_sig_out4
    gpio: [[0, 23]]
  ch5:
    sigo: ledc_ls_sig_out5
    gpio: [[0, 23]]

mcpwm0:
  out0a:
    sigo: pwm0_out0a
    gpio: [[0, 23]]
  out0b:
    sigo: pwm0_out0b
    gpio: [[0, 23]]
  out1a:
    sigo: pwm0_out1a
    gpio: [[0, 23]]
  out1b:
    sigo: pwm0_out1b
    gpio: [[0, 23]]
  out2a:
    sigo: pwm0_out2a
    gpio: [[0, 23]]
  out2b:
    sigo: pwm0_out2b
    gpio: [[0, 23]]
  sync0:
    sigi: pwm0_sync0_in
    gpio: [[0, 23]]
  sync1:
    sigi: pwm0_sync1_in
    gpio: [[0, 23]]
  sync2:
    sigi: pwm0_sync2_in
    gpio: [[0, 23]]
  fault0:
    sigi: pwm0_f0_in
    gpio: [[0, 23]]
  fault1:
    sigi: pwm0_f1_in
    gpio: [[0, 23]]
  fault2:
    sigi: pwm0_f2_in
    gpio: [[0, 23]]
  cap0:
    sigi: pwm0_cap0_in
    gpio: [[0, 23]]
  cap1:
    sigi: pwm0_cap1_in
    gpio: [[0, 23]]
  cap2:
    sigi: pwm0_cap2_in
    gpio: [[0, 23]]

i2c0:
  sda:
    sigi: i2cext0_sda_in
    sigo: i2cext0_sda_out
    gpio: [[0, 23]]
  scl:
    sigi: i2cext0_scl_in
    sigo: i2cext0_scl_out
    gpio: [[0, 23]]