# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. # SPDX-License-Identifier: Apache-2.0 uart0: tx: sigo: u0txd_out gpio: [[0, 21]] rx: sigi: u0rxd_in gpio: [[0, 21]] rts: sigo: u0rts_out gpio: [[0, 21]] cts: sigi: u0cts_in gpio: [[0, 21]] dtr: sigo: u0dtr_out gpio: [[0, 21]] dsr: sigi: u0dsr_in gpio: [[0, 21]] uart1: tx: sigo: u1txd_out gpio: [[0, 21]] rx: sigi: u1rxd_in gpio: [[0, 21]] rts: sigo: u1rts_out gpio: [[0, 21]] cts: sigi: u1cts_in gpio: [[0, 21]] dtr: sigo: u1dtr_out gpio: [[0, 21]] dsr: sigi: u1dsr_in gpio: [[0, 21]] spim2: miso: sigi: fspiq_in gpio: [[0, 21]] mosi: sigo: fspid_out gpio: [[0, 21]] sclk: sigo: fspiclk_out gpio: [[0, 21]] csel: sigo: fspics0_out gpio: [[0, 21]] csel1: sigo: fspics1_out gpio: [[0, 21]] csel2: sigo: fspics2_out gpio: [[0, 21]] csel3: sigo: fspics3_out gpio: [[0, 21]] csel4: sigo: fspics4_out gpio: [[0, 21]] csel5: sigo: fspics5_out gpio: [[0, 21]] i2c0: sda: sigi: i2cext0_sda_in sigo: i2cext0_sda_out gpio: [[0, 21]] scl: sigi: i2cext0_scl_in sigo: i2cext0_scl_out gpio: [[0, 21]] i2s: mclk: sigi: i2s_mclk_in sigo: i2s_mclk_out gpio: [[0, 21]] i_bck: sigi: i2si_bck_in sigo: i2si_bck_out gpio: [[0, 21]] i_ws: sigi: i2si_ws_in sigo: i2si_ws_out gpio: [[0, 21]] i_sd: sigi: i2si_sd_in gpio: [[0, 21]] o_bck: sigi: i2so_bck_in sigo: i2so_bck_out gpio: [[0, 21]] o_ws: sigi: i2so_ws_in sigo: i2so_ws_out gpio: [[0, 21]] o_sd: sigo: i2so_sd_out gpio: [[0, 21]] twai: rx: sigi: twai_rx gpio: [[0, 21]] tx: sigo: twai_tx gpio: [[0, 21]] clkout: sigo: twai_clkout gpio: [[0, 21]] bus_off: sigo: twai_bus_off_on gpio: [[0, 21]] ledc: ch0: sigo: ledc_ls_sig_out0 gpio: [[0, 21]] ch1: sigo: ledc_ls_sig_out1 gpio: [[0, 21]] ch2: sigo: ledc_ls_sig_out2 gpio: [[0, 21]] ch3: sigo: ledc_ls_sig_out3 gpio: [[0, 21]] ch4: sigo: ledc_ls_sig_out4 gpio: [[0, 21]] ch5: sigo: ledc_ls_sig_out5 gpio: [[0, 21]]