/* * Autogenerated file * * SPDX-License-Identifier: Apache-2.0 */ #include /* pa0_gpio */ #define PA0_GPIO \ SAM_PINMUX(a, 0, gpio, gpio) /* pa1_gpio */ #define PA1_GPIO \ SAM_PINMUX(a, 1, gpio, gpio) /* pa2_gpio */ #define PA2_GPIO \ SAM_PINMUX(a, 2, gpio, gpio) /* pa2a_scif_gclk0 */ #define PA2A_SCIF_GCLK0 \ SAM_PINMUX(a, 2, a, periph) /* pa2b_spi_npcs0 */ #define PA2B_SPI_NPCS0 \ SAM_PINMUX(a, 2, b, periph) /* pa2g_catb_dis */ #define PA2G_CATB_DIS \ SAM_PINMUX(a, 2, g, periph) /* pa3_gpio */ #define PA3_GPIO \ SAM_PINMUX(a, 3, gpio, gpio) /* pa3b_spi_miso */ #define PA3B_SPI_MISO \ SAM_PINMUX(a, 3, b, periph) /* pa4_gpio */ #define PA4_GPIO \ SAM_PINMUX(a, 4, gpio, gpio) /* pa4a_adcife_ad0 */ #define PA4A_ADCIFE_AD0 \ SAM_PINMUX(a, 4, a, periph) /* pa4b_usart0_clk */ #define PA4B_USART0_CLK \ SAM_PINMUX(a, 4, b, periph) /* pa4c_eic_extint2 */ #define PA4C_EIC_EXTINT2 \ SAM_PINMUX(a, 4, c, periph) /* pa4d_gloc_in1 */ #define PA4D_GLOC_IN1 \ SAM_PINMUX(a, 4, d, periph) /* pa4g_catb_sense0 */ #define PA4G_CATB_SENSE0 \ SAM_PINMUX(a, 4, g, periph) /* pa5_gpio */ #define PA5_GPIO \ SAM_PINMUX(a, 5, gpio, gpio) /* pa5a_adcife_ad1 */ #define PA5A_ADCIFE_AD1 \ SAM_PINMUX(a, 5, a, periph) /* pa5b_usart0_rxd */ #define PA5B_USART0_RXD \ SAM_PINMUX(a, 5, b, periph) /* pa5c_eic_extint3 */ #define PA5C_EIC_EXTINT3 \ SAM_PINMUX(a, 5, c, periph) /* pa5d_gloc_in2 */ #define PA5D_GLOC_IN2 \ SAM_PINMUX(a, 5, d, periph) /* pa5e_adcife_trigger */ #define PA5E_ADCIFE_TRIGGER \ SAM_PINMUX(a, 5, e, periph) /* pa5g_catb_sense1 */ #define PA5G_CATB_SENSE1 \ SAM_PINMUX(a, 5, g, periph) /* pa6_gpio */ #define PA6_GPIO \ SAM_PINMUX(a, 6, gpio, gpio) /* pa6a_dacc_vout */ #define PA6A_DACC_VOUT \ SAM_PINMUX(a, 6, a, periph) /* pa6b_usart0_rts */ #define PA6B_USART0_RTS \ SAM_PINMUX(a, 6, b, periph) /* pa6c_eic_extint1 */ #define PA6C_EIC_EXTINT1 \ SAM_PINMUX(a, 6, c, periph) /* pa6d_gloc_in0 */ #define PA6D_GLOC_IN0 \ SAM_PINMUX(a, 6, d, periph) /* pa6e_acifc_acan0 */ #define PA6E_ACIFC_ACAN0 \ SAM_PINMUX(a, 6, e, periph) /* pa6g_catb_sense2 */ #define PA6G_CATB_SENSE2 \ SAM_PINMUX(a, 6, g, periph) /* pa7_gpio */ #define PA7_GPIO \ SAM_PINMUX(a, 7, gpio, gpio) /* pa7a_adcife_ad2 */ #define PA7A_ADCIFE_AD2 \ SAM_PINMUX(a, 7, a, periph) /* pa7b_usart0_txd */ #define PA7B_USART0_TXD \ SAM_PINMUX(a, 7, b, periph) /* pa7c_eic_extint4 */ #define PA7C_EIC_EXTINT4 \ SAM_PINMUX(a, 7, c, periph) /* pa7d_gloc_in3 */ #define PA7D_GLOC_IN3 \ SAM_PINMUX(a, 7, d, periph) /* pa7e_acifc_acap0 */ #define PA7E_ACIFC_ACAP0 \ SAM_PINMUX(a, 7, e, periph) /* pa7g_catb_sense3 */ #define PA7G_CATB_SENSE3 \ SAM_PINMUX(a, 7, g, periph) /* pa8_gpio */ #define PA8_GPIO \ SAM_PINMUX(a, 8, gpio, gpio) /* pa8a_usart0_rts */ #define PA8A_USART0_RTS \ SAM_PINMUX(a, 8, a, periph) /* pa8b_tc0_a0 */ #define PA8B_TC0_A0 \ SAM_PINMUX(a, 8, b, periph) /* pa8c_pevc_evt0 */ #define PA8C_PEVC_EVT0 \ SAM_PINMUX(a, 8, c, periph) /* pa8d_gloc_out0 */ #define PA8D_GLOC_OUT0 \ SAM_PINMUX(a, 8, d, periph) /* pa8f_lcdca_seg23 */ #define PA8F_LCDCA_SEG23 \ SAM_PINMUX(a, 8, f, periph) /* pa8g_catb_sense4 */ #define PA8G_CATB_SENSE4 \ SAM_PINMUX(a, 8, g, periph) /* pa9_gpio */ #define PA9_GPIO \ SAM_PINMUX(a, 9, gpio, gpio) /* pa9a_usart0_cts */ #define PA9A_USART0_CTS \ SAM_PINMUX(a, 9, a, periph) /* pa9b_tc0_b0 */ #define PA9B_TC0_B0 \ SAM_PINMUX(a, 9, b, periph) /* pa9c_pevc_evt1 */ #define PA9C_PEVC_EVT1 \ SAM_PINMUX(a, 9, c, periph) /* pa9d_parc_pcdata0 */ #define PA9D_PARC_PCDATA0 \ SAM_PINMUX(a, 9, d, periph) /* pa9f_lcdca_com3 */ #define PA9F_LCDCA_COM3 \ SAM_PINMUX(a, 9, f, periph) /* pa9g_catb_sense5 */ #define PA9G_CATB_SENSE5 \ SAM_PINMUX(a, 9, g, periph) /* pa10_gpio */ #define PA10_GPIO \ SAM_PINMUX(a, 10, gpio, gpio) /* pa10a_usart0_clk */ #define PA10A_USART0_CLK \ SAM_PINMUX(a, 10, a, periph) /* pa10b_tc0_a1 */ #define PA10B_TC0_A1 \ SAM_PINMUX(a, 10, b, periph) /* pa10c_pevc_evt2 */ #define PA10C_PEVC_EVT2 \ SAM_PINMUX(a, 10, c, periph) /* pa10d_parc_pcdata1 */ #define PA10D_PARC_PCDATA1 \ SAM_PINMUX(a, 10, d, periph) /* pa10f_lcdca_com2 */ #define PA10F_LCDCA_COM2 \ SAM_PINMUX(a, 10, f, periph) /* pa10g_catb_sense6 */ #define PA10G_CATB_SENSE6 \ SAM_PINMUX(a, 10, g, periph) /* pa11_gpio */ #define PA11_GPIO \ SAM_PINMUX(a, 11, gpio, gpio) /* pa11a_usart0_rxd */ #define PA11A_USART0_RXD \ SAM_PINMUX(a, 11, a, periph) /* pa11b_tc0_b1 */ #define PA11B_TC0_B1 \ SAM_PINMUX(a, 11, b, periph) /* pa11c_pevc_evt3 */ #define PA11C_PEVC_EVT3 \ SAM_PINMUX(a, 11, c, periph) /* pa11d_parc_pcdata2 */ #define PA11D_PARC_PCDATA2 \ SAM_PINMUX(a, 11, d, periph) /* pa11f_lcdca_com1 */ #define PA11F_LCDCA_COM1 \ SAM_PINMUX(a, 11, f, periph) /* pa11g_catb_sense7 */ #define PA11G_CATB_SENSE7 \ SAM_PINMUX(a, 11, g, periph) /* pa12_gpio */ #define PA12_GPIO \ SAM_PINMUX(a, 12, gpio, gpio) /* pa12a_usart0_txd */ #define PA12A_USART0_TXD \ SAM_PINMUX(a, 12, a, periph) /* pa12b_tc0_a2 */ #define PA12B_TC0_A2 \ SAM_PINMUX(a, 12, b, periph) /* pa12d_parc_pcdata3 */ #define PA12D_PARC_PCDATA3 \ SAM_PINMUX(a, 12, d, periph) /* pa12f_lcdca_com0 */ #define PA12F_LCDCA_COM0 \ SAM_PINMUX(a, 12, f, periph) /* pa12g_catb_dis */ #define PA12G_CATB_DIS \ SAM_PINMUX(a, 12, g, periph) /* pa13_gpio */ #define PA13_GPIO \ SAM_PINMUX(a, 13, gpio, gpio) /* pa13a_usart1_rts */ #define PA13A_USART1_RTS \ SAM_PINMUX(a, 13, a, periph) /* pa13b_tc0_b2 */ #define PA13B_TC0_B2 \ SAM_PINMUX(a, 13, b, periph) /* pa13c_spi_npcs1 */ #define PA13C_SPI_NPCS1 \ SAM_PINMUX(a, 13, c, periph) /* pa13d_parc_pcdata4 */ #define PA13D_PARC_PCDATA4 \ SAM_PINMUX(a, 13, d, periph) /* pa13f_lcdca_seg5 */ #define PA13F_LCDCA_SEG5 \ SAM_PINMUX(a, 13, f, periph) /* pa13g_catb_sense8 */ #define PA13G_CATB_SENSE8 \ SAM_PINMUX(a, 13, g, periph) /* pa14_gpio */ #define PA14_GPIO \ SAM_PINMUX(a, 14, gpio, gpio) /* pa14a_usart1_clk */ #define PA14A_USART1_CLK \ SAM_PINMUX(a, 14, a, periph) /* pa14b_tc0_clk0 */ #define PA14B_TC0_CLK0 \ SAM_PINMUX(a, 14, b, periph) /* pa14c_spi_npcs2 */ #define PA14C_SPI_NPCS2 \ SAM_PINMUX(a, 14, c, periph) /* pa14d_parc_pcdata5 */ #define PA14D_PARC_PCDATA5 \ SAM_PINMUX(a, 14, d, periph) /* pa14f_lcdca_seg6 */ #define PA14F_LCDCA_SEG6 \ SAM_PINMUX(a, 14, f, periph) /* pa14g_catb_sense9 */ #define PA14G_CATB_SENSE9 \ SAM_PINMUX(a, 14, g, periph) /* pa15_gpio */ #define PA15_GPIO \ SAM_PINMUX(a, 15, gpio, gpio) /* pa15a_usart1_rxd */ #define PA15A_USART1_RXD \ SAM_PINMUX(a, 15, a, periph) /* pa15b_tc0_clk1 */ #define PA15B_TC0_CLK1 \ SAM_PINMUX(a, 15, b, periph) /* pa15c_spi_npcs3 */ #define PA15C_SPI_NPCS3 \ SAM_PINMUX(a, 15, c, periph) /* pa15d_parc_pcdata6 */ #define PA15D_PARC_PCDATA6 \ SAM_PINMUX(a, 15, d, periph) /* pa15f_lcdca_seg7 */ #define PA15F_LCDCA_SEG7 \ SAM_PINMUX(a, 15, f, periph) /* pa15g_catb_sense10 */ #define PA15G_CATB_SENSE10 \ SAM_PINMUX(a, 15, g, periph) /* pa16_gpio */ #define PA16_GPIO \ SAM_PINMUX(a, 16, gpio, gpio) /* pa16a_usart1_txd */ #define PA16A_USART1_TXD \ SAM_PINMUX(a, 16, a, periph) /* pa16b_tc0_clk2 */ #define PA16B_TC0_CLK2 \ SAM_PINMUX(a, 16, b, periph) /* pa16c_eic_extint1 */ #define PA16C_EIC_EXTINT1 \ SAM_PINMUX(a, 16, c, periph) /* pa16d_parc_pcdata7 */ #define PA16D_PARC_PCDATA7 \ SAM_PINMUX(a, 16, d, periph) /* pa16f_lcdca_seg8 */ #define PA16F_LCDCA_SEG8 \ SAM_PINMUX(a, 16, f, periph) /* pa16g_catb_sense11 */ #define PA16G_CATB_SENSE11 \ SAM_PINMUX(a, 16, g, periph) /* pa17_gpio */ #define PA17_GPIO \ SAM_PINMUX(a, 17, gpio, gpio) /* pa17a_usart2_rts */ #define PA17A_USART2_RTS \ SAM_PINMUX(a, 17, a, periph) /* pa17b_abdacb_dac0 */ #define PA17B_ABDACB_DAC0 \ SAM_PINMUX(a, 17, b, periph) /* pa17c_eic_extint2 */ #define PA17C_EIC_EXTINT2 \ SAM_PINMUX(a, 17, c, periph) /* pa17d_parc_pcck */ #define PA17D_PARC_PCCK \ SAM_PINMUX(a, 17, d, periph) /* pa17f_lcdca_seg9 */ #define PA17F_LCDCA_SEG9 \ SAM_PINMUX(a, 17, f, periph) /* pa17g_catb_sense12 */ #define PA17G_CATB_SENSE12 \ SAM_PINMUX(a, 17, g, periph) /* pa18_gpio */ #define PA18_GPIO \ SAM_PINMUX(a, 18, gpio, gpio) /* pa18a_usart2_clk */ #define PA18A_USART2_CLK \ SAM_PINMUX(a, 18, a, periph) /* pa18b_abdacb_dacn0 */ #define PA18B_ABDACB_DACN0 \ SAM_PINMUX(a, 18, b, periph) /* pa18c_eic_extint3 */ #define PA18C_EIC_EXTINT3 \ SAM_PINMUX(a, 18, c, periph) /* pa18d_parc_pcen1 */ #define PA18D_PARC_PCEN1 \ SAM_PINMUX(a, 18, d, periph) /* pa18f_lcdca_seg18 */ #define PA18F_LCDCA_SEG18 \ SAM_PINMUX(a, 18, f, periph) /* pa18g_catb_sense13 */ #define PA18G_CATB_SENSE13 \ SAM_PINMUX(a, 18, g, periph) /* pa19_gpio */ #define PA19_GPIO \ SAM_PINMUX(a, 19, gpio, gpio) /* pa19a_usart2_rxd */ #define PA19A_USART2_RXD \ SAM_PINMUX(a, 19, a, periph) /* pa19b_abdacb_dac1 */ #define PA19B_ABDACB_DAC1 \ SAM_PINMUX(a, 19, b, periph) /* pa19c_eic_extint4 */ #define PA19C_EIC_EXTINT4 \ SAM_PINMUX(a, 19, c, periph) /* pa19d_parc_pcen2 */ #define PA19D_PARC_PCEN2 \ SAM_PINMUX(a, 19, d, periph) /* pa19e_scif_gclk0 */ #define PA19E_SCIF_GCLK0 \ SAM_PINMUX(a, 19, e, periph) /* pa19f_lcdca_seg19 */ #define PA19F_LCDCA_SEG19 \ SAM_PINMUX(a, 19, f, periph) /* pa19g_catb_sense14 */ #define PA19G_CATB_SENSE14 \ SAM_PINMUX(a, 19, g, periph) /* pa20_gpio */ #define PA20_GPIO \ SAM_PINMUX(a, 20, gpio, gpio) /* pa20a_usart2_txd */ #define PA20A_USART2_TXD \ SAM_PINMUX(a, 20, a, periph) /* pa20b_abdacb_dacn1 */ #define PA20B_ABDACB_DACN1 \ SAM_PINMUX(a, 20, b, periph) /* pa20c_eic_extint5 */ #define PA20C_EIC_EXTINT5 \ SAM_PINMUX(a, 20, c, periph) /* pa20d_gcloc_in0 */ #define PA20D_GCLOC_IN0 \ SAM_PINMUX(a, 20, d, periph) /* pa20e_scif_gclk1 */ #define PA20E_SCIF_GCLK1 \ SAM_PINMUX(a, 20, e, periph) /* pa20f_lcdca_seg20 */ #define PA20F_LCDCA_SEG20 \ SAM_PINMUX(a, 20, f, periph) /* pa20g_catb_sense15 */ #define PA20G_CATB_SENSE15 \ SAM_PINMUX(a, 20, g, periph) /* pa21_gpio */ #define PA21_GPIO \ SAM_PINMUX(a, 21, gpio, gpio) /* pa21a_spi_miso */ #define PA21A_SPI_MISO \ SAM_PINMUX(a, 21, a, periph) /* pa21b_usart1_cts */ #define PA21B_USART1_CTS \ SAM_PINMUX(a, 21, b, periph) /* pa21c_eic_extint6 */ #define PA21C_EIC_EXTINT6 \ SAM_PINMUX(a, 21, c, periph) /* pa21d_gcloc_in1 */ #define PA21D_GCLOC_IN1 \ SAM_PINMUX(a, 21, d, periph) /* pa21e_twim2_twd */ #define PA21E_TWIM2_TWD \ SAM_PINMUX(a, 21, e, periph) /* pa21f_lcdca_seg34 */ #define PA21F_LCDCA_SEG34 \ SAM_PINMUX(a, 21, f, periph) /* pa21g_catb_sense16 */ #define PA21G_CATB_SENSE16 \ SAM_PINMUX(a, 21, g, periph) /* pa22_gpio */ #define PA22_GPIO \ SAM_PINMUX(a, 22, gpio, gpio) /* pa22a_spi_mosi */ #define PA22A_SPI_MOSI \ SAM_PINMUX(a, 22, a, periph) /* pa22b_usart2_cts */ #define PA22B_USART2_CTS \ SAM_PINMUX(a, 22, b, periph) /* pa22c_eic_extint7 */ #define PA22C_EIC_EXTINT7 \ SAM_PINMUX(a, 22, c, periph) /* pa22d_gcloc_in2 */ #define PA22D_GCLOC_IN2 \ SAM_PINMUX(a, 22, d, periph) /* pa22e_twim2_twck */ #define PA22E_TWIM2_TWCK \ SAM_PINMUX(a, 22, e, periph) /* pa22f_lcdca_seg35 */ #define PA22F_LCDCA_SEG35 \ SAM_PINMUX(a, 22, f, periph) /* pa22g_catb_sense17 */ #define PA22G_CATB_SENSE17 \ SAM_PINMUX(a, 22, g, periph) /* pa23_gpio */ #define PA23_GPIO \ SAM_PINMUX(a, 23, gpio, gpio) /* pa23a_spi_sck */ #define PA23A_SPI_SCK \ SAM_PINMUX(a, 23, a, periph) /* pa23b_twims0_twd */ #define PA23B_TWIMS0_TWD \ SAM_PINMUX(a, 23, b, periph) /* pa23c_eic_extint8 */ #define PA23C_EIC_EXTINT8 \ SAM_PINMUX(a, 23, c, periph) /* pa23d_gcloc_in3 */ #define PA23D_GCLOC_IN3 \ SAM_PINMUX(a, 23, d, periph) /* pa23e_scif_glck_in0 */ #define PA23E_SCIF_GLCK_IN0 \ SAM_PINMUX(a, 23, e, periph) /* pa23f_lcdca_seg38 */ #define PA23F_LCDCA_SEG38 \ SAM_PINMUX(a, 23, f, periph) /* pa23g_catb_dis */ #define PA23G_CATB_DIS \ SAM_PINMUX(a, 23, g, periph) /* pa24_gpio */ #define PA24_GPIO \ SAM_PINMUX(a, 24, gpio, gpio) /* pa24a_spi_npcs0 */ #define PA24A_SPI_NPCS0 \ SAM_PINMUX(a, 24, a, periph) /* pa24b_twims0_twck */ #define PA24B_TWIMS0_TWCK \ SAM_PINMUX(a, 24, b, periph) /* pa24d_gcloc_out0 */ #define PA24D_GCLOC_OUT0 \ SAM_PINMUX(a, 24, d, periph) /* pa24e_scif_glck_in1 */ #define PA24E_SCIF_GLCK_IN1 \ SAM_PINMUX(a, 24, e, periph) /* pa24f_lcdca_seg39 */ #define PA24F_LCDCA_SEG39 \ SAM_PINMUX(a, 24, f, periph) /* pa24g_catb_sense18 */ #define PA24G_CATB_SENSE18 \ SAM_PINMUX(a, 24, g, periph) /* pa25_gpio */ #define PA25_GPIO \ SAM_PINMUX(a, 25, gpio, gpio) /* pa25a_usbc_dm */ #define PA25A_USBC_DM \ SAM_PINMUX(a, 25, a, periph) /* pa25b_usart2_rxd */ #define PA25B_USART2_RXD \ SAM_PINMUX(a, 25, b, periph) /* pa25g_catb_sense19 */ #define PA25G_CATB_SENSE19 \ SAM_PINMUX(a, 25, g, periph) /* pa26_gpio */ #define PA26_GPIO \ SAM_PINMUX(a, 26, gpio, gpio) /* pa26a_usbc_dp */ #define PA26A_USBC_DP \ SAM_PINMUX(a, 26, a, periph) /* pa26b_usart2_txd */ #define PA26B_USART2_TXD \ SAM_PINMUX(a, 26, b, periph) /* pa26g_catb_sense20 */ #define PA26G_CATB_SENSE20 \ SAM_PINMUX(a, 26, g, periph) /* pa27_gpio */ #define PA27_GPIO \ SAM_PINMUX(a, 27, gpio, gpio) /* pa28_gpio */ #define PA28_GPIO \ SAM_PINMUX(a, 28, gpio, gpio) /* pa29_gpio */ #define PA29_GPIO \ SAM_PINMUX(a, 29, gpio, gpio) /* pa30_gpio */ #define PA30_GPIO \ SAM_PINMUX(a, 30, gpio, gpio) /* pa31_gpio */ #define PA31_GPIO \ SAM_PINMUX(a, 31, gpio, gpio) /* pb0_gpio */ #define PB0_GPIO \ SAM_PINMUX(b, 0, gpio, gpio) /* pb0a_twims1_twd */ #define PB0A_TWIMS1_TWD \ SAM_PINMUX(b, 0, a, periph) /* pb0b_usart0_rxd */ #define PB0B_USART0_RXD \ SAM_PINMUX(b, 0, b, periph) /* pb0g_catb_sense21 */ #define PB0G_CATB_SENSE21 \ SAM_PINMUX(b, 0, g, periph) /* pb1_gpio */ #define PB1_GPIO \ SAM_PINMUX(b, 1, gpio, gpio) /* pb1a_twims1_twck */ #define PB1A_TWIMS1_TWCK \ SAM_PINMUX(b, 1, a, periph) /* pb1b_usart0_txd */ #define PB1B_USART0_TXD \ SAM_PINMUX(b, 1, b, periph) /* pb1c_eic_extint0 */ #define PB1C_EIC_EXTINT0 \ SAM_PINMUX(b, 1, c, periph) /* pb1g_catb_sense22 */ #define PB1G_CATB_SENSE22 \ SAM_PINMUX(b, 1, g, periph) /* pb2_gpio */ #define PB2_GPIO \ SAM_PINMUX(b, 2, gpio, gpio) /* pb2a_adcife_ad3 */ #define PB2A_ADCIFE_AD3 \ SAM_PINMUX(b, 2, a, periph) /* pb2b_usart1_rts */ #define PB2B_USART1_RTS \ SAM_PINMUX(b, 2, b, periph) /* pb2c_abdacb_dac0 */ #define PB2C_ABDACB_DAC0 \ SAM_PINMUX(b, 2, c, periph) /* pb2d_iisc_isck */ #define PB2D_IISC_ISCK \ SAM_PINMUX(b, 2, d, periph) /* pb2e_acifc_acbn0 */ #define PB2E_ACIFC_ACBN0 \ SAM_PINMUX(b, 2, e, periph) /* pb2g_catb_sense23 */ #define PB2G_CATB_SENSE23 \ SAM_PINMUX(b, 2, g, periph) /* pb3_gpio */ #define PB3_GPIO \ SAM_PINMUX(b, 3, gpio, gpio) /* pb3a_adcife_ad4 */ #define PB3A_ADCIFE_AD4 \ SAM_PINMUX(b, 3, a, periph) /* pb3b_usart1_clk */ #define PB3B_USART1_CLK \ SAM_PINMUX(b, 3, b, periph) /* pb3c_abdacb_dacn0 */ #define PB3C_ABDACB_DACN0 \ SAM_PINMUX(b, 3, c, periph) /* pb3d_iisc_isdi */ #define PB3D_IISC_ISDI \ SAM_PINMUX(b, 3, d, periph) /* pb3e_acifc_acbp0 */ #define PB3E_ACIFC_ACBP0 \ SAM_PINMUX(b, 3, e, periph) /* pb3g_catb_dis */ #define PB3G_CATB_DIS \ SAM_PINMUX(b, 3, g, periph) /* pb4_gpio */ #define PB4_GPIO \ SAM_PINMUX(b, 4, gpio, gpio) /* pb4a_adcife_ad5 */ #define PB4A_ADCIFE_AD5 \ SAM_PINMUX(b, 4, a, periph) /* pb4b_usart1_rxd */ #define PB4B_USART1_RXD \ SAM_PINMUX(b, 4, b, periph) /* pb4c_abdacb_dac1 */ #define PB4C_ABDACB_DAC1 \ SAM_PINMUX(b, 4, c, periph) /* pb4d_iisc_isdo */ #define PB4D_IISC_ISDO \ SAM_PINMUX(b, 4, d, periph) /* pb4e_dacc_ext_trig0 */ #define PB4E_DACC_EXT_TRIG0 \ SAM_PINMUX(b, 4, e, periph) /* pb4g_catb_sense24 */ #define PB4G_CATB_SENSE24 \ SAM_PINMUX(b, 4, g, periph) /* pb5_gpio */ #define PB5_GPIO \ SAM_PINMUX(b, 5, gpio, gpio) /* pb5a_adcife_ad6 */ #define PB5A_ADCIFE_AD6 \ SAM_PINMUX(b, 5, a, periph) /* pb5b_usart1_txd */ #define PB5B_USART1_TXD \ SAM_PINMUX(b, 5, b, periph) /* pb5c_abdacb_dacn1 */ #define PB5C_ABDACB_DACN1 \ SAM_PINMUX(b, 5, c, periph) /* pb5d_iisc_imck */ #define PB5D_IISC_IMCK \ SAM_PINMUX(b, 5, d, periph) /* pb5g_catb_sense25 */ #define PB5G_CATB_SENSE25 \ SAM_PINMUX(b, 5, g, periph) /* pb6_gpio */ #define PB6_GPIO \ SAM_PINMUX(b, 6, gpio, gpio) /* pb6a_usart3_rts */ #define PB6A_USART3_RTS \ SAM_PINMUX(b, 6, a, periph) /* pb6c_gloc_in4 */ #define PB6C_GLOC_IN4 \ SAM_PINMUX(b, 6, c, periph) /* pb6d_iisc_iws */ #define PB6D_IISC_IWS \ SAM_PINMUX(b, 6, d, periph) /* pb6f_lcdca_seg22 */ #define PB6F_LCDCA_SEG22 \ SAM_PINMUX(b, 6, f, periph) /* pb6g_catb_sense26 */ #define PB6G_CATB_SENSE26 \ SAM_PINMUX(b, 6, g, periph) /* pb7_gpio */ #define PB7_GPIO \ SAM_PINMUX(b, 7, gpio, gpio) /* pb7a_usart3_cts */ #define PB7A_USART3_CTS \ SAM_PINMUX(b, 7, a, periph) /* pb7c_gloc_in5 */ #define PB7C_GLOC_IN5 \ SAM_PINMUX(b, 7, c, periph) /* pb7d_tc0_a0 */ #define PB7D_TC0_A0 \ SAM_PINMUX(b, 7, d, periph) /* pb7f_lcdca_seg21 */ #define PB7F_LCDCA_SEG21 \ SAM_PINMUX(b, 7, f, periph) /* pb7g_catb_sense27 */ #define PB7G_CATB_SENSE27 \ SAM_PINMUX(b, 7, g, periph) /* pb8_gpio */ #define PB8_GPIO \ SAM_PINMUX(b, 8, gpio, gpio) /* pb8a_usart3_clk */ #define PB8A_USART3_CLK \ SAM_PINMUX(b, 8, a, periph) /* pb8c_gloc_in6 */ #define PB8C_GLOC_IN6 \ SAM_PINMUX(b, 8, c, periph) /* pb8d_tc0_b0 */ #define PB8D_TC0_B0 \ SAM_PINMUX(b, 8, d, periph) /* pb8f_lcdca_seg14 */ #define PB8F_LCDCA_SEG14 \ SAM_PINMUX(b, 8, f, periph) /* pb8g_catb_sense28 */ #define PB8G_CATB_SENSE28 \ SAM_PINMUX(b, 8, g, periph) /* pb9_gpio */ #define PB9_GPIO \ SAM_PINMUX(b, 9, gpio, gpio) /* pb9a_usart3_rxd */ #define PB9A_USART3_RXD \ SAM_PINMUX(b, 9, a, periph) /* pb9b_pevd_evt2 */ #define PB9B_PEVD_EVT2 \ SAM_PINMUX(b, 9, b, periph) /* pb9c_gloc_in7 */ #define PB9C_GLOC_IN7 \ SAM_PINMUX(b, 9, c, periph) /* pb9d_tc0_a1 */ #define PB9D_TC0_A1 \ SAM_PINMUX(b, 9, d, periph) /* pb9f_lcdca_seg15 */ #define PB9F_LCDCA_SEG15 \ SAM_PINMUX(b, 9, f, periph) /* pb9g_catb_sense29 */ #define PB9G_CATB_SENSE29 \ SAM_PINMUX(b, 9, g, periph) /* pb10_gpio */ #define PB10_GPIO \ SAM_PINMUX(b, 10, gpio, gpio) /* pb10a_usart3_txd */ #define PB10A_USART3_TXD \ SAM_PINMUX(b, 10, a, periph) /* pb10b_pevd_evt3 */ #define PB10B_PEVD_EVT3 \ SAM_PINMUX(b, 10, b, periph) /* pb10c_gloc_out1 */ #define PB10C_GLOC_OUT1 \ SAM_PINMUX(b, 10, c, periph) /* pb10d_tc0_b1 */ #define PB10D_TC0_B1 \ SAM_PINMUX(b, 10, d, periph) /* pb10e_scif_gclk0 */ #define PB10E_SCIF_GCLK0 \ SAM_PINMUX(b, 10, e, periph) /* pb10f_lcdca_seg16 */ #define PB10F_LCDCA_SEG16 \ SAM_PINMUX(b, 10, f, periph) /* pb10g_catb_sense30 */ #define PB10G_CATB_SENSE30 \ SAM_PINMUX(b, 10, g, periph) /* pb11_gpio */ #define PB11_GPIO \ SAM_PINMUX(b, 11, gpio, gpio) /* pb11a_usart0_cts */ #define PB11A_USART0_CTS \ SAM_PINMUX(b, 11, a, periph) /* pb11b_spi_npcs2 */ #define PB11B_SPI_NPCS2 \ SAM_PINMUX(b, 11, b, periph) /* pb11d_tc0_a2 */ #define PB11D_TC0_A2 \ SAM_PINMUX(b, 11, d, periph) /* pb11e_scif_gclk1 */ #define PB11E_SCIF_GCLK1 \ SAM_PINMUX(b, 11, e, periph) /* pb11f_lcdca_seg17 */ #define PB11F_LCDCA_SEG17 \ SAM_PINMUX(b, 11, f, periph) /* pb11g_catb_sense31 */ #define PB11G_CATB_SENSE31 \ SAM_PINMUX(b, 11, g, periph) /* pb12_gpio */ #define PB12_GPIO \ SAM_PINMUX(b, 12, gpio, gpio) /* pb12a_usart0_rts */ #define PB12A_USART0_RTS \ SAM_PINMUX(b, 12, a, periph) /* pb12b_spi_npcs3 */ #define PB12B_SPI_NPCS3 \ SAM_PINMUX(b, 12, b, periph) /* pb12c_pevc_evt0 */ #define PB12C_PEVC_EVT0 \ SAM_PINMUX(b, 12, c, periph) /* pb12d_tc0_b2 */ #define PB12D_TC0_B2 \ SAM_PINMUX(b, 12, d, periph) /* pb12e_scif_gclk2 */ #define PB12E_SCIF_GCLK2 \ SAM_PINMUX(b, 12, e, periph) /* pb12f_lcdca_seg32 */ #define PB12F_LCDCA_SEG32 \ SAM_PINMUX(b, 12, f, periph) /* pb12g_catb_dis */ #define PB12G_CATB_DIS \ SAM_PINMUX(b, 12, g, periph) /* pb13_gpio */ #define PB13_GPIO \ SAM_PINMUX(b, 13, gpio, gpio) /* pb13a_usart0_clk */ #define PB13A_USART0_CLK \ SAM_PINMUX(b, 13, a, periph) /* pb13b_spi_npcs1 */ #define PB13B_SPI_NPCS1 \ SAM_PINMUX(b, 13, b, periph) /* pb13c_pevc_evt1 */ #define PB13C_PEVC_EVT1 \ SAM_PINMUX(b, 13, c, periph) /* pb13d_tc0_clk0 */ #define PB13D_TC0_CLK0 \ SAM_PINMUX(b, 13, d, periph) /* pb13e_scif_gclk3 */ #define PB13E_SCIF_GCLK3 \ SAM_PINMUX(b, 13, e, periph) /* pb13f_lcdca_seg33 */ #define PB13F_LCDCA_SEG33 \ SAM_PINMUX(b, 13, f, periph) /* pb13g_catb_sense0 */ #define PB13G_CATB_SENSE0 \ SAM_PINMUX(b, 13, g, periph) /* pb14_gpio */ #define PB14_GPIO \ SAM_PINMUX(b, 14, gpio, gpio) /* pb14a_usart0_rxd */ #define PB14A_USART0_RXD \ SAM_PINMUX(b, 14, a, periph) /* pb14b_spi_miso */ #define PB14B_SPI_MISO \ SAM_PINMUX(b, 14, b, periph) /* pb14c_twim3_twd */ #define PB14C_TWIM3_TWD \ SAM_PINMUX(b, 14, c, periph) /* pb14d_tc0_clk1 */ #define PB14D_TC0_CLK1 \ SAM_PINMUX(b, 14, d, periph) /* pb14e_scif_gclk_in0 */ #define PB14E_SCIF_GCLK_IN0 \ SAM_PINMUX(b, 14, e, periph) /* pb14f_lcdca_seg36 */ #define PB14F_LCDCA_SEG36 \ SAM_PINMUX(b, 14, f, periph) /* pb14g_catb_sense1 */ #define PB14G_CATB_SENSE1 \ SAM_PINMUX(b, 14, g, periph) /* pb15_gpio */ #define PB15_GPIO \ SAM_PINMUX(b, 15, gpio, gpio) /* pb15a_usart0_txd */ #define PB15A_USART0_TXD \ SAM_PINMUX(b, 15, a, periph) /* pb15b_spi_mosi */ #define PB15B_SPI_MOSI \ SAM_PINMUX(b, 15, b, periph) /* pb15c_twim3_twck */ #define PB15C_TWIM3_TWCK \ SAM_PINMUX(b, 15, c, periph) /* pb15d_tc0_clk2 */ #define PB15D_TC0_CLK2 \ SAM_PINMUX(b, 15, d, periph) /* pb15e_scif_gclk_in1 */ #define PB15E_SCIF_GCLK_IN1 \ SAM_PINMUX(b, 15, e, periph) /* pb15f_lcdca_seg37 */ #define PB15F_LCDCA_SEG37 \ SAM_PINMUX(b, 15, f, periph) /* pb15g_catb_sense2 */ #define PB15G_CATB_SENSE2 \ SAM_PINMUX(b, 15, g, periph) /* pc0_gpio */ #define PC0_GPIO \ SAM_PINMUX(c, 0, gpio, gpio) /* pc0a_spi_npcs2 */ #define PC0A_SPI_NPCS2 \ SAM_PINMUX(c, 0, a, periph) /* pc0b_usart0_clk */ #define PC0B_USART0_CLK \ SAM_PINMUX(c, 0, b, periph) /* pc0d_tc1_a0 */ #define PC0D_TC1_A0 \ SAM_PINMUX(c, 0, d, periph) /* pc0g_catb_sense3 */ #define PC0G_CATB_SENSE3 \ SAM_PINMUX(c, 0, g, periph) /* pc1_gpio */ #define PC1_GPIO \ SAM_PINMUX(c, 1, gpio, gpio) /* pc1a_spi_npcs3 */ #define PC1A_SPI_NPCS3 \ SAM_PINMUX(c, 1, a, periph) /* pc1b_usart0_rts */ #define PC1B_USART0_RTS \ SAM_PINMUX(c, 1, b, periph) /* pc1d_tc1_b0 */ #define PC1D_TC1_B0 \ SAM_PINMUX(c, 1, d, periph) /* pc1g_catb_sense4 */ #define PC1G_CATB_SENSE4 \ SAM_PINMUX(c, 1, g, periph) /* pc2_gpio */ #define PC2_GPIO \ SAM_PINMUX(c, 2, gpio, gpio) /* pc2a_spi_npcs1 */ #define PC2A_SPI_NPCS1 \ SAM_PINMUX(c, 2, a, periph) /* pc2b_usart0_cts */ #define PC2B_USART0_CTS \ SAM_PINMUX(c, 2, b, periph) /* pc2c_usart0_rxd */ #define PC2C_USART0_RXD \ SAM_PINMUX(c, 2, c, periph) /* pc2d_tc1_a1 */ #define PC2D_TC1_A1 \ SAM_PINMUX(c, 2, d, periph) /* pc2g_catb_sense5 */ #define PC2G_CATB_SENSE5 \ SAM_PINMUX(c, 2, g, periph) /* pc3_gpio */ #define PC3_GPIO \ SAM_PINMUX(c, 3, gpio, gpio) /* pc3a_spi_npcs0 */ #define PC3A_SPI_NPCS0 \ SAM_PINMUX(c, 3, a, periph) /* pc3b_eic_extint5 */ #define PC3B_EIC_EXTINT5 \ SAM_PINMUX(c, 3, b, periph) /* pc3c_usart0_txd */ #define PC3C_USART0_TXD \ SAM_PINMUX(c, 3, c, periph) /* pc3d_tc1_b1 */ #define PC3D_TC1_B1 \ SAM_PINMUX(c, 3, d, periph) /* pc3g_catb_sense6 */ #define PC3G_CATB_SENSE6 \ SAM_PINMUX(c, 3, g, periph) /* pc4_gpio */ #define PC4_GPIO \ SAM_PINMUX(c, 4, gpio, gpio) /* pc4a_spi_miso */ #define PC4A_SPI_MISO \ SAM_PINMUX(c, 4, a, periph) /* pc4b_eic_extint6 */ #define PC4B_EIC_EXTINT6 \ SAM_PINMUX(c, 4, b, periph) /* pc4d_tc1_a2 */ #define PC4D_TC1_A2 \ SAM_PINMUX(c, 4, d, periph) /* pc4g_catb_sense7 */ #define PC4G_CATB_SENSE7 \ SAM_PINMUX(c, 4, g, periph) /* pc5_gpio */ #define PC5_GPIO \ SAM_PINMUX(c, 5, gpio, gpio) /* pc5a_spi_mosi */ #define PC5A_SPI_MOSI \ SAM_PINMUX(c, 5, a, periph) /* pc5b_eic_extint7 */ #define PC5B_EIC_EXTINT7 \ SAM_PINMUX(c, 5, b, periph) /* pc5d_tc1_b2 */ #define PC5D_TC1_B2 \ SAM_PINMUX(c, 5, d, periph) /* pc5g_catb_dis */ #define PC5G_CATB_DIS \ SAM_PINMUX(c, 5, g, periph) /* pc6_gpio */ #define PC6_GPIO \ SAM_PINMUX(c, 6, gpio, gpio) /* pc6a_spi_sck */ #define PC6A_SPI_SCK \ SAM_PINMUX(c, 6, a, periph) /* pc6b_eic_extint8 */ #define PC6B_EIC_EXTINT8 \ SAM_PINMUX(c, 6, b, periph) /* pc6d_tc1_clk0 */ #define PC6D_TC1_CLK0 \ SAM_PINMUX(c, 6, d, periph) /* pc6g_catb_sense8 */ #define PC6G_CATB_SENSE8 \ SAM_PINMUX(c, 6, g, periph) /* pc7_gpio */ #define PC7_GPIO \ SAM_PINMUX(c, 7, gpio, gpio) /* pc7a_adcife_ad7 */ #define PC7A_ADCIFE_AD7 \ SAM_PINMUX(c, 7, a, periph) /* pc7b_usart2_rts */ #define PC7B_USART2_RTS \ SAM_PINMUX(c, 7, b, periph) /* pc7c_pevc_evt0 */ #define PC7C_PEVC_EVT0 \ SAM_PINMUX(c, 7, c, periph) /* pc7d_tc1_clk1 */ #define PC7D_TC1_CLK1 \ SAM_PINMUX(c, 7, d, periph) /* pc7g_catb_sense9 */ #define PC7G_CATB_SENSE9 \ SAM_PINMUX(c, 7, g, periph) /* pc8_gpio */ #define PC8_GPIO \ SAM_PINMUX(c, 8, gpio, gpio) /* pc8a_adcife_ad8 */ #define PC8A_ADCIFE_AD8 \ SAM_PINMUX(c, 8, a, periph) /* pc8b_usart2_clk */ #define PC8B_USART2_CLK \ SAM_PINMUX(c, 8, b, periph) /* pc8c_pevc_evt1 */ #define PC8C_PEVC_EVT1 \ SAM_PINMUX(c, 8, c, periph) /* pc8d_tc1_clk2 */ #define PC8D_TC1_CLK2 \ SAM_PINMUX(c, 8, d, periph) /* pc8e_usart2_cts */ #define PC8E_USART2_CTS \ SAM_PINMUX(c, 8, e, periph) /* pc8g_catb_sense10 */ #define PC8G_CATB_SENSE10 \ SAM_PINMUX(c, 8, g, periph) /* pc9_gpio */ #define PC9_GPIO \ SAM_PINMUX(c, 9, gpio, gpio) /* pc9a_adcife_ad9 */ #define PC9A_ADCIFE_AD9 \ SAM_PINMUX(c, 9, a, periph) /* pc9b_usart3_rxd */ #define PC9B_USART3_RXD \ SAM_PINMUX(c, 9, b, periph) /* pc9c_abdacb_dac0 */ #define PC9C_ABDACB_DAC0 \ SAM_PINMUX(c, 9, c, periph) /* pc9d_iisc_isck */ #define PC9D_IISC_ISCK \ SAM_PINMUX(c, 9, d, periph) /* pc9e_acifc_acan1 */ #define PC9E_ACIFC_ACAN1 \ SAM_PINMUX(c, 9, e, periph) /* pc9g_catb_sense11 */ #define PC9G_CATB_SENSE11 \ SAM_PINMUX(c, 9, g, periph) /* pc10_gpio */ #define PC10_GPIO \ SAM_PINMUX(c, 10, gpio, gpio) /* pc10a_adcife_ad10 */ #define PC10A_ADCIFE_AD10 \ SAM_PINMUX(c, 10, a, periph) /* pc10b_usart3_txd */ #define PC10B_USART3_TXD \ SAM_PINMUX(c, 10, b, periph) /* pc10c_abdacb_dacn0 */ #define PC10C_ABDACB_DACN0 \ SAM_PINMUX(c, 10, c, periph) /* pc10d_iisc_isdi */ #define PC10D_IISC_ISDI \ SAM_PINMUX(c, 10, d, periph) /* pc10e_acifc_acap1 */ #define PC10E_ACIFC_ACAP1 \ SAM_PINMUX(c, 10, e, periph) /* pc10g_catb_sense12 */ #define PC10G_CATB_SENSE12 \ SAM_PINMUX(c, 10, g, periph) /* pc11_gpio */ #define PC11_GPIO \ SAM_PINMUX(c, 11, gpio, gpio) /* pc11a_adcife_ad11 */ #define PC11A_ADCIFE_AD11 \ SAM_PINMUX(c, 11, a, periph) /* pc11b_usart2_rxd */ #define PC11B_USART2_RXD \ SAM_PINMUX(c, 11, b, periph) /* pc11c_pevc_evt2 */ #define PC11C_PEVC_EVT2 \ SAM_PINMUX(c, 11, c, periph) /* pc11g_catb_sense13 */ #define PC11G_CATB_SENSE13 \ SAM_PINMUX(c, 11, g, periph) /* pc12_gpio */ #define PC12_GPIO \ SAM_PINMUX(c, 12, gpio, gpio) /* pc12a_adcife_ad12 */ #define PC12A_ADCIFE_AD12 \ SAM_PINMUX(c, 12, a, periph) /* pc12b_usart2_txd */ #define PC12B_USART2_TXD \ SAM_PINMUX(c, 12, b, periph) /* pc12c_abdacb_clk */ #define PC12C_ABDACB_CLK \ SAM_PINMUX(c, 12, c, periph) /* pc12d_iisc_iws */ #define PC12D_IISC_IWS \ SAM_PINMUX(c, 12, d, periph) /* pc12g_catb_sense14 */ #define PC12G_CATB_SENSE14 \ SAM_PINMUX(c, 12, g, periph) /* pc13_gpio */ #define PC13_GPIO \ SAM_PINMUX(c, 13, gpio, gpio) /* pc13a_adcife_ad13 */ #define PC13A_ADCIFE_AD13 \ SAM_PINMUX(c, 13, a, periph) /* pc13b_usart3_rts */ #define PC13B_USART3_RTS \ SAM_PINMUX(c, 13, b, periph) /* pc13c_abdacb_dac1 */ #define PC13C_ABDACB_DAC1 \ SAM_PINMUX(c, 13, c, periph) /* pc13d_iisc_isdo */ #define PC13D_IISC_ISDO \ SAM_PINMUX(c, 13, d, periph) /* pc13e_acifc_acbn1 */ #define PC13E_ACIFC_ACBN1 \ SAM_PINMUX(c, 13, e, periph) /* pc13g_catb_sense15 */ #define PC13G_CATB_SENSE15 \ SAM_PINMUX(c, 13, g, periph) /* pc14_gpio */ #define PC14_GPIO \ SAM_PINMUX(c, 14, gpio, gpio) /* pc14a_adcife_ad14 */ #define PC14A_ADCIFE_AD14 \ SAM_PINMUX(c, 14, a, periph) /* pc14b_usart3_clk */ #define PC14B_USART3_CLK \ SAM_PINMUX(c, 14, b, periph) /* pc14c_abdacb_dacn1 */ #define PC14C_ABDACB_DACN1 \ SAM_PINMUX(c, 14, c, periph) /* pc14d_iisc_imck */ #define PC14D_IISC_IMCK \ SAM_PINMUX(c, 14, d, periph) /* pc14e_acifc_acbp1 */ #define PC14E_ACIFC_ACBP1 \ SAM_PINMUX(c, 14, e, periph) /* pc14g_catb_dis */ #define PC14G_CATB_DIS \ SAM_PINMUX(c, 14, g, periph) /* pc15_gpio */ #define PC15_GPIO \ SAM_PINMUX(c, 15, gpio, gpio) /* pc15a_tc1_a0 */ #define PC15A_TC1_A0 \ SAM_PINMUX(c, 15, a, periph) /* pc15d_gloc_in4 */ #define PC15D_GLOC_IN4 \ SAM_PINMUX(c, 15, d, periph) /* pc15f_lcdca_seg0 */ #define PC15F_LCDCA_SEG0 \ SAM_PINMUX(c, 15, f, periph) /* pc15g_catb_sense16 */ #define PC15G_CATB_SENSE16 \ SAM_PINMUX(c, 15, g, periph) /* pc16_gpio */ #define PC16_GPIO \ SAM_PINMUX(c, 16, gpio, gpio) /* pc16a_tc1_b0 */ #define PC16A_TC1_B0 \ SAM_PINMUX(c, 16, a, periph) /* pc16d_gloc_in5 */ #define PC16D_GLOC_IN5 \ SAM_PINMUX(c, 16, d, periph) /* pc16f_lcdca_seg1 */ #define PC16F_LCDCA_SEG1 \ SAM_PINMUX(c, 16, f, periph) /* pc16g_catb_sense17 */ #define PC16G_CATB_SENSE17 \ SAM_PINMUX(c, 16, g, periph) /* pc17_gpio */ #define PC17_GPIO \ SAM_PINMUX(c, 17, gpio, gpio) /* pc17a_tc1_a1 */ #define PC17A_TC1_A1 \ SAM_PINMUX(c, 17, a, periph) /* pc17d_gloc_in6 */ #define PC17D_GLOC_IN6 \ SAM_PINMUX(c, 17, d, periph) /* pc17f_lcdca_seg2 */ #define PC17F_LCDCA_SEG2 \ SAM_PINMUX(c, 17, f, periph) /* pc17g_catb_sense18 */ #define PC17G_CATB_SENSE18 \ SAM_PINMUX(c, 17, g, periph) /* pc18_gpio */ #define PC18_GPIO \ SAM_PINMUX(c, 18, gpio, gpio) /* pc18a_tc1_b1 */ #define PC18A_TC1_B1 \ SAM_PINMUX(c, 18, a, periph) /* pc18d_gloc_in7 */ #define PC18D_GLOC_IN7 \ SAM_PINMUX(c, 18, d, periph) /* pc18f_lcdca_seg3 */ #define PC18F_LCDCA_SEG3 \ SAM_PINMUX(c, 18, f, periph) /* pc18g_catb_sense19 */ #define PC18G_CATB_SENSE19 \ SAM_PINMUX(c, 18, g, periph) /* pc19_gpio */ #define PC19_GPIO \ SAM_PINMUX(c, 19, gpio, gpio) /* pc19a_tc1_a2 */ #define PC19A_TC1_A2 \ SAM_PINMUX(c, 19, a, periph) /* pc19d_gloc_out1 */ #define PC19D_GLOC_OUT1 \ SAM_PINMUX(c, 19, d, periph) /* pc19f_lcdca_seg4 */ #define PC19F_LCDCA_SEG4 \ SAM_PINMUX(c, 19, f, periph) /* pc19g_catb_sense20 */ #define PC19G_CATB_SENSE20 \ SAM_PINMUX(c, 19, g, periph) /* pc20_gpio */ #define PC20_GPIO \ SAM_PINMUX(c, 20, gpio, gpio) /* pc20a_tc1_b2 */ #define PC20A_TC1_B2 \ SAM_PINMUX(c, 20, a, periph) /* pc20f_lcdca_seg10 */ #define PC20F_LCDCA_SEG10 \ SAM_PINMUX(c, 20, f, periph) /* pc20g_catb_sense21 */ #define PC20G_CATB_SENSE21 \ SAM_PINMUX(c, 20, g, periph) /* pc21_gpio */ #define PC21_GPIO \ SAM_PINMUX(c, 21, gpio, gpio) /* pc21a_tc1_clk0 */ #define PC21A_TC1_CLK0 \ SAM_PINMUX(c, 21, a, periph) /* pc21d_parc_pcck */ #define PC21D_PARC_PCCK \ SAM_PINMUX(c, 21, d, periph) /* pc21f_lcdca_seg11 */ #define PC21F_LCDCA_SEG11 \ SAM_PINMUX(c, 21, f, periph) /* pc21g_catb_sense22 */ #define PC21G_CATB_SENSE22 \ SAM_PINMUX(c, 21, g, periph) /* pc22_gpio */ #define PC22_GPIO \ SAM_PINMUX(c, 22, gpio, gpio) /* pc22a_tc1_clk1 */ #define PC22A_TC1_CLK1 \ SAM_PINMUX(c, 22, a, periph) /* pc22d_parc_pcen1 */ #define PC22D_PARC_PCEN1 \ SAM_PINMUX(c, 22, d, periph) /* pc22f_lcdca_seg12 */ #define PC22F_LCDCA_SEG12 \ SAM_PINMUX(c, 22, f, periph) /* pc22g_catb_sense23 */ #define PC22G_CATB_SENSE23 \ SAM_PINMUX(c, 22, g, periph) /* pc23_gpio */ #define PC23_GPIO \ SAM_PINMUX(c, 23, gpio, gpio) /* pc23a_tc1_clk2 */ #define PC23A_TC1_CLK2 \ SAM_PINMUX(c, 23, a, periph) /* pc23d_parc_pcen2 */ #define PC23D_PARC_PCEN2 \ SAM_PINMUX(c, 23, d, periph) /* pc23f_lcdca_seg13 */ #define PC23F_LCDCA_SEG13 \ SAM_PINMUX(c, 23, f, periph) /* pc23g_catb_dis */ #define PC23G_CATB_DIS \ SAM_PINMUX(c, 23, g, periph) /* pc24_gpio */ #define PC24_GPIO \ SAM_PINMUX(c, 24, gpio, gpio) /* pc24a_usart1_rts */ #define PC24A_USART1_RTS \ SAM_PINMUX(c, 24, a, periph) /* pc24b_eic_extint1 */ #define PC24B_EIC_EXTINT1 \ SAM_PINMUX(c, 24, b, periph) /* pc24c_pevc_evt0 */ #define PC24C_PEVC_EVT0 \ SAM_PINMUX(c, 24, c, periph) /* pc24d_parc_pcdata0 */ #define PC24D_PARC_PCDATA0 \ SAM_PINMUX(c, 24, d, periph) /* pc24f_lcdca_seg24 */ #define PC24F_LCDCA_SEG24 \ SAM_PINMUX(c, 24, f, periph) /* pc24g_catb_sense24 */ #define PC24G_CATB_SENSE24 \ SAM_PINMUX(c, 24, g, periph) /* pc25_gpio */ #define PC25_GPIO \ SAM_PINMUX(c, 25, gpio, gpio) /* pc25a_usart1_clk */ #define PC25A_USART1_CLK \ SAM_PINMUX(c, 25, a, periph) /* pc25b_eic_extint2 */ #define PC25B_EIC_EXTINT2 \ SAM_PINMUX(c, 25, b, periph) /* pc25c_pevc_evt1 */ #define PC25C_PEVC_EVT1 \ SAM_PINMUX(c, 25, c, periph) /* pc25d_parc_pcdata1 */ #define PC25D_PARC_PCDATA1 \ SAM_PINMUX(c, 25, d, periph) /* pc25f_lcdca_seg25 */ #define PC25F_LCDCA_SEG25 \ SAM_PINMUX(c, 25, f, periph) /* pc25g_catb_sense25 */ #define PC25G_CATB_SENSE25 \ SAM_PINMUX(c, 25, g, periph) /* pc26_gpio */ #define PC26_GPIO \ SAM_PINMUX(c, 26, gpio, gpio) /* pc26a_usart1_rxd */ #define PC26A_USART1_RXD \ SAM_PINMUX(c, 26, a, periph) /* pc26b_eic_extint3 */ #define PC26B_EIC_EXTINT3 \ SAM_PINMUX(c, 26, b, periph) /* pc26c_pevc_evt2 */ #define PC26C_PEVC_EVT2 \ SAM_PINMUX(c, 26, c, periph) /* pc26d_parc_pcdata2 */ #define PC26D_PARC_PCDATA2 \ SAM_PINMUX(c, 26, d, periph) /* pc26e_scif_glkc0 */ #define PC26E_SCIF_GLKC0 \ SAM_PINMUX(c, 26, e, periph) /* pc26f_lcdca_seg26 */ #define PC26F_LCDCA_SEG26 \ SAM_PINMUX(c, 26, f, periph) /* pc26g_catb_sense26 */ #define PC26G_CATB_SENSE26 \ SAM_PINMUX(c, 26, g, periph) /* pc27_gpio */ #define PC27_GPIO \ SAM_PINMUX(c, 27, gpio, gpio) /* pc27a_usart1_txd */ #define PC27A_USART1_TXD \ SAM_PINMUX(c, 27, a, periph) /* pc27b_eic_extint4 */ #define PC27B_EIC_EXTINT4 \ SAM_PINMUX(c, 27, b, periph) /* pc27c_pevc_evt3 */ #define PC27C_PEVC_EVT3 \ SAM_PINMUX(c, 27, c, periph) /* pc27d_parc_pcdata3 */ #define PC27D_PARC_PCDATA3 \ SAM_PINMUX(c, 27, d, periph) /* pc27e_scif_gclk1 */ #define PC27E_SCIF_GCLK1 \ SAM_PINMUX(c, 27, e, periph) /* pc27f_lcdca_seg27 */ #define PC27F_LCDCA_SEG27 \ SAM_PINMUX(c, 27, f, periph) /* pc27g_catb_sense27 */ #define PC27G_CATB_SENSE27 \ SAM_PINMUX(c, 27, g, periph) /* pc28_gpio */ #define PC28_GPIO \ SAM_PINMUX(c, 28, gpio, gpio) /* pc28a_usart3_rxd */ #define PC28A_USART3_RXD \ SAM_PINMUX(c, 28, a, periph) /* pc28b_spi_miso */ #define PC28B_SPI_MISO \ SAM_PINMUX(c, 28, b, periph) /* pc28c_gloc_in4 */ #define PC28C_GLOC_IN4 \ SAM_PINMUX(c, 28, c, periph) /* pc28d_parc_pcdata4 */ #define PC28D_PARC_PCDATA4 \ SAM_PINMUX(c, 28, d, periph) /* pc28e_scif_gclk2 */ #define PC28E_SCIF_GCLK2 \ SAM_PINMUX(c, 28, e, periph) /* pc28f_lcdca_seg28 */ #define PC28F_LCDCA_SEG28 \ SAM_PINMUX(c, 28, f, periph) /* pc28g_catb_sense28 */ #define PC28G_CATB_SENSE28 \ SAM_PINMUX(c, 28, g, periph) /* pc29_gpio */ #define PC29_GPIO \ SAM_PINMUX(c, 29, gpio, gpio) /* pc29a_usart3_txd */ #define PC29A_USART3_TXD \ SAM_PINMUX(c, 29, a, periph) /* pc29b_spi_mosi */ #define PC29B_SPI_MOSI \ SAM_PINMUX(c, 29, b, periph) /* pc29c_gloc_in5 */ #define PC29C_GLOC_IN5 \ SAM_PINMUX(c, 29, c, periph) /* pc29d_parc_pcdata5 */ #define PC29D_PARC_PCDATA5 \ SAM_PINMUX(c, 29, d, periph) /* pc29e_scif_gclk3 */ #define PC29E_SCIF_GCLK3 \ SAM_PINMUX(c, 29, e, periph) /* pc29f_lcdca_seg29 */ #define PC29F_LCDCA_SEG29 \ SAM_PINMUX(c, 29, f, periph) /* pc29g_catb_sense29 */ #define PC29G_CATB_SENSE29 \ SAM_PINMUX(c, 29, g, periph) /* pc30_gpio */ #define PC30_GPIO \ SAM_PINMUX(c, 30, gpio, gpio) /* pc30a_usart3_rts */ #define PC30A_USART3_RTS \ SAM_PINMUX(c, 30, a, periph) /* pc30b_spi_sck */ #define PC30B_SPI_SCK \ SAM_PINMUX(c, 30, b, periph) /* pc30c_gloc_in6 */ #define PC30C_GLOC_IN6 \ SAM_PINMUX(c, 30, c, periph) /* pc30d_parc_pcdata6 */ #define PC30D_PARC_PCDATA6 \ SAM_PINMUX(c, 30, d, periph) /* pc30e_scif_gclk_in0 */ #define PC30E_SCIF_GCLK_IN0 \ SAM_PINMUX(c, 30, e, periph) /* pc30f_lcdca_seg30 */ #define PC30F_LCDCA_SEG30 \ SAM_PINMUX(c, 30, f, periph) /* pc30g_catb_sense30 */ #define PC30G_CATB_SENSE30 \ SAM_PINMUX(c, 30, g, periph) /* pc31_gpio */ #define PC31_GPIO \ SAM_PINMUX(c, 31, gpio, gpio) /* pc31a_usart3_clk */ #define PC31A_USART3_CLK \ SAM_PINMUX(c, 31, a, periph) /* pc31b_spi_npcs0 */ #define PC31B_SPI_NPCS0 \ SAM_PINMUX(c, 31, b, periph) /* pc31c_gloc_out1 */ #define PC31C_GLOC_OUT1 \ SAM_PINMUX(c, 31, c, periph) /* pc31d_parc_pcdata7 */ #define PC31D_PARC_PCDATA7 \ SAM_PINMUX(c, 31, d, periph) /* pc31e_scif_gclk_in1 */ #define PC31E_SCIF_GCLK_IN1 \ SAM_PINMUX(c, 31, e, periph) /* pc31f_lcdca_seg31 */ #define PC31F_LCDCA_SEG31 \ SAM_PINMUX(c, 31, f, periph) /* pc31g_catb_sense31 */ #define PC31G_CATB_SENSE31 \ SAM_PINMUX(c, 31, g, periph)