/* * Autogenerated file * * SPDX-License-Identifier: Apache-2.0 */ #include /* pa0_gpio */ #define PA0_GPIO \ SAM_PINMUX(a, 0, gpio, gpio) /* pa0a_pwm_pwmh0 */ #define PA0A_PWM_PWMH0 \ SAM_PINMUX(a, 0, a, periph) /* pa0b_tc0_tioa0 */ #define PA0B_TC0_TIOA0 \ SAM_PINMUX(a, 0, b, periph) /* pa0x_supc_wkup0 */ #define PA0X_SUPC_WKUP0 \ SAM_PINMUX(a, 0, x, extra) /* pa1_gpio */ #define PA1_GPIO \ SAM_PINMUX(a, 1, gpio, gpio) /* pa1a_pwm_pwmh1 */ #define PA1A_PWM_PWMH1 \ SAM_PINMUX(a, 1, a, periph) /* pa1b_tc0_tiob0 */ #define PA1B_TC0_TIOB0 \ SAM_PINMUX(a, 1, b, periph) /* pa1x_supc_wkup1 */ #define PA1X_SUPC_WKUP1 \ SAM_PINMUX(a, 1, x, extra) /* pa2_gpio */ #define PA2_GPIO \ SAM_PINMUX(a, 2, gpio, gpio) /* pa2a_pwm_pwmh2 */ #define PA2A_PWM_PWMH2 \ SAM_PINMUX(a, 2, a, periph) /* pa2c_dacc_datrg */ #define PA2C_DACC_DATRG \ SAM_PINMUX(a, 2, c, periph) /* pa2x_supc_wkup2 */ #define PA2X_SUPC_WKUP2 \ SAM_PINMUX(a, 2, x, extra) /* pa3_gpio */ #define PA3_GPIO \ SAM_PINMUX(a, 3, gpio, gpio) /* pa3a_twi0_twd */ #define PA3A_TWI0_TWD \ SAM_PINMUX(a, 3, a, periph) /* pa3b_spi_npcs3 */ #define PA3B_SPI_NPCS3 \ SAM_PINMUX(a, 3, b, periph) /* pa4_gpio */ #define PA4_GPIO \ SAM_PINMUX(a, 4, gpio, gpio) /* pa4a_twi0_twck */ #define PA4A_TWI0_TWCK \ SAM_PINMUX(a, 4, a, periph) /* pa4b_tc0_tclk0 */ #define PA4B_TC0_TCLK0 \ SAM_PINMUX(a, 4, b, periph) /* pa4x_supc_wkup3 */ #define PA4X_SUPC_WKUP3 \ SAM_PINMUX(a, 4, x, extra) /* pa5_gpio */ #define PA5_GPIO \ SAM_PINMUX(a, 5, gpio, gpio) /* pa5b_spi_npcs3 */ #define PA5B_SPI_NPCS3 \ SAM_PINMUX(a, 5, b, periph) /* pa5c_uart1_rxd */ #define PA5C_UART1_RXD \ SAM_PINMUX(a, 5, c, periph) /* pa5x_supc_wkup4 */ #define PA5X_SUPC_WKUP4 \ SAM_PINMUX(a, 5, x, extra) /* pa6_gpio */ #define PA6_GPIO \ SAM_PINMUX(a, 6, gpio, gpio) /* pa6b_pmc_pck0 */ #define PA6B_PMC_PCK0 \ SAM_PINMUX(a, 6, b, periph) /* pa6c_uart1_txd */ #define PA6C_UART1_TXD \ SAM_PINMUX(a, 6, c, periph) /* pa7_gpio */ #define PA7_GPIO \ SAM_PINMUX(a, 7, gpio, gpio) /* pa7b_pwm_pwmh3 */ #define PA7B_PWM_PWMH3 \ SAM_PINMUX(a, 7, b, periph) /* pa7s_supc_xin32 */ #define PA7S_SUPC_XIN32 \ SAM_PINMUX(a, 7, s, system) /* pa8_gpio */ #define PA8_GPIO \ SAM_PINMUX(a, 8, gpio, gpio) /* pa8b_afec0_adtrg */ #define PA8B_AFEC0_ADTRG \ SAM_PINMUX(a, 8, b, periph) /* pa8x_supc_wkup5 */ #define PA8X_SUPC_WKUP5 \ SAM_PINMUX(a, 8, x, extra) /* pa8s_supc_xout32 */ #define PA8S_SUPC_XOUT32 \ SAM_PINMUX(a, 8, s, system) /* pa9_gpio */ #define PA9_GPIO \ SAM_PINMUX(a, 9, gpio, gpio) /* pa9a_uart0_rxd */ #define PA9A_UART0_RXD \ SAM_PINMUX(a, 9, a, periph) /* pa9b_spi_npcs1 */ #define PA9B_SPI_NPCS1 \ SAM_PINMUX(a, 9, b, periph) /* pa9c_pwm_pwmfi0 */ #define PA9C_PWM_PWMFI0 \ SAM_PINMUX(a, 9, c, periph) /* pa9x_supc_wkup6 */ #define PA9X_SUPC_WKUP6 \ SAM_PINMUX(a, 9, x, extra) /* pa10_gpio */ #define PA10_GPIO \ SAM_PINMUX(a, 10, gpio, gpio) /* pa10a_uart0_txd */ #define PA10A_UART0_TXD \ SAM_PINMUX(a, 10, a, periph) /* pa10b_spi_npcs2 */ #define PA10B_SPI_NPCS2 \ SAM_PINMUX(a, 10, b, periph) /* pa11_gpio */ #define PA11_GPIO \ SAM_PINMUX(a, 11, gpio, gpio) /* pa11a_spi_npcs0 */ #define PA11A_SPI_NPCS0 \ SAM_PINMUX(a, 11, a, periph) /* pa11b_pwm_pwmh0 */ #define PA11B_PWM_PWMH0 \ SAM_PINMUX(a, 11, b, periph) /* pa11x_supc_wkup7 */ #define PA11X_SUPC_WKUP7 \ SAM_PINMUX(a, 11, x, extra) /* pa12_gpio */ #define PA12_GPIO \ SAM_PINMUX(a, 12, gpio, gpio) /* pa12a_spi_miso */ #define PA12A_SPI_MISO \ SAM_PINMUX(a, 12, a, periph) /* pa12b_pwm_pwmh1 */ #define PA12B_PWM_PWMH1 \ SAM_PINMUX(a, 12, b, periph) /* pa13_gpio */ #define PA13_GPIO \ SAM_PINMUX(a, 13, gpio, gpio) /* pa13a_spi_mosi */ #define PA13A_SPI_MOSI \ SAM_PINMUX(a, 13, a, periph) /* pa13b_pwm_pwmh2 */ #define PA13B_PWM_PWMH2 \ SAM_PINMUX(a, 13, b, periph) /* pa14_gpio */ #define PA14_GPIO \ SAM_PINMUX(a, 14, gpio, gpio) /* pa14a_spi_spck */ #define PA14A_SPI_SPCK \ SAM_PINMUX(a, 14, a, periph) /* pa14b_pwm_pwmh3 */ #define PA14B_PWM_PWMH3 \ SAM_PINMUX(a, 14, b, periph) /* pa14x_supc_wkup8 */ #define PA14X_SUPC_WKUP8 \ SAM_PINMUX(a, 14, x, extra) /* pa15_gpio */ #define PA15_GPIO \ SAM_PINMUX(a, 15, gpio, gpio) /* pa15b_tc0_tioa1 */ #define PA15B_TC0_TIOA1 \ SAM_PINMUX(a, 15, b, periph) /* pa15c_pwm_pwml3 */ #define PA15C_PWM_PWML3 \ SAM_PINMUX(a, 15, c, periph) /* pa15x_pio_piodcen1 */ #define PA15X_PIO_PIODCEN1 \ SAM_PINMUX(a, 15, x, extra) /* pa15x_supc_wkup14 */ #define PA15X_SUPC_WKUP14 \ SAM_PINMUX(a, 15, x, extra) /* pa16_gpio */ #define PA16_GPIO \ SAM_PINMUX(a, 16, gpio, gpio) /* pa16b_tc0_tiob1 */ #define PA16B_TC0_TIOB1 \ SAM_PINMUX(a, 16, b, periph) /* pa16c_pwm_pwml2 */ #define PA16C_PWM_PWML2 \ SAM_PINMUX(a, 16, c, periph) /* pa16x_pio_piodcen2 */ #define PA16X_PIO_PIODCEN2 \ SAM_PINMUX(a, 16, x, extra) /* pa16x_supc_wkup15 */ #define PA16X_SUPC_WKUP15 \ SAM_PINMUX(a, 16, x, extra) /* pa17_gpio */ #define PA17_GPIO \ SAM_PINMUX(a, 17, gpio, gpio) /* pa17b_pmc_pck1 */ #define PA17B_PMC_PCK1 \ SAM_PINMUX(a, 17, b, periph) /* pa17c_pwm_pwmh3 */ #define PA17C_PWM_PWMH3 \ SAM_PINMUX(a, 17, c, periph) /* pa17x_afec0_ad0 */ #define PA17X_AFEC0_AD0 \ SAM_PINMUX(a, 17, x, extra) /* pa18_gpio */ #define PA18_GPIO \ SAM_PINMUX(a, 18, gpio, gpio) /* pa18b_pmc_pck2 */ #define PA18B_PMC_PCK2 \ SAM_PINMUX(a, 18, b, periph) /* pa18x_afec0_ad1 */ #define PA18X_AFEC0_AD1 \ SAM_PINMUX(a, 18, x, extra) /* pa19_gpio */ #define PA19_GPIO \ SAM_PINMUX(a, 19, gpio, gpio) /* pa19b_pwm_pwml0 */ #define PA19B_PWM_PWML0 \ SAM_PINMUX(a, 19, b, periph) /* pa19x_afec0_ad2 */ #define PA19X_AFEC0_AD2 \ SAM_PINMUX(a, 19, x, extra) /* pa19x_supc_wkup9 */ #define PA19X_SUPC_WKUP9 \ SAM_PINMUX(a, 19, x, extra) /* pa20_gpio */ #define PA20_GPIO \ SAM_PINMUX(a, 20, gpio, gpio) /* pa20b_pwm_pwml1 */ #define PA20B_PWM_PWML1 \ SAM_PINMUX(a, 20, b, periph) /* pa20x_afec0_ad3 */ #define PA20X_AFEC0_AD3 \ SAM_PINMUX(a, 20, x, extra) /* pa20x_supc_wkup10 */ #define PA20X_SUPC_WKUP10 \ SAM_PINMUX(a, 20, x, extra) /* pa21_gpio */ #define PA21_GPIO \ SAM_PINMUX(a, 21, gpio, gpio) /* pa21a_usart1_rxd */ #define PA21A_USART1_RXD \ SAM_PINMUX(a, 21, a, periph) /* pa21b_pmc_pck1 */ #define PA21B_PMC_PCK1 \ SAM_PINMUX(a, 21, b, periph) /* pa21x_afec1_ad2 */ #define PA21X_AFEC1_AD2 \ SAM_PINMUX(a, 21, x, extra) /* pa22_gpio */ #define PA22_GPIO \ SAM_PINMUX(a, 22, gpio, gpio) /* pa22a_usart1_txd */ #define PA22A_USART1_TXD \ SAM_PINMUX(a, 22, a, periph) /* pa22b_spi_npcs3 */ #define PA22B_SPI_NPCS3 \ SAM_PINMUX(a, 22, b, periph) /* pa22x_afec1_ad3 */ #define PA22X_AFEC1_AD3 \ SAM_PINMUX(a, 22, x, extra) /* pa23_gpio */ #define PA23_GPIO \ SAM_PINMUX(a, 23, gpio, gpio) /* pa23a_usart1_sck */ #define PA23A_USART1_SCK \ SAM_PINMUX(a, 23, a, periph) /* pa23b_pwm_pwmh0 */ #define PA23B_PWM_PWMH0 \ SAM_PINMUX(a, 23, b, periph) /* pa23x_pio_piodcclk */ #define PA23X_PIO_PIODCCLK \ SAM_PINMUX(a, 23, x, extra) /* pa24_gpio */ #define PA24_GPIO \ SAM_PINMUX(a, 24, gpio, gpio) /* pa24a_usart1_rts */ #define PA24A_USART1_RTS \ SAM_PINMUX(a, 24, a, periph) /* pa24b_pwm_pwmh1 */ #define PA24B_PWM_PWMH1 \ SAM_PINMUX(a, 24, b, periph) /* pa24x_pio_piodc0 */ #define PA24X_PIO_PIODC0 \ SAM_PINMUX(a, 24, x, extra) /* pa25_gpio */ #define PA25_GPIO \ SAM_PINMUX(a, 25, gpio, gpio) /* pa25a_usart1_cts */ #define PA25A_USART1_CTS \ SAM_PINMUX(a, 25, a, periph) /* pa25b_pwm_pwmh2 */ #define PA25B_PWM_PWMH2 \ SAM_PINMUX(a, 25, b, periph) /* pa25x_pio_piodc1 */ #define PA25X_PIO_PIODC1 \ SAM_PINMUX(a, 25, x, extra) /* pa26_gpio */ #define PA26_GPIO \ SAM_PINMUX(a, 26, gpio, gpio) /* pa26a_usart1_dcd */ #define PA26A_USART1_DCD \ SAM_PINMUX(a, 26, a, periph) /* pa26b_tc0_tioa2 */ #define PA26B_TC0_TIOA2 \ SAM_PINMUX(a, 26, b, periph) /* pa26c_hsmci_mcda2 */ #define PA26C_HSMCI_MCDA2 \ SAM_PINMUX(a, 26, c, periph) /* pa26x_pio_piodc2 */ #define PA26X_PIO_PIODC2 \ SAM_PINMUX(a, 26, x, extra) /* pa27_gpio */ #define PA27_GPIO \ SAM_PINMUX(a, 27, gpio, gpio) /* pa27a_usart1_dtr */ #define PA27A_USART1_DTR \ SAM_PINMUX(a, 27, a, periph) /* pa27b_tc0_tiob2 */ #define PA27B_TC0_TIOB2 \ SAM_PINMUX(a, 27, b, periph) /* pa27c_hsmci_mcda3 */ #define PA27C_HSMCI_MCDA3 \ SAM_PINMUX(a, 27, c, periph) /* pa27x_pio_piodc3 */ #define PA27X_PIO_PIODC3 \ SAM_PINMUX(a, 27, x, extra) /* pa28_gpio */ #define PA28_GPIO \ SAM_PINMUX(a, 28, gpio, gpio) /* pa28a_usart1_dsr */ #define PA28A_USART1_DSR \ SAM_PINMUX(a, 28, a, periph) /* pa28b_tc0_tclk1 */ #define PA28B_TC0_TCLK1 \ SAM_PINMUX(a, 28, b, periph) /* pa28c_hsmci_mccda */ #define PA28C_HSMCI_MCCDA \ SAM_PINMUX(a, 28, c, periph) /* pa28x_pio_piodc4 */ #define PA28X_PIO_PIODC4 \ SAM_PINMUX(a, 28, x, extra) /* pa29_gpio */ #define PA29_GPIO \ SAM_PINMUX(a, 29, gpio, gpio) /* pa29a_usart1_ri */ #define PA29A_USART1_RI \ SAM_PINMUX(a, 29, a, periph) /* pa29b_tc0_tclk2 */ #define PA29B_TC0_TCLK2 \ SAM_PINMUX(a, 29, b, periph) /* pa29c_hsmci_mcck */ #define PA29C_HSMCI_MCCK \ SAM_PINMUX(a, 29, c, periph) /* pa29x_pio_piodc5 */ #define PA29X_PIO_PIODC5 \ SAM_PINMUX(a, 29, x, extra) /* pa30_gpio */ #define PA30_GPIO \ SAM_PINMUX(a, 30, gpio, gpio) /* pa30a_pwm_pwml2 */ #define PA30A_PWM_PWML2 \ SAM_PINMUX(a, 30, a, periph) /* pa30b_spi_npcs2 */ #define PA30B_SPI_NPCS2 \ SAM_PINMUX(a, 30, b, periph) /* pa30c_hsmci_mcda0 */ #define PA30C_HSMCI_MCDA0 \ SAM_PINMUX(a, 30, c, periph) /* pa30x_pio_piodc6 */ #define PA30X_PIO_PIODC6 \ SAM_PINMUX(a, 30, x, extra) /* pa30x_supc_wkup11 */ #define PA30X_SUPC_WKUP11 \ SAM_PINMUX(a, 30, x, extra) /* pa31_gpio */ #define PA31_GPIO \ SAM_PINMUX(a, 31, gpio, gpio) /* pa31a_spi_npcs1 */ #define PA31A_SPI_NPCS1 \ SAM_PINMUX(a, 31, a, periph) /* pa31b_pmc_pck2 */ #define PA31B_PMC_PCK2 \ SAM_PINMUX(a, 31, b, periph) /* pa31c_hsmci_mcda1 */ #define PA31C_HSMCI_MCDA1 \ SAM_PINMUX(a, 31, c, periph) /* pa31x_pio_piodc7 */ #define PA31X_PIO_PIODC7 \ SAM_PINMUX(a, 31, x, extra) /* pb0_gpio */ #define PB0_GPIO \ SAM_PINMUX(b, 0, gpio, gpio) /* pb0a_pwm_pwmh0 */ #define PB0A_PWM_PWMH0 \ SAM_PINMUX(b, 0, a, periph) /* pb0c_usart0_rxd */ #define PB0C_USART0_RXD \ SAM_PINMUX(b, 0, c, periph) /* pb0x_afec0_ad4 */ #define PB0X_AFEC0_AD4 \ SAM_PINMUX(b, 0, x, extra) /* pb0x_rtc_out0 */ #define PB0X_RTC_OUT0 \ SAM_PINMUX(b, 0, x, extra) /* pb1_gpio */ #define PB1_GPIO \ SAM_PINMUX(b, 1, gpio, gpio) /* pb1a_pwm_pwmh1 */ #define PB1A_PWM_PWMH1 \ SAM_PINMUX(b, 1, a, periph) /* pb1c_usart0_txd */ #define PB1C_USART0_TXD \ SAM_PINMUX(b, 1, c, periph) /* pb1x_afec0_ad5 */ #define PB1X_AFEC0_AD5 \ SAM_PINMUX(b, 1, x, extra) /* pb1x_rtc_out1 */ #define PB1X_RTC_OUT1 \ SAM_PINMUX(b, 1, x, extra) /* pb2_gpio */ #define PB2_GPIO \ SAM_PINMUX(b, 2, gpio, gpio) /* pb2a_can0_tx */ #define PB2A_CAN0_TX \ SAM_PINMUX(b, 2, a, periph) /* pb2b_spi_npcs2 */ #define PB2B_SPI_NPCS2 \ SAM_PINMUX(b, 2, b, periph) /* pb2c_usart0_cts */ #define PB2C_USART0_CTS \ SAM_PINMUX(b, 2, c, periph) /* pb2x_afec1_ad0 */ #define PB2X_AFEC1_AD0 \ SAM_PINMUX(b, 2, x, extra) /* pb2x_supc_wkup12 */ #define PB2X_SUPC_WKUP12 \ SAM_PINMUX(b, 2, x, extra) /* pb3_gpio */ #define PB3_GPIO \ SAM_PINMUX(b, 3, gpio, gpio) /* pb3a_can0_rx */ #define PB3A_CAN0_RX \ SAM_PINMUX(b, 3, a, periph) /* pb3b_pmc_pck2 */ #define PB3B_PMC_PCK2 \ SAM_PINMUX(b, 3, b, periph) /* pb3c_usart0_rts */ #define PB3C_USART0_RTS \ SAM_PINMUX(b, 3, c, periph) /* pb3x_afec1_ad1 */ #define PB3X_AFEC1_AD1 \ SAM_PINMUX(b, 3, x, extra) /* pb4_gpio */ #define PB4_GPIO \ SAM_PINMUX(b, 4, gpio, gpio) /* pb4a_twi1_twd */ #define PB4A_TWI1_TWD \ SAM_PINMUX(b, 4, a, periph) /* pb4b_pwm_pwmh2 */ #define PB4B_PWM_PWMH2 \ SAM_PINMUX(b, 4, b, periph) /* pb4s_jtag_tdi */ #define PB4S_JTAG_TDI \ SAM_PINMUX(b, 4, s, system) /* pb5_gpio */ #define PB5_GPIO \ SAM_PINMUX(b, 5, gpio, gpio) /* pb5a_twi1_twck */ #define PB5A_TWI1_TWCK \ SAM_PINMUX(b, 5, a, periph) /* pb5b_pwm_pwml0 */ #define PB5B_PWM_PWML0 \ SAM_PINMUX(b, 5, b, periph) /* pb5x_supc_wkup13 */ #define PB5X_SUPC_WKUP13 \ SAM_PINMUX(b, 5, x, extra) /* pb5s_jtag_tdo */ #define PB5S_JTAG_TDO \ SAM_PINMUX(b, 5, s, system) /* pb5s_swd_traceswo */ #define PB5S_SWD_TRACESWO \ SAM_PINMUX(b, 5, s, system) /* pb6_gpio */ #define PB6_GPIO \ SAM_PINMUX(b, 6, gpio, gpio) /* pb6s_jtag_tms */ #define PB6S_JTAG_TMS \ SAM_PINMUX(b, 6, s, system) /* pb6s_swd_swdio */ #define PB6S_SWD_SWDIO \ SAM_PINMUX(b, 6, s, system) /* pb7_gpio */ #define PB7_GPIO \ SAM_PINMUX(b, 7, gpio, gpio) /* pb7s_jtag_tck */ #define PB7S_JTAG_TCK \ SAM_PINMUX(b, 7, s, system) /* pb7s_swd_swclk */ #define PB7S_SWD_SWCLK \ SAM_PINMUX(b, 7, s, system) /* pb8_gpio */ #define PB8_GPIO \ SAM_PINMUX(b, 8, gpio, gpio) /* pb8s_supc_xout */ #define PB8S_SUPC_XOUT \ SAM_PINMUX(b, 8, s, system) /* pb9_gpio */ #define PB9_GPIO \ SAM_PINMUX(b, 9, gpio, gpio) /* pb9s_supc_xin */ #define PB9S_SUPC_XIN \ SAM_PINMUX(b, 9, s, system) /* pb10_gpio */ #define PB10_GPIO \ SAM_PINMUX(b, 10, gpio, gpio) /* pb10s_udp_ddm */ #define PB10S_UDP_DDM \ SAM_PINMUX(b, 10, s, system) /* pb11_gpio */ #define PB11_GPIO \ SAM_PINMUX(b, 11, gpio, gpio) /* pb11s_udp_ddp */ #define PB11S_UDP_DDP \ SAM_PINMUX(b, 11, s, system) /* pb12_gpio */ #define PB12_GPIO \ SAM_PINMUX(b, 12, gpio, gpio) /* pb12a_pwm_pwml1 */ #define PB12A_PWM_PWML1 \ SAM_PINMUX(b, 12, a, periph) /* pb12s_flash_erase */ #define PB12S_FLASH_ERASE \ SAM_PINMUX(b, 12, s, system) /* pb13_gpio */ #define PB13_GPIO \ SAM_PINMUX(b, 13, gpio, gpio) /* pb13a_pwm_pwml2 */ #define PB13A_PWM_PWML2 \ SAM_PINMUX(b, 13, a, periph) /* pb13b_pcm_pck0 */ #define PB13B_PCM_PCK0 \ SAM_PINMUX(b, 13, b, periph) /* pb13c_usart0_sck */ #define PB13C_USART0_SCK \ SAM_PINMUX(b, 13, c, periph) /* pb13x_dacc_dac0 */ #define PB13X_DACC_DAC0 \ SAM_PINMUX(b, 13, x, extra) /* pb14_gpio */ #define PB14_GPIO \ SAM_PINMUX(b, 14, gpio, gpio) /* pb14a_spi_npcs1 */ #define PB14A_SPI_NPCS1 \ SAM_PINMUX(b, 14, a, periph) /* pb14b_pwm_pwmh3 */ #define PB14B_PWM_PWMH3 \ SAM_PINMUX(b, 14, b, periph) /* pb14x_dacc_dac1 */ #define PB14X_DACC_DAC1 \ SAM_PINMUX(b, 14, x, extra) /* pc0_gpio */ #define PC0_GPIO \ SAM_PINMUX(c, 0, gpio, gpio) /* pc0b_pwm_pwml0 */ #define PC0B_PWM_PWML0 \ SAM_PINMUX(c, 0, b, periph) /* pc0x_afec0_ad14 */ #define PC0X_AFEC0_AD14 \ SAM_PINMUX(c, 0, x, extra) /* pc1_gpio */ #define PC1_GPIO \ SAM_PINMUX(c, 1, gpio, gpio) /* pc1b_pwm_pwml1 */ #define PC1B_PWM_PWML1 \ SAM_PINMUX(c, 1, b, periph) /* pc1x_afec1_ad4 */ #define PC1X_AFEC1_AD4 \ SAM_PINMUX(c, 1, x, extra) /* pc2_gpio */ #define PC2_GPIO \ SAM_PINMUX(c, 2, gpio, gpio) /* pc2b_pwm_pwml2 */ #define PC2B_PWM_PWML2 \ SAM_PINMUX(c, 2, b, periph) /* pc2x_afec1_ad5 */ #define PC2X_AFEC1_AD5 \ SAM_PINMUX(c, 2, x, extra) /* pc3_gpio */ #define PC3_GPIO \ SAM_PINMUX(c, 3, gpio, gpio) /* pc3b_pwm_pwml3 */ #define PC3B_PWM_PWML3 \ SAM_PINMUX(c, 3, b, periph) /* pc3x_afec1_ad6 */ #define PC3X_AFEC1_AD6 \ SAM_PINMUX(c, 3, x, extra) /* pc4_gpio */ #define PC4_GPIO \ SAM_PINMUX(c, 4, gpio, gpio) /* pc4b_spi_npcs1 */ #define PC4B_SPI_NPCS1 \ SAM_PINMUX(c, 4, b, periph) /* pc4x_afec1_ad7 */ #define PC4X_AFEC1_AD7 \ SAM_PINMUX(c, 4, x, extra) /* pc5_gpio */ #define PC5_GPIO \ SAM_PINMUX(c, 5, gpio, gpio) /* pc5b_tc2_tioa6 */ #define PC5B_TC2_TIOA6 \ SAM_PINMUX(c, 5, b, periph) /* pc6_gpio */ #define PC6_GPIO \ SAM_PINMUX(c, 6, gpio, gpio) /* pc6b_tc2_tiob6 */ #define PC6B_TC2_TIOB6 \ SAM_PINMUX(c, 6, b, periph) /* pc7_gpio */ #define PC7_GPIO \ SAM_PINMUX(c, 7, gpio, gpio) /* pc7b_tc2_tclk6 */ #define PC7B_TC2_TCLK6 \ SAM_PINMUX(c, 7, b, periph) /* pc8_gpio */ #define PC8_GPIO \ SAM_PINMUX(c, 8, gpio, gpio) /* pc8b_tc2_tioa7 */ #define PC8B_TC2_TIOA7 \ SAM_PINMUX(c, 8, b, periph) /* pc9_gpio */ #define PC9_GPIO \ SAM_PINMUX(c, 9, gpio, gpio) /* pc9b_tc2_tiob7 */ #define PC9B_TC2_TIOB7 \ SAM_PINMUX(c, 9, b, periph) /* pc10_gpio */ #define PC10_GPIO \ SAM_PINMUX(c, 10, gpio, gpio) /* pc10b_tc2_tclk7 */ #define PC10B_TC2_TCLK7 \ SAM_PINMUX(c, 10, b, periph) /* pc11_gpio */ #define PC11_GPIO \ SAM_PINMUX(c, 11, gpio, gpio) /* pc11b_tc2_tioa8 */ #define PC11B_TC2_TIOA8 \ SAM_PINMUX(c, 11, b, periph) /* pc12_gpio */ #define PC12_GPIO \ SAM_PINMUX(c, 12, gpio, gpio) /* pc12b_tc2_tiob8 */ #define PC12B_TC2_TIOB8 \ SAM_PINMUX(c, 12, b, periph) /* pc12c_can1_rx */ #define PC12C_CAN1_RX \ SAM_PINMUX(c, 12, c, periph) /* pc12x_afec0_ad8 */ #define PC12X_AFEC0_AD8 \ SAM_PINMUX(c, 12, x, extra) /* pc13_gpio */ #define PC13_GPIO \ SAM_PINMUX(c, 13, gpio, gpio) /* pc13b_pwm_pwml0 */ #define PC13B_PWM_PWML0 \ SAM_PINMUX(c, 13, b, periph) /* pc13x_afec0_ad6 */ #define PC13X_AFEC0_AD6 \ SAM_PINMUX(c, 13, x, extra) /* pc14_gpio */ #define PC14_GPIO \ SAM_PINMUX(c, 14, gpio, gpio) /* pc14b_tc2_tclk8 */ #define PC14B_TC2_TCLK8 \ SAM_PINMUX(c, 14, b, periph) /* pc15_gpio */ #define PC15_GPIO \ SAM_PINMUX(c, 15, gpio, gpio) /* pc15b_pwm_pwml1 */ #define PC15B_PWM_PWML1 \ SAM_PINMUX(c, 15, b, periph) /* pc15c_can1_tx */ #define PC15C_CAN1_TX \ SAM_PINMUX(c, 15, c, periph) /* pc15x_afec0_ad7 */ #define PC15X_AFEC0_AD7 \ SAM_PINMUX(c, 15, x, extra) /* pc16_gpio */ #define PC16_GPIO \ SAM_PINMUX(c, 16, gpio, gpio) /* pc17_gpio */ #define PC17_GPIO \ SAM_PINMUX(c, 17, gpio, gpio) /* pc18_gpio */ #define PC18_GPIO \ SAM_PINMUX(c, 18, gpio, gpio) /* pc18b_pwm_pwmh0 */ #define PC18B_PWM_PWMH0 \ SAM_PINMUX(c, 18, b, periph) /* pc19_gpio */ #define PC19_GPIO \ SAM_PINMUX(c, 19, gpio, gpio) /* pc19b_pwm_pwmh1 */ #define PC19B_PWM_PWMH1 \ SAM_PINMUX(c, 19, b, periph) /* pc20_gpio */ #define PC20_GPIO \ SAM_PINMUX(c, 20, gpio, gpio) /* pc20b_pwm_pwmh2 */ #define PC20B_PWM_PWMH2 \ SAM_PINMUX(c, 20, b, periph) /* pc21_gpio */ #define PC21_GPIO \ SAM_PINMUX(c, 21, gpio, gpio) /* pc21b_pwm_pwmh3 */ #define PC21B_PWM_PWMH3 \ SAM_PINMUX(c, 21, b, periph) /* pc22_gpio */ #define PC22_GPIO \ SAM_PINMUX(c, 22, gpio, gpio) /* pc22b_pwm_pwml3 */ #define PC22B_PWM_PWML3 \ SAM_PINMUX(c, 22, b, periph) /* pc23_gpio */ #define PC23_GPIO \ SAM_PINMUX(c, 23, gpio, gpio) /* pc23b_tc1_tioa3 */ #define PC23B_TC1_TIOA3 \ SAM_PINMUX(c, 23, b, periph) /* pc24_gpio */ #define PC24_GPIO \ SAM_PINMUX(c, 24, gpio, gpio) /* pc24b_tc1_tiob3 */ #define PC24B_TC1_TIOB3 \ SAM_PINMUX(c, 24, b, periph) /* pc25_gpio */ #define PC25_GPIO \ SAM_PINMUX(c, 25, gpio, gpio) /* pc25b_tc1_tclk3 */ #define PC25B_TC1_TCLK3 \ SAM_PINMUX(c, 25, b, periph) /* pc26_gpio */ #define PC26_GPIO \ SAM_PINMUX(c, 26, gpio, gpio) /* pc26b_tc1_tioa4 */ #define PC26B_TC1_TIOA4 \ SAM_PINMUX(c, 26, b, periph) /* pc26x_afec0_ad12 */ #define PC26X_AFEC0_AD12 \ SAM_PINMUX(c, 26, x, extra) /* pc27_gpio */ #define PC27_GPIO \ SAM_PINMUX(c, 27, gpio, gpio) /* pc27b_tc1_tiob4 */ #define PC27B_TC1_TIOB4 \ SAM_PINMUX(c, 27, b, periph) /* pc27x_afec0_ad13 */ #define PC27X_AFEC0_AD13 \ SAM_PINMUX(c, 27, x, extra) /* pc28_gpio */ #define PC28_GPIO \ SAM_PINMUX(c, 28, gpio, gpio) /* pc28b_tc1_tclk4 */ #define PC28B_TC1_TCLK4 \ SAM_PINMUX(c, 28, b, periph) /* pc29_gpio */ #define PC29_GPIO \ SAM_PINMUX(c, 29, gpio, gpio) /* pc29b_tc1_tioa5 */ #define PC29B_TC1_TIOA5 \ SAM_PINMUX(c, 29, b, periph) /* pc29x_afec0_ad9 */ #define PC29X_AFEC0_AD9 \ SAM_PINMUX(c, 29, x, extra) /* pc30_gpio */ #define PC30_GPIO \ SAM_PINMUX(c, 30, gpio, gpio) /* pc30b_tc1_tiob5 */ #define PC30B_TC1_TIOB5 \ SAM_PINMUX(c, 30, b, periph) /* pc30x_afec0_ad10 */ #define PC30X_AFEC0_AD10 \ SAM_PINMUX(c, 30, x, extra) /* pc31_gpio */ #define PC31_GPIO \ SAM_PINMUX(c, 31, gpio, gpio) /* pc31b_tc1_tclk5 */ #define PC31B_TC1_TCLK5 \ SAM_PINMUX(c, 31, b, periph) /* pc31x_afec0_ad11 */ #define PC31X_AFEC0_AD11 \ SAM_PINMUX(c, 31, x, extra) /* pd0_gpio */ #define PD0_GPIO \ SAM_PINMUX(d, 0, gpio, gpio) /* pd0a_gmac_gtxck */ #define PD0A_GMAC_GTXCK \ SAM_PINMUX(d, 0, a, periph) /* pd1_gpio */ #define PD1_GPIO \ SAM_PINMUX(d, 1, gpio, gpio) /* pd1a_gmac_gtxen */ #define PD1A_GMAC_GTXEN \ SAM_PINMUX(d, 1, a, periph) /* pd2_gpio */ #define PD2_GPIO \ SAM_PINMUX(d, 2, gpio, gpio) /* pd2a_gmac_gtx0 */ #define PD2A_GMAC_GTX0 \ SAM_PINMUX(d, 2, a, periph) /* pd3_gpio */ #define PD3_GPIO \ SAM_PINMUX(d, 3, gpio, gpio) /* pd3a_gmac_gtx1 */ #define PD3A_GMAC_GTX1 \ SAM_PINMUX(d, 3, a, periph) /* pd4_gpio */ #define PD4_GPIO \ SAM_PINMUX(d, 4, gpio, gpio) /* pd4a_gmac_grxdv */ #define PD4A_GMAC_GRXDV \ SAM_PINMUX(d, 4, a, periph) /* pd5_gpio */ #define PD5_GPIO \ SAM_PINMUX(d, 5, gpio, gpio) /* pd5a_gmac_grx0 */ #define PD5A_GMAC_GRX0 \ SAM_PINMUX(d, 5, a, periph) /* pd6_gpio */ #define PD6_GPIO \ SAM_PINMUX(d, 6, gpio, gpio) /* pd6a_gmac_grx1 */ #define PD6A_GMAC_GRX1 \ SAM_PINMUX(d, 6, a, periph) /* pd7_gpio */ #define PD7_GPIO \ SAM_PINMUX(d, 7, gpio, gpio) /* pd7a_gmac_grxer */ #define PD7A_GMAC_GRXER \ SAM_PINMUX(d, 7, a, periph) /* pd8_gpio */ #define PD8_GPIO \ SAM_PINMUX(d, 8, gpio, gpio) /* pd8a_gmac_gmdc */ #define PD8A_GMAC_GMDC \ SAM_PINMUX(d, 8, a, periph) /* pd9_gpio */ #define PD9_GPIO \ SAM_PINMUX(d, 9, gpio, gpio) /* pd9a_gmac_gmdio */ #define PD9A_GMAC_GMDIO \ SAM_PINMUX(d, 9, a, periph) /* pd10_gpio */ #define PD10_GPIO \ SAM_PINMUX(d, 10, gpio, gpio) /* pd10a_gmac_gcrs */ #define PD10A_GMAC_GCRS \ SAM_PINMUX(d, 10, a, periph) /* pd11_gpio */ #define PD11_GPIO \ SAM_PINMUX(d, 11, gpio, gpio) /* pd11a_gmac_grx2 */ #define PD11A_GMAC_GRX2 \ SAM_PINMUX(d, 11, a, periph) /* pd12_gpio */ #define PD12_GPIO \ SAM_PINMUX(d, 12, gpio, gpio) /* pd12a_gmac_grx3 */ #define PD12A_GMAC_GRX3 \ SAM_PINMUX(d, 12, a, periph) /* pd13_gpio */ #define PD13_GPIO \ SAM_PINMUX(d, 13, gpio, gpio) /* pd13a_gmac_gcol */ #define PD13A_GMAC_GCOL \ SAM_PINMUX(d, 13, a, periph) /* pd14_gpio */ #define PD14_GPIO \ SAM_PINMUX(d, 14, gpio, gpio) /* pd14a_gmac_grxck */ #define PD14A_GMAC_GRXCK \ SAM_PINMUX(d, 14, a, periph) /* pd15_gpio */ #define PD15_GPIO \ SAM_PINMUX(d, 15, gpio, gpio) /* pd15a_gmac_gtx2 */ #define PD15A_GMAC_GTX2 \ SAM_PINMUX(d, 15, a, periph) /* pd16_gpio */ #define PD16_GPIO \ SAM_PINMUX(d, 16, gpio, gpio) /* pd16a_gmac_gtx3 */ #define PD16A_GMAC_GTX3 \ SAM_PINMUX(d, 16, a, periph) /* pd17_gpio */ #define PD17_GPIO \ SAM_PINMUX(d, 17, gpio, gpio) /* pd17a_gmac_gtxer */ #define PD17A_GMAC_GTXER \ SAM_PINMUX(d, 17, a, periph) /* pd18_gpio */ #define PD18_GPIO \ SAM_PINMUX(d, 18, gpio, gpio) /* pd19_gpio */ #define PD19_GPIO \ SAM_PINMUX(d, 19, gpio, gpio) /* pd20_gpio */ #define PD20_GPIO \ SAM_PINMUX(d, 20, gpio, gpio) /* pd20a_pwm_pwmh0 */ #define PD20A_PWM_PWMH0 \ SAM_PINMUX(d, 20, a, periph) /* pd21_gpio */ #define PD21_GPIO \ SAM_PINMUX(d, 21, gpio, gpio) /* pd21a_pwm_pwmh1 */ #define PD21A_PWM_PWMH1 \ SAM_PINMUX(d, 21, a, periph) /* pd22_gpio */ #define PD22_GPIO \ SAM_PINMUX(d, 22, gpio, gpio) /* pd22a_pwm_pwmh2 */ #define PD22A_PWM_PWMH2 \ SAM_PINMUX(d, 22, a, periph) /* pd23_gpio */ #define PD23_GPIO \ SAM_PINMUX(d, 23, gpio, gpio) /* pd23a_pwm_pwmh3 */ #define PD23A_PWM_PWMH3 \ SAM_PINMUX(d, 23, a, periph) /* pd24_gpio */ #define PD24_GPIO \ SAM_PINMUX(d, 24, gpio, gpio) /* pd24a_pwm_pwml0 */ #define PD24A_PWM_PWML0 \ SAM_PINMUX(d, 24, a, periph) /* pd25_gpio */ #define PD25_GPIO \ SAM_PINMUX(d, 25, gpio, gpio) /* pd25a_pwm_pwml1 */ #define PD25A_PWM_PWML1 \ SAM_PINMUX(d, 25, a, periph) /* pd26_gpio */ #define PD26_GPIO \ SAM_PINMUX(d, 26, gpio, gpio) /* pd26a_pwm_pwml2 */ #define PD26A_PWM_PWML2 \ SAM_PINMUX(d, 26, a, periph) /* pd27_gpio */ #define PD27_GPIO \ SAM_PINMUX(d, 27, gpio, gpio) /* pd27a_pwm_pwml3 */ #define PD27A_PWM_PWML3 \ SAM_PINMUX(d, 27, a, periph) /* pd28_gpio */ #define PD28_GPIO \ SAM_PINMUX(d, 28, gpio, gpio) /* pd29_gpio */ #define PD29_GPIO \ SAM_PINMUX(d, 29, gpio, gpio) /* pd30_gpio */ #define PD30_GPIO \ SAM_PINMUX(d, 30, gpio, gpio) /* pd31_gpio */ #define PD31_GPIO \ SAM_PINMUX(d, 31, gpio, gpio)