MCR Miscellaneous Control Registers. 0x40106000 0 0x400 registers RST Reset control register 0. 0x04 0 lptmr0 Setting this bit will reset LPTMR0. 0 1 rst Reset LPTMR0. 1 lptmr1 Setting this bit will reset LPTMR1. 1 1 rst Reset LPTMR1. 1 lpuart0 Setting this bit will reset LPUART0. 2 1 rst Reset LPUART0. 1 rtc Setting this bit will reset the Real-Time Clock. 3 1 rst Reset Real-Time Clock. 1 LPPIOCTRL Low-power peripheral IO control. 0x10 0 LPTMR0_I Setting this bit will enable the low-power timer 0 (timer 4) input pin while operating in low-power modes. 0 1 dis Disable LPTMR0 input pin. 0 en Enable LPTMR0 input pin. 1 LPTMR0_O Setting this bit will enable the low-power timer 0 (timer 4) output pin while operating in low-power modes. 1 1 dis Disable LPTMR0 output pin. 0 en Enable LPTMR0 output pin. 1 LPTMR1_I Setting this bit will enable the low-power timer 1 (timer 5) input pin while operating in low-power modes. 2 1 dis Disable LPTMR1 input pin. 0 en Enable LPTMR1 input pin. 1 LPTMR1_O Setting this bit will enable the low-power timer 1 (timer 5) output pin while operating in low-power modes. 3 1 dis Disable LPTMR1 output pin. 0 en Enable LPTMR1 output pin. 1 LPUART0_RX Setting this bit will enable the low-power UART 0 (UART3) RX pin while operating in low-power modes. 4 1 dis Disable LPUART0 RX pin. 0 en Enable LPUART0 RX pin. 1 LPUART0_TX Setting this bit will enable the low-power UART 0 (UART3) TX pin while operating in low-power modes. 5 1 dis Disable LPUART0 TX pin. 0 en Enable LPUART0 TX pin. 1 LPUART0_CTS Setting this bit will enable the low-power UART 0 (UART3) CTS pin while operating in low-power modes. 6 1 dis Disable LPUART0 CTS pin. 0 en Enable LPUART0 CTS pin. 1 LPUART0_RTS Setting this bit will enable the low-power UART 0 (UART3) RTS pin while operating in low-power modes. 7 1 dis Disable LPUART0 RTS pin. 0 en Enable LPUART0 RTS pin. 1 CLKDIS Peripheral clock control register. 0x24 0xFFFFFFFF lptmr0 Clearing this bit will enable the low-power timer 0 (timer 4) peripheral clock. 0 1 en Enable LPTMR0 clock. 0 dis Disable LPTMR0 clock. 1 lptmr1 Clearing this bit will enable the low-power timer 1 (timer 5) peripheral clock. 1 1 en Enable LPTMR1 clock. 0 dis Disable LPTMR1 clock. 1 lpuart0 Clearing this bit will enable the low-power UART 0 (UART3) peripheral clock. 2 1 en Enable LPUART0 clock. 0 dis Disable LPUART0 clock. 1