OWM 1-Wire Master Interface. 0x4003D000 32 read-write 0 0x1000 registers OneWire 67 CFG 1-Wire Master Configuration. 0x0000 read-write long_line_mode Long Line Mode. [0:0] read-write force_pres_det Force Line During Presence Detect. [1:1] read-write bit_bang_en Bit Bang Enable. [2:2] read-write ext_pullup_mode Provide an extra output control to control an external pullup. [3:3] read-write ext_pullup_enable Enable External Pullup. [4:4] read-write single_bit_mode Enable Single Bit TX/RX Mode. [5:5] read-write overdrive Enables overdrive speed for 1-Wire operations. [6:6] read-write int_pullup_enable Enable intenral pullup. [7:7] read-write CLK_DIV_1US 1-Wire Master Clock Divisor. 0x0004 read-write DIVISOR Clock Divisor for 1Mhz. [7:0] read-write CTRL_STAT 1-Wire Master Control/Status. 0x0008 read-write start_ow_reset Start OW Reset. [0:0] read-write sra_mode SRA Mode. [1:1] read-write bit_bang_oe Bit Bang Output Enable. [2:2] read-write ow_input OW Input State. [3:3] read-only od_spec_mode Overdrive Spec Mode. [4:4] read-only presence_detect Presence Pulse Detected. [7:7] read-only DATA 1-Wire Master Data Buffer. 0x000C read-write tx_rx TX/RX Buffer. [7:0] read-write INTFL 1-Wire Master Interrupt Flags. 0x0010 read-write ow_reset_done OW Reset Sequence Completed. [0:0] read-write tx_data_empty TX Data Empty Interrupt Flag. [1:1] read-write rx_data_ready RX Data Ready Interrupt Flag [2:2] read-write line_short OW Line Short Detected Interrupt Flag. [3:3] read-write line_low OW Line Low Detected Interrupt Flag. [4:4] read-write INTEN 1-Wire Master Interrupt Enables. 0x0014 read-write ow_reset_done OW Reset Sequence Completed. [0:0] read-write oneToClear tx_data_empty Tx Data Empty Interrupt Enable. [1:1] read-write oneToClear rx_data_ready Rx Data Ready Interrupt Enable. [2:2] read-write oneToClear line_short OW Line Short Detected Interrupt Enable. [3:3] read-write oneToClear line_low OW Line Low Detected Interrupt Enable. [4:4] read-write oneToClear