CAMERAIF Parallel Camera Interface. 0x4000E000 32 read-write 0 0x1000 registers CameraIF 91 VER Hardware Version. 0x0000 read-write minor Minor Version Number. [7:0] read-write major Major Version Number. [15:8] read-write FIFO_SIZE FIFO Depth. 0x0004 read-write fifo_size FIFO size. [7:0] read-write CTRL Control Register. 0x0008 read-write READ_MODE Read Mode. 0 2 read-write dis Camera Interface Disabled. 0 single_img Single Image Capture. 1 continuous Continuous Image Capture. 2 DATA_WIDTH Data Width. 2 2 read-write 8bit 8 bit. 0 10bit 10 bit. 1 12bit 12 bit. 2 DS_TIMING_EN DS Timing Enable. 4 1 read-write dis Timing from VSYNC and HSYNC. 0 en Timing embedded in data using SAV and EAV codes. 1 FIFO_THRSH Data FIFO Threshold. 5 5 read-write RX_DMA DMA Enable. 10 1 read-write dis DMA disabled. 0 en DMA enabled. 1 RX_DMA_THRSH DMA Threshold. 11 4 read-write PCIF_SYS PCIF Control. 15 1 read-write dis PCIF disabled. 0 en PCIF enabled. 1 INT_EN Interupt Enable Register. 0x000C read-write IMG_DONE Image Done. 0 1 read-write FIFO_FULL FIFO Full. 1 1 read-write FIFO_THRESH FIFO Threshold Level Met. 2 1 read-write FIFO_NOT_EMPTY FIFO Not Empty. 3 1 read-write INT_FL Interupt Flag Register. 0x0010 read-write IMG_DONE Image Done. 0 1 read-write FIFO_FULL FIFO Full. 1 1 read-write FIFO_THRESH FIFO Threshold Level Met. 2 1 read-write FIFO_NOT_EMPTY FIFO Not Empty. 3 1 read-write DS_TIMING_CODES DS Timing Code Register. 0x0014 read-write SAV Start Active Video Code. [7:0] read-write EAV End Active Video Code. [15:8] read-write FIFO_DATA FIFO DATA Register. 0x0030 read-write DATA Data from FIFO to be read by DMA. [31:0] read-write