CAMERAIF CameraIF Interface. 0x4000E000 32 read-write 0 0x1000 registers CameraIF 91 VER CameraIF Version 0x0000 read-write minor Minor version number [7:0] read-write major Major version number [15:8] read-write FIFO_SIZE 1-Wire Master Clock Divisor. 0x0004 read-write fifo_size Fifo Size. [7:0] read-write CTRL Control register 0x0008 read-write READ_MODE Read Mode 0 2 read-write dis Camera interface disabled 0 single_img single image captured 1 continuous Continuous image captured 2 DATA_WIDTH Data Width 2 2 read-write 8bit 8 bit 0 10bit 10 bit 1 12bit 12 bit 2 DS_TIMING_EN Ds timing enabled 4 1 read-write dis timing from VSYNC,HSYNC 0 en timing embedded in data using SAV EAV codes. 1 FIFO_THRSH Data FIFO threshold Setting 5 5 read-write RX_DMA DMA mode enabled 10 1 read-write dis DMA mode disabled. 0 en DMA mode enabled. 1 RX_DMA_THRSH DMA mode threshold Level 11 4 read-write PCIF_SYS PCIF control 15 1 read-write dis PCIF disabled. 0 en PCIF enabled. 1 INT_EN Interupt Enable register 0x000C read-write IMG_DONE Image done 0 1 read-write FIFO_FULL FIFO Full 1 1 read-write FIFO_THRESH FIFO Threshold Level Met 2 1 read-write FIFO_NOT_EMPTY FIFO Threshold Level Met 3 1 read-write INT_FL Interupt Flags register 0x0010 read-write IMG_DONE Image done 0 1 read-write FIFO_FULL FIFO Full 1 1 read-write FIFO_THRESH FIFO Threshold Level Met 2 1 read-write FIFO_NOT_EMPTY FIFO Threshold Level Met 3 1 read-write DS_TIMING_CODES DS Timing Codes register 0x0014 read-write SAV Start active video code [7:0] read-write EAV End active video code [15:8] read-write FIFO_DATA FIFO DATA register 0x0030 read-write FIFO_DATA Data From the fifo to be read by the dma. [31:0] read-write