/** * @file adc.h * @brief Analog to Digital Converter(ADC) function prototypes and data types. */ /****************************************************************************** * * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by * Analog Devices, Inc.), * Copyright (C) 2023-2024 Analog Devices, Inc. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * ******************************************************************************/ /* Define to prevent redundant inclusion */ #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32662_ADC_H_ #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32662_ADC_H_ /* **** Includes **** */ #include #include "adc_regs.h" #include "mcr_regs.h" #ifdef __cplusplus extern "C" { #endif /** * @defgroup adc ADC * @ingroup periphlibs * @details API for Analog to Digital Converter (ADC). * @{ */ /* MAX32662 Specific */ #define MAX_ADC_SLOT_NUM 29 #define MAX_ADC_FIFO_LEN 16 #define MAX_ADC_RES_DIV_CH 12 /*************************************************************************************************************** DATA STRUCTURES FOR ADC INITIALIZATION ***************************************************************************************************************/ /** * @brief Enumeration type for the ADC Input Channels * */ typedef enum { MXC_ADC_CH_0, ///< Select Channel 0 MXC_ADC_CH_1, ///< Select Channel 1 MXC_ADC_CH_2, ///< Select Channel 2 MXC_ADC_CH_3, ///< Select Channel 3 MXC_ADC_CH_VDDA_DIV2 = 12, ///< Select Channel 12 MXC_ADC_CH_VCOREA = 14, ///< Select Channel 14 MXC_ADC_CH_VSS = 15, ///< Select Channel 15 } mxc_adc_chsel_t; /** * @brief Enumeration type for the number of samples to average * */ typedef enum { MXC_ADC_AVG_1 = MXC_S_ADC_CTRL1_AVG_AVG1, ///< Select Channel 0 MXC_ADC_AVG_2 = MXC_S_ADC_CTRL1_AVG_AVG2, ///< Select Channel 1 MXC_ADC_AVG_4 = MXC_S_ADC_CTRL1_AVG_AVG4, ///< Select Channel 2 MXC_ADC_AVG_8 = MXC_S_ADC_CTRL1_AVG_AVG8, ///< Select Channel 3 MXC_ADC_AVG_16 = MXC_S_ADC_CTRL1_AVG_AVG16, ///< Select Channel 4 MXC_ADC_AVG_32 = MXC_S_ADC_CTRL1_AVG_AVG32, ///< Select Channel 5 } mxc_adc_avg_t; /** * @brief Enumeration type for ADC clock divider */ typedef enum { MXC_ADC_CLKDIV_2, ///< ADC Scale by 1/2 MXC_ADC_CLKDIV_4, ///< ADC Scale by 1/4 MXC_ADC_CLKDIV_8, ///< ADC Scale by 1/8 MXC_ADC_CLKDIV_16, ///< ADC Scale by 1/16 MXC_ADC_CLKDIV_1, ///< ADC Scale by 1x (no scaling) } mxc_adc_clkdiv_t; /** * @brief Clock settings */ typedef enum { MXC_ADC_HCLK, ///< HCLK CLock MXC_ADC_CLK_ADC0, ///< HF EXT Clock MXC_ADC_CLK_ADC1, ///< IBRO Clock MXC_ADC_CLK_ADC2, ///< ERFO Clock } mxc_adc_clock_t; /** * @brief Calibration settings */ typedef enum { MXC_ADC_SKIP_CAL, ///< HCLK CLock MXC_ADC_EN_CAL, ///< ADC0 Clock } mxc_adc_calibration_t; /** * @brief trigger mode settings */ typedef enum { MXC_ADC_TRIG_SOFTWARE, ///< Software Trigger MXC_ADC_TRIG_HARDWARE, ///< Hardware Trigger } mxc_adc_trig_mode_t; /** * @brief Hardware trigger select options */ typedef enum { MXC_ADC_TRIG_SEL_TMR0, ///< Timer 0 Out Rising edge MXC_ADC_TRIG_SEL_TMR1, ///< Timer 1 Out Rising Edge MXC_ADC_TRIG_SEL_TMR2, ///< Timer 2 Out Rising Edge MXC_ADC_TRIG_SEL_TMR3, ///< Timer 3 Out Rising Edge MXC_ADC_TRIG_SEL_P0_9, ///< GPIO P0.9, AF4 MXC_ADC_TRIG_SEL_P0_0, ///< GPIO P0.0, AF5 } mxc_adc_trig_sel_t; /** * @brief trigger mode settings */ typedef enum { MXC_ADC_ATOMIC_CONV, ///< Software Trigger MXC_ADC_CONTINUOUS_CONV, ///< Hardware Trigger } mxc_adc_conversion_mode_t; /** * @brief Reference voltage select type. */ typedef enum { MXC_ADC_REF_EXT, ///< Use external reference voltage source MXC_ADC_REF_INT_1V25, ///< Use internal 1.25V source MXC_ADC_REF_INT_2V048, ///< Use internal 2.048V souce } mxc_adc_refsel_t; /** * @brief Divide by 2 control in low power mode */ typedef enum { MXC_ADC_DIV_2_5K_50K_ENABLE, ///< 2.5K and 50K divide by 2 enable in lpmode MXC_ADC_DIV_2_5K_DISABLE, ///< 2.5K disable and 50K divide by 2 enable in lpmode MXC_ADC_DIV_50K_DISABLE, ///< 2.5K enable and 50K divide by 2 disable in lpmode MXC_ADC_DIV_2_5K_50K_DISABLE, ///< 2.5K and 50K divide by 2 disable in lpmode } mxc_adc_div_lpmode_t; /** TODO * @brief Data FIFO data format */ typedef enum { MXC_ADC_DATA_STATUS, ///< Data(12-bit) plus Status MXC_ADC_DATA, ///< Data(12-bit) only MXC_ADC_RAW_DATA, ///< 18-bit raw data } mxc_adc_fifodataformat_t; ///< Callback used when a conversion event is complete typedef void (*mxc_adc_complete_cb_t)(void *req, int error); /** * @brief ADC Settings */ typedef struct { mxc_adc_clock_t clock; ///< clock to use mxc_adc_clkdiv_t clkdiv; ///< clock divider mxc_adc_calibration_t cal; ///< skip calibration mxc_adc_refsel_t ref; ///< ADC reference voltage uint32_t trackCount; ///< Sample Clock High time uint32_t idleCount; ///< Sample Clock Low time } mxc_adc_req_t; /** * @brief ADC Slot Settings */ typedef struct { mxc_adc_chsel_t channel; ///< channel select } mxc_adc_slot_req_t; /** * @brief ADC Conversion Settings */ typedef struct { mxc_adc_conversion_mode_t mode; ///< conversion mode mxc_adc_trig_mode_t trig; ///< trigger mode mxc_adc_trig_sel_t hwTrig; ///< HW Trigger Source mxc_adc_fifodataformat_t fifo_format; ///< FIFO Data Format uint8_t fifo_threshold; ///< FIFO Threshold Configuration mxc_adc_avg_t avg_number; ///< no of samples to average mxc_adc_div_lpmode_t lpmode_divder; ///< Divide by 2 control in lpmode uint8_t num_slots; ///< num of slots in the sequence int8_t dma_channel; ///