# Host Command backend configs

# Copyright (c) 2020 Google LLC
# SPDX-License-Identifier: Apache-2.0

DT_CHOSEN_ESPI_BACKEND := zephyr,host-cmd-espi-backend
DT_CHOSEN_SHI_BACKEND := zephyr,host-cmd-shi-backend
DT_CHOSEN_UART_BACKEND := zephyr,host-cmd-uart-backend
DT_CHOSEN_SPI_BACKEND := zephyr,host-cmd-spi-backend

config EC_HOST_CMD_BACKEND_SIMULATOR
	bool "Embedded Controller Host Command Backend Simulator"
	depends on SOC_POSIX
	help
	  Enable the EC host command simulator.

config EC_HOST_CMD_BACKEND_ESPI
	bool "Host commands support using eSPI bus"
	default $(dt_chosen_enabled,$(DT_CHOSEN_ESPI_BACKEND))
	depends on ESPI_PERIPHERAL_EC_HOST_CMD
	depends on ESPI_PERIPHERAL_CUSTOM_OPCODE
	help
	  Enable support for Embedded Controller host commands using
	  the eSPI bus.

config EC_HOST_CMD_BACKEND_SHI
	bool "Host commands support using SHI"
	default $(dt_chosen_enabled,$(DT_CHOSEN_SHI_BACKEND))
	help
	  Enable support for Embedded Controller host commands using
	  the Serial Host Interface.

config EC_HOST_CMD_BACKEND_UART
	bool "Host commands support using UART"
	default $(dt_chosen_enabled,$(DT_CHOSEN_UART_BACKEND))
	depends on UART_ASYNC_API
	help
	  Enable support for Embedded Controller host commands using
	  the UART.

config EC_HOST_CMD_BACKEND_SPI
	bool "Host commands support using SPI"
	help
	  Enable support for Embedded Controller host commands using
	  the SPI.

if EC_HOST_CMD_BACKEND_SHI

choice EC_HOST_CMD_BACKEND_SHI_DRIVER
	prompt "SHI driver"
	default EC_HOST_CMD_BACKEND_SHI_NPCX if SOC_FAMILY_NPCX
	default EC_HOST_CMD_BACKEND_SHI_ITE if SOC_IT8XXX2

config EC_HOST_CMD_BACKEND_SHI_NPCX
	bool "SHI by Nuvoton"
	depends on DT_HAS_NUVOTON_NPCX_SHI_ENABLED || \
		   DT_HAS_NUVOTON_NPCX_SHI_ENHANCED_ENABLED
	select PINCTRL
	help
	  This option enables the driver for SHI backend in the
	  Nuvoton NPCX chip.

config EC_HOST_CMD_BACKEND_SHI_ITE
	bool "SHI by ITE"
	depends on DT_HAS_ITE_IT8XXX2_SHI_ENABLED
	select PINCTRL
	help
	  This option enables the driver for SHI backend in the
	  ITE IT8xxx2 chips family.

endchoice

config EC_HOST_CMD_BACKEND_SHI_NPCX_ENHANCED_BUF_MODE
	def_bool DT_HAS_NUVOTON_NPCX_SHI_ENHANCED_ENABLED
	help
	  In this mode, besides the original 128-bytes FIFO, an additional
	  single-byte output buffer can be selected/switched to generate a
	  response to simultaneous Read/Write transactions.

config EC_HOST_CMD_BACKEND_SHI_NPCX_CS_DETECT_WORKAROUND
	bool
	default y if SOC_NPCX9M7FB
	help
	  Workaround the issue "CSnFE and CSnRE bits of EVSTATS2 Register (SHI)"
	  in the npcx9m7fb SoC errata.

config EC_HOST_CMD_BACKEND_SHI_MAX_REQUEST
	int "Max data size for the version 3 request packet"
	default 544 if EC_HOST_CMD_BACKEND_SHI_NPCX
	default 256 if EC_HOST_CMD_BACKEND_SHI_ITE
	help
	  This option indicates maximum data size for a version 3 request
	  packet. This must be big enough to handle the biggest possible
	  request.

config EC_HOST_CMD_BACKEND_SHI_MAX_RESPONSE
	int "Max data size for the version 3 response packet"
	default 544 if EC_HOST_CMD_BACKEND_SHI_NPCX
	default 248 if EC_HOST_CMD_BACKEND_SHI_ITE
	help
	  This option indicates maximum data size for a version 3 response
	  packet. This must be big enough to handle the biggest possible
	  response.

endif # EC_HOST_CMD_BACKEND_SHI

if EC_HOST_CMD_BACKEND_SPI

choice EC_HOST_CMD_BACKEND_SPI_DRIVER
	prompt "SHI driver"
	default EC_HOST_CMD_BACKEND_SPI_STM32 if DT_HAS_ST_STM32_SPI_HOST_CMD_ENABLED

config EC_HOST_CMD_BACKEND_SPI_STM32
	bool "SPI by STM32"
	select PINCTRL
	help
	  This option enables the driver for SPI backend in the
	  STM32 chip family.

endchoice

endif # EC_HOST_CMD_BACKEND_SPI