# Copyright 2024-2025 NXP
# SPDX-License-Identifier: Apache-2.0

if SOC_MIMXRT798S_CM33_CPU0

config ROM_START_OFFSET
	default 0x4000 if NXP_IMXRT_BOOT_HEADER

config NUM_IRQS
	default 158

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default 237500000 if CORTEX_M_SYSTICK
	default 1000000 if MCUX_OS_TIMER

choice CACHE_TYPE
	default EXTERNAL_CACHE
endchoice

endif # SOC_MIMXRT798S_CM33_CPU0

if SOC_MIMXRT798S_CM33_CPU1

config NUM_IRQS
	default 93

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default 100000000 if CORTEX_M_SYSTICK
	default 1000000 if MCUX_OS_TIMER

endif # SOC_MIMXRT798S_CM33_CPU1

config MFD
	default y
	depends on DT_HAS_NXP_LP_FLEXCOMM_ENABLED

if SOC_MIMXRT798S_HIFI4

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)

config XTENSA_TIMER
	default y

config XTENSA_CCOUNT_HZ
	default SYS_CLOCK_HW_CYCLES_PER_SEC

config SYS_CLOCK_TICKS_PER_SEC
	default 1000

config GEN_IRQ_VECTOR_TABLE
	default n

config NXP_IMXRT_BOOT_HEADER
	default n

endif # SOC_MIMXRT798S_HIFI4

if SOC_MIMXRT798S_HIFI1

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)

config XTENSA_TIMER
	default y

config GEN_IRQ_VECTOR_TABLE
	default n

config NXP_IMXRT_BOOT_HEADER
	default n

config XTENSA_CCOUNT_HZ
	default SYS_CLOCK_HW_CYCLES_PER_SEC

config SYS_CLOCK_TICKS_PER_SEC
	default 1000

endif # SOC_MIMXRT798S_HIFI1